1/* 2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 3 * Creative Labs, Inc. 4 * Routines for control of EMU10K1 chips 5 * 6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk> 7 * Added support for Audigy 2 Value. 8 * Added EMU 1010 support. 9 * General bug fixes and enhancements. 10 * 11 * 12 * BUGS: 13 * -- 14 * 15 * TODO: 16 * -- 17 * 18 * This program is free software; you can redistribute it and/or modify 19 * it under the terms of the GNU General Public License as published by 20 * the Free Software Foundation; either version 2 of the License, or 21 * (at your option) any later version. 22 * 23 * This program is distributed in the hope that it will be useful, 24 * but WITHOUT ANY WARRANTY; without even the implied warranty of 25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 26 * GNU General Public License for more details. 27 * 28 * You should have received a copy of the GNU General Public License 29 * along with this program; if not, write to the Free Software 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 31 * 32 */ 33 34#include <linux/sched.h> 35#include <linux/kthread.h> 36#include <linux/delay.h> 37#include <linux/init.h> 38#include <linux/interrupt.h> 39#include <linux/pci.h> 40#include <linux/slab.h> 41#include <linux/vmalloc.h> 42#include <linux/mutex.h> 43 44 45#include <sound/core.h> 46#include <sound/emu10k1.h> 47#include <linux/firmware.h> 48#include "p16v.h" 49#include "tina2.h" 50#include "p17v.h" 51 52 53#define HANA_FILENAME "emu/hana.fw" 54#define DOCK_FILENAME "emu/audio_dock.fw" 55#define EMU1010B_FILENAME "emu/emu1010b.fw" 56#define MICRO_DOCK_FILENAME "emu/micro_dock.fw" 57#define EMU0404_FILENAME "emu/emu0404.fw" 58#define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw" 59 60MODULE_FIRMWARE(HANA_FILENAME); 61MODULE_FIRMWARE(DOCK_FILENAME); 62MODULE_FIRMWARE(EMU1010B_FILENAME); 63MODULE_FIRMWARE(MICRO_DOCK_FILENAME); 64MODULE_FIRMWARE(EMU0404_FILENAME); 65MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME); 66 67 68/************************************************************************* 69 * EMU10K1 init / done 70 *************************************************************************/ 71 72void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch) 73{ 74 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); 75 snd_emu10k1_ptr_write(emu, IP, ch, 0); 76 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff); 77 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff); 78 snd_emu10k1_ptr_write(emu, PTRX, ch, 0); 79 snd_emu10k1_ptr_write(emu, CPF, ch, 0); 80 snd_emu10k1_ptr_write(emu, CCR, ch, 0); 81 82 snd_emu10k1_ptr_write(emu, PSST, ch, 0); 83 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10); 84 snd_emu10k1_ptr_write(emu, CCCA, ch, 0); 85 snd_emu10k1_ptr_write(emu, Z1, ch, 0); 86 snd_emu10k1_ptr_write(emu, Z2, ch, 0); 87 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000); 88 89 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0); 90 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0); 91 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff); 92 snd_emu10k1_ptr_write(emu, PEFE, ch, 0); 93 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0); 94 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */ 95 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */ 96 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0); 97 98 /*** these are last so OFF prevents writing ***/ 99 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0); 100 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0); 101 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0); 102 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0); 103 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0); 104 105 /* Audigy extra stuffs */ 106 if (emu->audigy) { 107 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */ 108 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */ 109 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */ 110 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */ 111 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100); 112 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f); 113 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0); 114 } 115} 116 117static unsigned int spi_dac_init[] = { 118 0x00ff, 119 0x02ff, 120 0x0400, 121 0x0520, 122 0x0600, 123 0x08ff, 124 0x0aff, 125 0x0cff, 126 0x0eff, 127 0x10ff, 128 0x1200, 129 0x1400, 130 0x1480, 131 0x1800, 132 0x1aff, 133 0x1cff, 134 0x1e00, 135 0x0530, 136 0x0602, 137 0x0622, 138 0x1400, 139}; 140 141static unsigned int i2c_adc_init[][2] = { 142 { 0x17, 0x00 }, /* Reset */ 143 { 0x07, 0x00 }, /* Timeout */ 144 { 0x0b, 0x22 }, /* Interface control */ 145 { 0x0c, 0x22 }, /* Master mode control */ 146 { 0x0d, 0x08 }, /* Powerdown control */ 147 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */ 148 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */ 149 { 0x10, 0x7b }, /* ALC Control 1 */ 150 { 0x11, 0x00 }, /* ALC Control 2 */ 151 { 0x12, 0x32 }, /* ALC Control 3 */ 152 { 0x13, 0x00 }, /* Noise gate control */ 153 { 0x14, 0xa6 }, /* Limiter control */ 154 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */ 155}; 156 157static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume) 158{ 159 unsigned int silent_page; 160 int ch; 161 u32 tmp; 162 163 /* disable audio and lock cache */ 164 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | 165 HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 166 167 /* reset recording buffers */ 168 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE); 169 snd_emu10k1_ptr_write(emu, MICBA, 0, 0); 170 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE); 171 snd_emu10k1_ptr_write(emu, FXBA, 0, 0); 172 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE); 173 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0); 174 175 /* disable channel interrupt */ 176 outl(0, emu->port + INTE); 177 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0); 178 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0); 179 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0); 180 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0); 181 182 if (emu->audigy) { 183 /* set SPDIF bypass mode */ 184 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT); 185 /* enable rear left + rear right AC97 slots */ 186 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | 187 AC97SLOT_REAR_LEFT); 188 } 189 190 /* init envelope engine */ 191 for (ch = 0; ch < NUM_G; ch++) 192 snd_emu10k1_voice_init(emu, ch); 193 194 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]); 195 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]); 196 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]); 197 198 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 199 /* Hacks for Alice3 to work independent of haP16V driver */ 200 /* Setup SRCMulti_I2S SamplingRate */ 201 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0); 202 tmp &= 0xfffff1ff; 203 tmp |= (0x2<<9); 204 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp); 205 206 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 207 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14); 208 /* Setup SRCMulti Input Audio Enable */ 209 /* Use 0xFFFFFFFF to enable P16V sounds. */ 210 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF); 211 212 /* Enabled Phased (8-channel) P16V playback */ 213 outl(0x0201, emu->port + HCFG2); 214 /* Set playback routing. */ 215 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4); 216 } 217 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */ 218 /* Hacks for Alice3 to work independent of haP16V driver */ 219 snd_printk(KERN_INFO "Audigy2 value: Special config.\n"); 220 /* Setup SRCMulti_I2S SamplingRate */ 221 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0); 222 tmp &= 0xfffff1ff; 223 tmp |= (0x2<<9); 224 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp); 225 226 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 227 outl(0x600000, emu->port + 0x20); 228 outl(0x14, emu->port + 0x24); 229 230 /* Setup SRCMulti Input Audio Enable */ 231 outl(0x7b0000, emu->port + 0x20); 232 outl(0xFF000000, emu->port + 0x24); 233 234 /* Setup SPDIF Out Audio Enable */ 235 /* The Audigy 2 Value has a separate SPDIF out, 236 * so no need for a mixer switch 237 */ 238 outl(0x7a0000, emu->port + 0x20); 239 outl(0xFF000000, emu->port + 0x24); 240 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */ 241 outl(tmp, emu->port + A_IOCFG); 242 } 243 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */ 244 int size, n; 245 246 size = ARRAY_SIZE(spi_dac_init); 247 for (n = 0; n < size; n++) 248 snd_emu10k1_spi_write(emu, spi_dac_init[n]); 249 250 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10); 251 /* Enable GPIOs 252 * GPIO0: Unknown 253 * GPIO1: Speakers-enabled. 254 * GPIO2: Unknown 255 * GPIO3: Unknown 256 * GPIO4: IEC958 Output on. 257 * GPIO5: Unknown 258 * GPIO6: Unknown 259 * GPIO7: Unknown 260 */ 261 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */ 262 } 263 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */ 264 int size, n; 265 266 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f); 267 tmp = inl(emu->port + A_IOCFG); 268 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */ 269 tmp = inl(emu->port + A_IOCFG); 270 size = ARRAY_SIZE(i2c_adc_init); 271 for (n = 0; n < size; n++) 272 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]); 273 for (n = 0; n < 4; n++) { 274 emu->i2c_capture_volume[n][0] = 0xcf; 275 emu->i2c_capture_volume[n][1] = 0xcf; 276 } 277 } 278 279 280 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr); 281 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */ 282 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */ 283 284 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK; 285 for (ch = 0; ch < NUM_G; ch++) { 286 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page); 287 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page); 288 } 289 290 if (emu->card_capabilities->emu_model) { 291 outl(HCFG_AUTOMUTE_ASYNC | 292 HCFG_EMU32_SLAVE | 293 HCFG_AUDIOENABLE, emu->port + HCFG); 294 /* 295 * Hokay, setup HCFG 296 * Mute Disable Audio = 0 297 * Lock Tank Memory = 1 298 * Lock Sound Memory = 0 299 * Auto Mute = 1 300 */ 301 } else if (emu->audigy) { 302 if (emu->revision == 4) /* audigy2 */ 303 outl(HCFG_AUDIOENABLE | 304 HCFG_AC3ENABLE_CDSPDIF | 305 HCFG_AC3ENABLE_GPSPDIF | 306 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 307 else 308 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 309 } else if (emu->model == 0x20 || 310 emu->model == 0xc400 || 311 (emu->model == 0x21 && emu->revision < 6)) 312 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG); 313 else 314 /* With on-chip joystick */ 315 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 316 317 if (enable_ir) { /* enable IR for SB Live */ 318 if (emu->card_capabilities->emu_model) { 319 ; /* Disable all access to A_IOCFG for the emu1010 */ 320 } else if (emu->card_capabilities->i2c_adc) { 321 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 322 } else if (emu->audigy) { 323 unsigned int reg = inl(emu->port + A_IOCFG); 324 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 325 udelay(500); 326 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 327 udelay(100); 328 outl(reg, emu->port + A_IOCFG); 329 } else { 330 unsigned int reg = inl(emu->port + HCFG); 331 outl(reg | HCFG_GPOUT2, emu->port + HCFG); 332 udelay(500); 333 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG); 334 udelay(100); 335 outl(reg, emu->port + HCFG); 336 } 337 } 338 339 if (emu->card_capabilities->emu_model) { 340 ; /* Disable all access to A_IOCFG for the emu1010 */ 341 } else if (emu->card_capabilities->i2c_adc) { 342 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 343 } else if (emu->audigy) { /* enable analog output */ 344 unsigned int reg = inl(emu->port + A_IOCFG); 345 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG); 346 } 347 348 return 0; 349} 350 351static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu) 352{ 353 /* 354 * Enable the audio bit 355 */ 356 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG); 357 358 /* Enable analog/digital outs on audigy */ 359 if (emu->card_capabilities->emu_model) { 360 ; /* Disable all access to A_IOCFG for the emu1010 */ 361 } else if (emu->card_capabilities->i2c_adc) { 362 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 363 } else if (emu->audigy) { 364 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG); 365 366 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 367 /* Unmute Analog now. Set GPO6 to 1 for Apollo. 368 * This has to be done after init ALice3 I2SOut beyond 48KHz. 369 * So, sequence is important. */ 370 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG); 371 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */ 372 /* Unmute Analog now. */ 373 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG); 374 } else { 375 /* Disable routing from AC97 line out to Front speakers */ 376 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG); 377 } 378 } 379 380 381 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE); 382} 383 384int snd_emu10k1_done(struct snd_emu10k1 *emu) 385{ 386 int ch; 387 388 outl(0, emu->port + INTE); 389 390 /* 391 * Shutdown the chip 392 */ 393 for (ch = 0; ch < NUM_G; ch++) 394 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); 395 for (ch = 0; ch < NUM_G; ch++) { 396 snd_emu10k1_ptr_write(emu, VTFT, ch, 0); 397 snd_emu10k1_ptr_write(emu, CVCF, ch, 0); 398 snd_emu10k1_ptr_write(emu, PTRX, ch, 0); 399 snd_emu10k1_ptr_write(emu, CPF, ch, 0); 400 } 401 402 /* reset recording buffers */ 403 snd_emu10k1_ptr_write(emu, MICBS, 0, 0); 404 snd_emu10k1_ptr_write(emu, MICBA, 0, 0); 405 snd_emu10k1_ptr_write(emu, FXBS, 0, 0); 406 snd_emu10k1_ptr_write(emu, FXBA, 0, 0); 407 snd_emu10k1_ptr_write(emu, FXWC, 0, 0); 408 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE); 409 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0); 410 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K); 411 snd_emu10k1_ptr_write(emu, TCB, 0, 0); 412 if (emu->audigy) 413 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP); 414 else 415 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP); 416 417 /* disable channel interrupt */ 418 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0); 419 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0); 420 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0); 421 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0); 422 423 /* disable audio and lock cache */ 424 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 425 snd_emu10k1_ptr_write(emu, PTB, 0, 0); 426 427 return 0; 428} 429 430/************************************************************************* 431 * ECARD functional implementation 432 *************************************************************************/ 433 434/* In A1 Silicon, these bits are in the HC register */ 435#define HOOKN_BIT (1L << 12) 436#define HANDN_BIT (1L << 11) 437#define PULSEN_BIT (1L << 10) 438 439#define EC_GDI1 (1 << 13) 440#define EC_GDI0 (1 << 14) 441 442#define EC_NUM_CONTROL_BITS 20 443 444#define EC_AC3_DATA_SELN 0x0001L 445#define EC_EE_DATA_SEL 0x0002L 446#define EC_EE_CNTRL_SELN 0x0004L 447#define EC_EECLK 0x0008L 448#define EC_EECS 0x0010L 449#define EC_EESDO 0x0020L 450#define EC_TRIM_CSN 0x0040L 451#define EC_TRIM_SCLK 0x0080L 452#define EC_TRIM_SDATA 0x0100L 453#define EC_TRIM_MUTEN 0x0200L 454#define EC_ADCCAL 0x0400L 455#define EC_ADCRSTN 0x0800L 456#define EC_DACCAL 0x1000L 457#define EC_DACMUTEN 0x2000L 458#define EC_LEDN 0x4000L 459 460#define EC_SPDIF0_SEL_SHIFT 15 461#define EC_SPDIF1_SEL_SHIFT 17 462#define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT) 463#define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT) 464#define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK) 465#define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK) 466#define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should 467 * be incremented any time the EEPROM's 468 * format is changed. */ 469 470#define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */ 471 472/* Addresses for special values stored in to EEPROM */ 473#define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */ 474#define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */ 475#define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */ 476 477#define EC_LAST_PROMFILE_ADDR 0x2f 478 479#define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The 480 * can be up to 30 characters in length 481 * and is stored as a NULL-terminated 482 * ASCII string. Any unused bytes must be 483 * filled with zeros */ 484#define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */ 485 486 487/* Most of this stuff is pretty self-evident. According to the hardware 488 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC 489 * offset problem. Weird. 490 */ 491#define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \ 492 EC_TRIM_CSN) 493 494 495#define EC_DEFAULT_ADC_GAIN 0xC4C4 496#define EC_DEFAULT_SPDIF0_SEL 0x0 497#define EC_DEFAULT_SPDIF1_SEL 0x4 498 499/************************************************************************** 500 * @func Clock bits into the Ecard's control latch. The Ecard uses a 501 * control latch will is loaded bit-serially by toggling the Modem control 502 * lines from function 2 on the E8010. This function hides these details 503 * and presents the illusion that we are actually writing to a distinct 504 * register. 505 */ 506 507static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value) 508{ 509 unsigned short count; 510 unsigned int data; 511 unsigned long hc_port; 512 unsigned int hc_value; 513 514 hc_port = emu->port + HCFG; 515 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT); 516 outl(hc_value, hc_port); 517 518 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) { 519 520 /* Set up the value */ 521 data = ((value & 0x1) ? PULSEN_BIT : 0); 522 value >>= 1; 523 524 outl(hc_value | data, hc_port); 525 526 /* Clock the shift register */ 527 outl(hc_value | data | HANDN_BIT, hc_port); 528 outl(hc_value | data, hc_port); 529 } 530 531 /* Latch the bits */ 532 outl(hc_value | HOOKN_BIT, hc_port); 533 outl(hc_value, hc_port); 534} 535 536/************************************************************************** 537 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The 538 * trim value consists of a 16bit value which is composed of two 539 * 8 bit gain/trim values, one for the left channel and one for the 540 * right channel. The following table maps from the Gain/Attenuation 541 * value in decibels into the corresponding bit pattern for a single 542 * channel. 543 */ 544 545static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu, 546 unsigned short gain) 547{ 548 unsigned int bit; 549 550 /* Enable writing to the TRIM registers */ 551 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 552 553 /* Do it again to insure that we meet hold time requirements */ 554 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 555 556 for (bit = (1 << 15); bit; bit >>= 1) { 557 unsigned int value; 558 559 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA); 560 561 if (gain & bit) 562 value |= EC_TRIM_SDATA; 563 564 /* Clock the bit */ 565 snd_emu10k1_ecard_write(emu, value); 566 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK); 567 snd_emu10k1_ecard_write(emu, value); 568 } 569 570 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 571} 572 573static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu) 574{ 575 unsigned int hc_value; 576 577 /* Set up the initial settings */ 578 emu->ecard_ctrl = EC_RAW_RUN_MODE | 579 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) | 580 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL); 581 582 /* Step 0: Set the codec type in the hardware control register 583 * and enable audio output */ 584 hc_value = inl(emu->port + HCFG); 585 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG); 586 inl(emu->port + HCFG); 587 588 /* Step 1: Turn off the led and deassert TRIM_CS */ 589 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 590 591 /* Step 2: Calibrate the ADC and DAC */ 592 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN); 593 594 snd_emu10k1_wait(emu, 48000); 595 596 /* Step 4: Switch off the DAC and ADC calibration. Note 597 * That ADC_CAL is actually an inverted signal, so we assert 598 * it here to stop calibration. */ 599 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 600 601 /* Step 4: Switch into run mode */ 602 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 603 604 /* Step 5: Set the analog input gain */ 605 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN); 606 607 return 0; 608} 609 610static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu) 611{ 612 unsigned long special_port; 613 unsigned int value; 614 615 /* Special initialisation routine 616 * before the rest of the IO-Ports become active. 617 */ 618 special_port = emu->port + 0x38; 619 value = inl(special_port); 620 outl(0x00d00000, special_port); 621 value = inl(special_port); 622 outl(0x00d00001, special_port); 623 value = inl(special_port); 624 outl(0x00d0005f, special_port); 625 value = inl(special_port); 626 outl(0x00d0007f, special_port); 627 value = inl(special_port); 628 outl(0x0090007f, special_port); 629 value = inl(special_port); 630 631 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */ 632 /* Delay to give time for ADC chip to switch on. It needs 113ms */ 633 msleep(200); 634 return 0; 635} 636 637static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, const char *filename) 638{ 639 int err; 640 int n, i; 641 int reg; 642 int value; 643 unsigned int write_post; 644 unsigned long flags; 645 const struct firmware *fw_entry; 646 647 err = request_firmware(&fw_entry, filename, &emu->pci->dev); 648 if (err != 0) { 649 snd_printk(KERN_ERR "firmware: %s not found. Err = %d\n", filename, err); 650 return err; 651 } 652 snd_printk(KERN_INFO "firmware size = 0x%zx\n", fw_entry->size); 653 654 /* The FPGA is a Xilinx Spartan IIE XC2S50E */ 655 /* GPIO7 -> FPGA PGMN 656 * GPIO6 -> FPGA CCLK 657 * GPIO5 -> FPGA DIN 658 * FPGA CONFIG OFF -> FPGA PGMN 659 */ 660 spin_lock_irqsave(&emu->emu_lock, flags); 661 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */ 662 write_post = inl(emu->port + A_IOCFG); 663 udelay(100); 664 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */ 665 write_post = inl(emu->port + A_IOCFG); 666 udelay(100); /* Allow FPGA memory to clean */ 667 for (n = 0; n < fw_entry->size; n++) { 668 value = fw_entry->data[n]; 669 for (i = 0; i < 8; i++) { 670 reg = 0x80; 671 if (value & 0x1) 672 reg = reg | 0x20; 673 value = value >> 1; 674 outl(reg, emu->port + A_IOCFG); 675 write_post = inl(emu->port + A_IOCFG); 676 outl(reg | 0x40, emu->port + A_IOCFG); 677 write_post = inl(emu->port + A_IOCFG); 678 } 679 } 680 /* After programming, set GPIO bit 4 high again. */ 681 outl(0x10, emu->port + A_IOCFG); 682 write_post = inl(emu->port + A_IOCFG); 683 spin_unlock_irqrestore(&emu->emu_lock, flags); 684 685 release_firmware(fw_entry); 686 return 0; 687} 688 689static int emu1010_firmware_thread(void *data) 690{ 691 struct snd_emu10k1 *emu = data; 692 u32 tmp, tmp2, reg; 693 int err; 694 695 for (;;) { 696 /* Delay to allow Audio Dock to settle */ 697 msleep_interruptible(1000); 698 if (kthread_should_stop()) 699 break; 700 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */ 701 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */ 702 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) { 703 /* Audio Dock attached */ 704 /* Return to Audio Dock programming mode */ 705 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n"); 706 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK); 707 if (emu->card_capabilities->emu_model == 708 EMU_MODEL_EMU1010) { 709 err = snd_emu1010_load_firmware(emu, DOCK_FILENAME); 710 if (err != 0) 711 continue; 712 } else if (emu->card_capabilities->emu_model == 713 EMU_MODEL_EMU1010B) { 714 err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME); 715 if (err != 0) 716 continue; 717 } else if (emu->card_capabilities->emu_model == 718 EMU_MODEL_EMU1616) { 719 err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME); 720 if (err != 0) 721 continue; 722 } 723 724 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0); 725 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ®); 726 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", reg); 727 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 728 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 729 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg); 730 if ((reg & 0x1f) != 0x15) { 731 /* FPGA failed to be programmed */ 732 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", reg); 733 continue; 734 } 735 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n"); 736 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp); 737 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2); 738 snd_printk(KERN_INFO "Audio Dock ver: %u.%u\n", 739 tmp, tmp2); 740 /* Sync clocking between 1010 and Dock */ 741 /* Allow DLL to settle */ 742 msleep(10); 743 /* Unmute all. Default is muted after a firmware load */ 744 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 745 } 746 } 747 snd_printk(KERN_INFO "emu1010: firmware thread stopping\n"); 748 return 0; 749} 750 751/* 752 * EMU-1010 - details found out from this driver, official MS Win drivers, 753 * testing the card: 754 * 755 * Audigy2 (aka Alice2): 756 * --------------------- 757 * * communication over PCI 758 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA 759 * to 2 x 16-bit, using internal DSP instructions 760 * * slave mode, clock supplied by HANA 761 * * linked to HANA using: 762 * 32 x 32-bit serial EMU32 output channels 763 * 16 x EMU32 input channels 764 * (?) x I2S I/O channels (?) 765 * 766 * FPGA (aka HANA): 767 * --------------- 768 * * provides all (?) physical inputs and outputs of the card 769 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.) 770 * * provides clock signal for the card and Alice2 771 * * two crystals - for 44.1kHz and 48kHz multiples 772 * * provides internal routing of signal sources to signal destinations 773 * * inputs/outputs to Alice2 - see above 774 * 775 * Current status of the driver: 776 * ---------------------------- 777 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz) 778 * * PCM device nb. 2: 779 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops 780 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops 781 */ 782static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu) 783{ 784 unsigned int i; 785 u32 tmp, tmp2, reg; 786 int err; 787 const char *filename = NULL; 788 789 snd_printk(KERN_INFO "emu1010: Special config.\n"); 790 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, 791 * Lock Sound Memory Cache, Lock Tank Memory Cache, 792 * Mute all codecs. 793 */ 794 outl(0x0005a00c, emu->port + HCFG); 795 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, 796 * Lock Tank Memory Cache, 797 * Mute all codecs. 798 */ 799 outl(0x0005a004, emu->port + HCFG); 800 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, 801 * Mute all codecs. 802 */ 803 outl(0x0005a000, emu->port + HCFG); 804 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, 805 * Mute all codecs. 806 */ 807 outl(0x0005a000, emu->port + HCFG); 808 809 /* Disable 48Volt power to Audio Dock */ 810 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 811 812 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */ 813 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 814 snd_printdd("reg1 = 0x%x\n", reg); 815 if ((reg & 0x3f) == 0x15) { 816 /* FPGA netlist already present so clear it */ 817 /* Return to programming mode */ 818 819 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02); 820 } 821 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 822 snd_printdd("reg2 = 0x%x\n", reg); 823 if ((reg & 0x3f) == 0x15) { 824 /* FPGA failed to return to programming mode */ 825 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n"); 826 return -ENODEV; 827 } 828 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID = 0x%x\n", reg); 829 switch (emu->card_capabilities->emu_model) { 830 case EMU_MODEL_EMU1010: 831 filename = HANA_FILENAME; 832 break; 833 case EMU_MODEL_EMU1010B: 834 filename = EMU1010B_FILENAME; 835 break; 836 case EMU_MODEL_EMU1616: 837 filename = EMU1010_NOTEBOOK_FILENAME; 838 break; 839 case EMU_MODEL_EMU0404: 840 filename = EMU0404_FILENAME; 841 break; 842 default: 843 filename = NULL; 844 return -ENODEV; 845 break; 846 } 847 snd_printk(KERN_INFO "emu1010: filename %s testing\n", filename); 848 err = snd_emu1010_load_firmware(emu, filename); 849 if (err != 0) { 850 snd_printk( 851 KERN_INFO "emu1010: Loading Firmware file %s failed\n", 852 filename); 853 return err; 854 } 855 856 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 857 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 858 if ((reg & 0x3f) != 0x15) { 859 /* FPGA failed to be programmed */ 860 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", reg); 861 return -ENODEV; 862 } 863 864 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n"); 865 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp); 866 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2); 867 snd_printk(KERN_INFO "emu1010: Hana version: %u.%u\n", tmp, tmp2); 868 /* Enable 48Volt power to Audio Dock */ 869 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON); 870 871 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); 872 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg); 873 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); 874 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg); 875 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp); 876 /* Optical -> ADAT I/O */ 877 /* 0 : SPDIF 878 * 1 : ADAT 879 */ 880 emu->emu1010.optical_in = 1; /* IN_ADAT */ 881 emu->emu1010.optical_out = 1; /* IN_ADAT */ 882 tmp = 0; 883 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) | 884 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0); 885 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp); 886 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp); 887 /* Set no attenuation on Audio Dock pads. */ 888 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00); 889 emu->emu1010.adc_pads = 0x00; 890 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp); 891 /* Unmute Audio dock DACs, Headphone source DAC-4. */ 892 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30); 893 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); 894 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp); 895 /* DAC PADs. */ 896 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f); 897 emu->emu1010.dac_pads = 0x0f; 898 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp); 899 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30); 900 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp); 901 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */ 902 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); 903 /* MIDI routing */ 904 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); 905 /* Unknown. */ 906 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); 907 /* IRQ Enable: Alll on */ 908 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */ 909 /* IRQ Enable: All off */ 910 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00); 911 912 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); 913 snd_printk(KERN_INFO "emu1010: Card options3 = 0x%x\n", reg); 914 /* Default WCLK set to 48kHz. */ 915 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00); 916 /* Word Clock source, Internal 48kHz x1 */ 917 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); 918 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ 919 /* Audio Dock LEDs. */ 920 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); 921 922 /* For 48kHz */ 923 snd_emu1010_fpga_link_dst_src_write(emu, 924 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1); 925 snd_emu1010_fpga_link_dst_src_write(emu, 926 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1); 927 snd_emu1010_fpga_link_dst_src_write(emu, 928 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2); 929 snd_emu1010_fpga_link_dst_src_write(emu, 930 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2); 931 snd_emu1010_fpga_link_dst_src_write(emu, 932 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1); 933 snd_emu1010_fpga_link_dst_src_write(emu, 934 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1); 935 snd_emu1010_fpga_link_dst_src_write(emu, 936 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1); 937 snd_emu1010_fpga_link_dst_src_write(emu, 938 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1); 939 /* Pavel Hofman - setting defaults for 8 more capture channels 940 * Defaults only, users will set their own values anyways, let's 941 * just copy/paste. 942 */ 943 944 snd_emu1010_fpga_link_dst_src_write(emu, 945 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1); 946 snd_emu1010_fpga_link_dst_src_write(emu, 947 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1); 948 snd_emu1010_fpga_link_dst_src_write(emu, 949 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2); 950 snd_emu1010_fpga_link_dst_src_write(emu, 951 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2); 952 snd_emu1010_fpga_link_dst_src_write(emu, 953 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1); 954 snd_emu1010_fpga_link_dst_src_write(emu, 955 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1); 956 snd_emu1010_fpga_link_dst_src_write(emu, 957 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1); 958 snd_emu1010_fpga_link_dst_src_write(emu, 959 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1); 960 for (i = 0; i < 0x20; i++) { 961 /* AudioDock Elink <- Silence */ 962 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE); 963 } 964 for (i = 0; i < 4; i++) { 965 /* Hana SPDIF Out <- Silence */ 966 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE); 967 } 968 for (i = 0; i < 7; i++) { 969 /* Hamoa DAC <- Silence */ 970 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE); 971 } 972 for (i = 0; i < 7; i++) { 973 /* Hana ADAT Out <- Silence */ 974 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE); 975 } 976 snd_emu1010_fpga_link_dst_src_write(emu, 977 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1); 978 snd_emu1010_fpga_link_dst_src_write(emu, 979 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1); 980 snd_emu1010_fpga_link_dst_src_write(emu, 981 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1); 982 snd_emu1010_fpga_link_dst_src_write(emu, 983 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1); 984 snd_emu1010_fpga_link_dst_src_write(emu, 985 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1); 986 snd_emu1010_fpga_link_dst_src_write(emu, 987 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1); 988 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */ 989 990 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp); 991 992 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave, 993 * Lock Sound Memory Cache, Lock Tank Memory Cache, 994 * Mute all codecs. 995 */ 996 outl(0x0000a000, emu->port + HCFG); 997 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave, 998 * Lock Sound Memory Cache, Lock Tank Memory Cache, 999 * Un-Mute all codecs. 1000 */ 1001 outl(0x0000a001, emu->port + HCFG); 1002 1003 /* Initial boot complete. Now patches */ 1004 1005 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp); 1006 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */ 1007 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */ 1008 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */ 1009 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */ 1010 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp); 1011 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif (or 0x11 for aes/ebu) */ 1012 1013 /* Start Micro/Audio Dock firmware loader thread */ 1014 if (!emu->emu1010.firmware_thread) { 1015 emu->emu1010.firmware_thread = 1016 kthread_create(emu1010_firmware_thread, emu, 1017 "emu1010_firmware"); 1018 wake_up_process(emu->emu1010.firmware_thread); 1019 } 1020 1021 /* Default outputs */ 1022 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) { 1023 /* 1616(M) cardbus default outputs */ 1024 /* ALICE2 bus 0xa0 */ 1025 snd_emu1010_fpga_link_dst_src_write(emu, 1026 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); 1027 emu->emu1010.output_source[0] = 17; 1028 snd_emu1010_fpga_link_dst_src_write(emu, 1029 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1030 emu->emu1010.output_source[1] = 18; 1031 snd_emu1010_fpga_link_dst_src_write(emu, 1032 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2); 1033 emu->emu1010.output_source[2] = 19; 1034 snd_emu1010_fpga_link_dst_src_write(emu, 1035 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); 1036 emu->emu1010.output_source[3] = 20; 1037 snd_emu1010_fpga_link_dst_src_write(emu, 1038 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4); 1039 emu->emu1010.output_source[4] = 21; 1040 snd_emu1010_fpga_link_dst_src_write(emu, 1041 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5); 1042 emu->emu1010.output_source[5] = 22; 1043 /* ALICE2 bus 0xa0 */ 1044 snd_emu1010_fpga_link_dst_src_write(emu, 1045 EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0); 1046 emu->emu1010.output_source[16] = 17; 1047 snd_emu1010_fpga_link_dst_src_write(emu, 1048 EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1); 1049 emu->emu1010.output_source[17] = 18; 1050 } else { 1051 /* ALICE2 bus 0xa0 */ 1052 snd_emu1010_fpga_link_dst_src_write(emu, 1053 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); 1054 emu->emu1010.output_source[0] = 21; 1055 snd_emu1010_fpga_link_dst_src_write(emu, 1056 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1057 emu->emu1010.output_source[1] = 22; 1058 snd_emu1010_fpga_link_dst_src_write(emu, 1059 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2); 1060 emu->emu1010.output_source[2] = 23; 1061 snd_emu1010_fpga_link_dst_src_write(emu, 1062 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); 1063 emu->emu1010.output_source[3] = 24; 1064 snd_emu1010_fpga_link_dst_src_write(emu, 1065 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4); 1066 emu->emu1010.output_source[4] = 25; 1067 snd_emu1010_fpga_link_dst_src_write(emu, 1068 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5); 1069 emu->emu1010.output_source[5] = 26; 1070 snd_emu1010_fpga_link_dst_src_write(emu, 1071 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6); 1072 emu->emu1010.output_source[6] = 27; 1073 snd_emu1010_fpga_link_dst_src_write(emu, 1074 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7); 1075 emu->emu1010.output_source[7] = 28; 1076 /* ALICE2 bus 0xa0 */ 1077 snd_emu1010_fpga_link_dst_src_write(emu, 1078 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0); 1079 emu->emu1010.output_source[8] = 21; 1080 snd_emu1010_fpga_link_dst_src_write(emu, 1081 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1082 emu->emu1010.output_source[9] = 22; 1083 /* ALICE2 bus 0xa0 */ 1084 snd_emu1010_fpga_link_dst_src_write(emu, 1085 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); 1086 emu->emu1010.output_source[10] = 21; 1087 snd_emu1010_fpga_link_dst_src_write(emu, 1088 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1089 emu->emu1010.output_source[11] = 22; 1090 /* ALICE2 bus 0xa0 */ 1091 snd_emu1010_fpga_link_dst_src_write(emu, 1092 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); 1093 emu->emu1010.output_source[12] = 21; 1094 snd_emu1010_fpga_link_dst_src_write(emu, 1095 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1096 emu->emu1010.output_source[13] = 22; 1097 /* ALICE2 bus 0xa0 */ 1098 snd_emu1010_fpga_link_dst_src_write(emu, 1099 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0); 1100 emu->emu1010.output_source[14] = 21; 1101 snd_emu1010_fpga_link_dst_src_write(emu, 1102 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1103 emu->emu1010.output_source[15] = 22; 1104 /* ALICE2 bus 0xa0 */ 1105 snd_emu1010_fpga_link_dst_src_write(emu, 1106 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0); 1107 emu->emu1010.output_source[16] = 21; 1108 snd_emu1010_fpga_link_dst_src_write(emu, 1109 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1); 1110 emu->emu1010.output_source[17] = 22; 1111 snd_emu1010_fpga_link_dst_src_write(emu, 1112 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2); 1113 emu->emu1010.output_source[18] = 23; 1114 snd_emu1010_fpga_link_dst_src_write(emu, 1115 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3); 1116 emu->emu1010.output_source[19] = 24; 1117 snd_emu1010_fpga_link_dst_src_write(emu, 1118 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4); 1119 emu->emu1010.output_source[20] = 25; 1120 snd_emu1010_fpga_link_dst_src_write(emu, 1121 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5); 1122 emu->emu1010.output_source[21] = 26; 1123 snd_emu1010_fpga_link_dst_src_write(emu, 1124 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6); 1125 emu->emu1010.output_source[22] = 27; 1126 snd_emu1010_fpga_link_dst_src_write(emu, 1127 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7); 1128 emu->emu1010.output_source[23] = 28; 1129 } 1130 /* TEMP: Select SPDIF in/out */ 1131 /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */ 1132 1133 /* TEMP: Select 48kHz SPDIF out */ 1134 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */ 1135 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */ 1136 /* Word Clock source, Internal 48kHz x1 */ 1137 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); 1138 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ 1139 emu->emu1010.internal_clock = 1; /* 48000 */ 1140 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */ 1141 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */ 1142 /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */ 1143 /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */ 1144 /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */ 1145 1146 return 0; 1147} 1148/* 1149 * Create the EMU10K1 instance 1150 */ 1151 1152#ifdef CONFIG_PM 1153static int alloc_pm_buffer(struct snd_emu10k1 *emu); 1154static void free_pm_buffer(struct snd_emu10k1 *emu); 1155#endif 1156 1157static int snd_emu10k1_free(struct snd_emu10k1 *emu) 1158{ 1159 if (emu->port) { /* avoid access to already used hardware */ 1160 snd_emu10k1_fx8010_tram_setup(emu, 0); 1161 snd_emu10k1_done(emu); 1162 snd_emu10k1_free_efx(emu); 1163 } 1164 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) { 1165 /* Disable 48Volt power to Audio Dock */ 1166 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 1167 } 1168 if (emu->emu1010.firmware_thread) 1169 kthread_stop(emu->emu1010.firmware_thread); 1170 if (emu->irq >= 0) 1171 free_irq(emu->irq, emu); 1172 /* remove reserved page */ 1173 if (emu->reserved_page) { 1174 snd_emu10k1_synth_free(emu, 1175 (struct snd_util_memblk *)emu->reserved_page); 1176 emu->reserved_page = NULL; 1177 } 1178 if (emu->memhdr) 1179 snd_util_memhdr_free(emu->memhdr); 1180 if (emu->silent_page.area) 1181 snd_dma_free_pages(&emu->silent_page); 1182 if (emu->ptb_pages.area) 1183 snd_dma_free_pages(&emu->ptb_pages); 1184 vfree(emu->page_ptr_table); 1185 vfree(emu->page_addr_table); 1186#ifdef CONFIG_PM 1187 free_pm_buffer(emu); 1188#endif 1189 if (emu->port) 1190 pci_release_regions(emu->pci); 1191 if (emu->card_capabilities->ca0151_chip) /* P16V */ 1192 snd_p16v_free(emu); 1193 pci_disable_device(emu->pci); 1194 kfree(emu); 1195 return 0; 1196} 1197 1198static int snd_emu10k1_dev_free(struct snd_device *device) 1199{ 1200 struct snd_emu10k1 *emu = device->device_data; 1201 return snd_emu10k1_free(emu); 1202} 1203 1204static struct snd_emu_chip_details emu_chip_details[] = { 1205 /* Audigy4 (Not PRO) SB0610 */ 1206 /* Tested by James@superbug.co.uk 4th April 2006 */ 1207 /* A_IOCFG bits 1208 * Output 1209 * 0: ? 1210 * 1: ? 1211 * 2: ? 1212 * 3: 0 - Digital Out, 1 - Line in 1213 * 4: ? 1214 * 5: ? 1215 * 6: ? 1216 * 7: ? 1217 * Input 1218 * 8: ? 1219 * 9: ? 1220 * A: Green jack sense (Front) 1221 * B: ? 1222 * C: Black jack sense (Rear/Side Right) 1223 * D: Yellow jack sense (Center/LFE/Side Left) 1224 * E: ? 1225 * F: ? 1226 * 1227 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08) 1228 * 0 - Digital Out 1229 * 1 - Line in 1230 */ 1231 /* Mic input not tested. 1232 * Analog CD input not tested 1233 * Digital Out not tested. 1234 * Line in working. 1235 * Audio output 5.1 working. Side outputs not working. 1236 */ 1237 /* DSP: CA10300-IAT LF 1238 * DAC: Cirrus Logic CS4382-KQZ 1239 * ADC: Philips 1361T 1240 * AC97: Sigmatel STAC9750 1241 * CA0151: None 1242 */ 1243 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102, 1244 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]", 1245 .id = "Audigy2", 1246 .emu10k2_chip = 1, 1247 .ca0108_chip = 1, 1248 .spk71 = 1, 1249 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1250 .ac97_chip = 1} , 1251 /* Audigy 2 Value AC3 out does not work yet. 1252 * Need to find out how to turn off interpolators. 1253 */ 1254 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1255 /* DSP: CA0108-IAT 1256 * DAC: CS4382-KQ 1257 * ADC: Philips 1361T 1258 * AC97: STAC9750 1259 * CA0151: None 1260 */ 1261 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102, 1262 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]", 1263 .id = "Audigy2", 1264 .emu10k2_chip = 1, 1265 .ca0108_chip = 1, 1266 .spk71 = 1, 1267 .ac97_chip = 1} , 1268 /* Audigy 2 ZS Notebook Cardbus card.*/ 1269 /* Tested by James@superbug.co.uk 6th November 2006 */ 1270 /* Audio output 7.1/Headphones working. 1271 * Digital output working. (AC3 not checked, only PCM) 1272 * Audio Mic/Line inputs working. 1273 * Digital input not tested. 1274 */ 1275 /* DSP: Tina2 1276 * DAC: Wolfson WM8768/WM8568 1277 * ADC: Wolfson WM8775 1278 * AC97: None 1279 * CA0151: None 1280 */ 1281 /* Tested by James@superbug.co.uk 4th April 2006 */ 1282 /* A_IOCFG bits 1283 * Output 1284 * 0: Not Used 1285 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute. 1286 * 2: Analog input 0 = line in, 1 = mic in 1287 * 3: Not Used 1288 * 4: Digital output 0 = off, 1 = on. 1289 * 5: Not Used 1290 * 6: Not Used 1291 * 7: Not Used 1292 * Input 1293 * All bits 1 (0x3fxx) means nothing plugged in. 1294 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing. 1295 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing. 1296 * C-D: 2 = Front/Rear/etc, 3 = nothing. 1297 * E-F: Always 0 1298 * 1299 */ 1300 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102, 1301 .driver = "Audigy2", .name = "SB Audigy 2 ZS Notebook [SB0530]", 1302 .id = "Audigy2", 1303 .emu10k2_chip = 1, 1304 .ca0108_chip = 1, 1305 .ca_cardbus_chip = 1, 1306 .spi_dac = 1, 1307 .i2c_adc = 1, 1308 .spk71 = 1} , 1309 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1310 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102, 1311 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]", 1312 .id = "EMU1010", 1313 .emu10k2_chip = 1, 1314 .ca0108_chip = 1, 1315 .ca_cardbus_chip = 1, 1316 .spk71 = 1 , 1317 .emu_model = EMU_MODEL_EMU1616}, 1318 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1319 /* This is MAEM8960, 0202 is MAEM 8980 */ 1320 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102, 1321 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]", 1322 .id = "EMU1010", 1323 .emu10k2_chip = 1, 1324 .ca0108_chip = 1, 1325 .spk71 = 1, 1326 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */ 1327 /* Tested by James@superbug.co.uk 8th July 2005. */ 1328 /* This is MAEM8810, 0202 is MAEM8820 */ 1329 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102, 1330 .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]", 1331 .id = "EMU1010", 1332 .emu10k2_chip = 1, 1333 .ca0102_chip = 1, 1334 .spk71 = 1, 1335 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */ 1336 /* EMU0404b */ 1337 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102, 1338 .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]", 1339 .id = "EMU0404", 1340 .emu10k2_chip = 1, 1341 .ca0108_chip = 1, 1342 .spk71 = 1, 1343 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */ 1344 /* Tested by James@superbug.co.uk 20-3-2007. */ 1345 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102, 1346 .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]", 1347 .id = "EMU0404", 1348 .emu10k2_chip = 1, 1349 .ca0102_chip = 1, 1350 .spk71 = 1, 1351 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */ 1352 /* Note that all E-mu cards require kernel 2.6 or newer. */ 1353 {.vendor = 0x1102, .device = 0x0008, 1354 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]", 1355 .id = "Audigy2", 1356 .emu10k2_chip = 1, 1357 .ca0108_chip = 1, 1358 .ac97_chip = 1} , 1359 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1360 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102, 1361 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]", 1362 .id = "Audigy2", 1363 .emu10k2_chip = 1, 1364 .ca0102_chip = 1, 1365 .ca0151_chip = 1, 1366 .spk71 = 1, 1367 .spdif_bug = 1, 1368 .ac97_chip = 1} , 1369 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */ 1370 /* The 0x20061102 does have SB0350 written on it 1371 * Just like 0x20021102 1372 */ 1373 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102, 1374 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]", 1375 .id = "Audigy2", 1376 .emu10k2_chip = 1, 1377 .ca0102_chip = 1, 1378 .ca0151_chip = 1, 1379 .spk71 = 1, 1380 .spdif_bug = 1, 1381 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1382 .ac97_chip = 1} , 1383 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102, 1384 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]", 1385 .id = "Audigy2", 1386 .emu10k2_chip = 1, 1387 .ca0102_chip = 1, 1388 .ca0151_chip = 1, 1389 .spk71 = 1, 1390 .spdif_bug = 1, 1391 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1392 .ac97_chip = 1} , 1393 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102, 1394 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]", 1395 .id = "Audigy2", 1396 .emu10k2_chip = 1, 1397 .ca0102_chip = 1, 1398 .ca0151_chip = 1, 1399 .spk71 = 1, 1400 .spdif_bug = 1, 1401 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1402 .ac97_chip = 1} , 1403 /* Audigy 2 */ 1404 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1405 /* DSP: CA0102-IAT 1406 * DAC: CS4382-KQ 1407 * ADC: Philips 1361T 1408 * AC97: STAC9721 1409 * CA0151: Yes 1410 */ 1411 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102, 1412 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]", 1413 .id = "Audigy2", 1414 .emu10k2_chip = 1, 1415 .ca0102_chip = 1, 1416 .ca0151_chip = 1, 1417 .spk71 = 1, 1418 .spdif_bug = 1, 1419 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1420 .ac97_chip = 1} , 1421 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102, 1422 .driver = "Audigy2", .name = "SB Audigy 2 Platinum EX [SB0280]", 1423 .id = "Audigy2", 1424 .emu10k2_chip = 1, 1425 .ca0102_chip = 1, 1426 .ca0151_chip = 1, 1427 .spk71 = 1, 1428 .spdif_bug = 1} , 1429 /* Dell OEM/Creative Labs Audigy 2 ZS */ 1430 /* See ALSA bug#1365 */ 1431 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102, 1432 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]", 1433 .id = "Audigy2", 1434 .emu10k2_chip = 1, 1435 .ca0102_chip = 1, 1436 .ca0151_chip = 1, 1437 .spk71 = 1, 1438 .spdif_bug = 1, 1439 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1440 .ac97_chip = 1} , 1441 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102, 1442 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]", 1443 .id = "Audigy2", 1444 .emu10k2_chip = 1, 1445 .ca0102_chip = 1, 1446 .ca0151_chip = 1, 1447 .spk71 = 1, 1448 .spdif_bug = 1, 1449 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1450 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */ 1451 .ac97_chip = 1} , 1452 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04, 1453 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]", 1454 .id = "Audigy2", 1455 .emu10k2_chip = 1, 1456 .ca0102_chip = 1, 1457 .ca0151_chip = 1, 1458 .spdif_bug = 1, 1459 .ac97_chip = 1} , 1460 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102, 1461 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]", 1462 .id = "Audigy", 1463 .emu10k2_chip = 1, 1464 .ca0102_chip = 1, 1465 .ac97_chip = 1} , 1466 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102, 1467 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]", 1468 .id = "Audigy", 1469 .emu10k2_chip = 1, 1470 .ca0102_chip = 1, 1471 .spdif_bug = 1, 1472 .ac97_chip = 1} , 1473 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102, 1474 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]", 1475 .id = "Audigy", 1476 .emu10k2_chip = 1, 1477 .ca0102_chip = 1, 1478 .ac97_chip = 1} , 1479 {.vendor = 0x1102, .device = 0x0004, 1480 .driver = "Audigy", .name = "Audigy 1 [Unknown]", 1481 .id = "Audigy", 1482 .emu10k2_chip = 1, 1483 .ca0102_chip = 1, 1484 .ac97_chip = 1} , 1485 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102, 1486 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1487 .id = "Live", 1488 .emu10k1_chip = 1, 1489 .ac97_chip = 1, 1490 .sblive51 = 1} , 1491 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102, 1492 .driver = "EMU10K1", .name = "SB Live! [SB0105]", 1493 .id = "Live", 1494 .emu10k1_chip = 1, 1495 .ac97_chip = 1, 1496 .sblive51 = 1} , 1497 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102, 1498 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]", 1499 .id = "Live", 1500 .emu10k1_chip = 1, 1501 .ac97_chip = 1, 1502 .sblive51 = 1} , 1503 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102, 1504 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]", 1505 .id = "Live", 1506 .emu10k1_chip = 1, 1507 .ac97_chip = 1, 1508 .sblive51 = 1} , 1509 /* Tested by ALSA bug#1680 26th December 2005 */ 1510 /* note: It really has SB0220 written on the card, */ 1511 /* but it's SB0228 according to kx.inf */ 1512 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102, 1513 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]", 1514 .id = "Live", 1515 .emu10k1_chip = 1, 1516 .ac97_chip = 1, 1517 .sblive51 = 1} , 1518 /* Tested by Thomas Zehetbauer 27th Aug 2005 */ 1519 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102, 1520 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1521 .id = "Live", 1522 .emu10k1_chip = 1, 1523 .ac97_chip = 1, 1524 .sblive51 = 1} , 1525 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102, 1526 .driver = "EMU10K1", .name = "SB Live! 5.1", 1527 .id = "Live", 1528 .emu10k1_chip = 1, 1529 .ac97_chip = 1, 1530 .sblive51 = 1} , 1531 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */ 1532 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102, 1533 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]", 1534 .id = "Live", 1535 .emu10k1_chip = 1, 1536 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum 1537 * share the same IDs! 1538 */ 1539 .sblive51 = 1} , 1540 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102, 1541 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]", 1542 .id = "Live", 1543 .emu10k1_chip = 1, 1544 .ac97_chip = 1, 1545 .sblive51 = 1} , 1546 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102, 1547 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]", 1548 .id = "Live", 1549 .emu10k1_chip = 1, 1550 .ac97_chip = 1} , 1551 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102, 1552 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]", 1553 .id = "Live", 1554 .emu10k1_chip = 1, 1555 .ac97_chip = 1, 1556 .sblive51 = 1} , 1557 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102, 1558 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]", 1559 .id = "Live", 1560 .emu10k1_chip = 1, 1561 .ac97_chip = 1, 1562 .sblive51 = 1} , 1563 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102, 1564 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]", 1565 .id = "Live", 1566 .emu10k1_chip = 1, 1567 .ac97_chip = 1, 1568 .sblive51 = 1} , 1569 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1570 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102, 1571 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]", 1572 .id = "Live", 1573 .emu10k1_chip = 1, 1574 .ac97_chip = 1, 1575 .sblive51 = 1} , 1576 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102, 1577 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]", 1578 .id = "Live", 1579 .emu10k1_chip = 1, 1580 .ac97_chip = 1, 1581 .sblive51 = 1} , 1582 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102, 1583 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]", 1584 .id = "Live", 1585 .emu10k1_chip = 1, 1586 .ac97_chip = 1, 1587 .sblive51 = 1} , 1588 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102, 1589 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]", 1590 .id = "Live", 1591 .emu10k1_chip = 1, 1592 .ac97_chip = 1, 1593 .sblive51 = 1} , 1594 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102, 1595 .driver = "EMU10K1", .name = "E-mu APS [PC545]", 1596 .id = "APS", 1597 .emu10k1_chip = 1, 1598 .ecard = 1} , 1599 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102, 1600 .driver = "EMU10K1", .name = "SB Live! [CT4620]", 1601 .id = "Live", 1602 .emu10k1_chip = 1, 1603 .ac97_chip = 1, 1604 .sblive51 = 1} , 1605 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102, 1606 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]", 1607 .id = "Live", 1608 .emu10k1_chip = 1, 1609 .ac97_chip = 1, 1610 .sblive51 = 1} , 1611 {.vendor = 0x1102, .device = 0x0002, 1612 .driver = "EMU10K1", .name = "SB Live! [Unknown]", 1613 .id = "Live", 1614 .emu10k1_chip = 1, 1615 .ac97_chip = 1, 1616 .sblive51 = 1} , 1617 { } /* terminator */ 1618}; 1619 1620int __devinit snd_emu10k1_create(struct snd_card *card, 1621 struct pci_dev *pci, 1622 unsigned short extin_mask, 1623 unsigned short extout_mask, 1624 long max_cache_bytes, 1625 int enable_ir, 1626 uint subsystem, 1627 struct snd_emu10k1 **remu) 1628{ 1629 struct snd_emu10k1 *emu; 1630 int idx, err; 1631 int is_audigy; 1632 unsigned int silent_page; 1633 const struct snd_emu_chip_details *c; 1634 static struct snd_device_ops ops = { 1635 .dev_free = snd_emu10k1_dev_free, 1636 }; 1637 1638 *remu = NULL; 1639 1640 /* enable PCI device */ 1641 err = pci_enable_device(pci); 1642 if (err < 0) 1643 return err; 1644 1645 emu = kzalloc(sizeof(*emu), GFP_KERNEL); 1646 if (emu == NULL) { 1647 pci_disable_device(pci); 1648 return -ENOMEM; 1649 } 1650 emu->card = card; 1651 spin_lock_init(&emu->reg_lock); 1652 spin_lock_init(&emu->emu_lock); 1653 spin_lock_init(&emu->spi_lock); 1654 spin_lock_init(&emu->i2c_lock); 1655 spin_lock_init(&emu->voice_lock); 1656 spin_lock_init(&emu->synth_lock); 1657 spin_lock_init(&emu->memblk_lock); 1658 mutex_init(&emu->fx8010.lock); 1659 INIT_LIST_HEAD(&emu->mapped_link_head); 1660 INIT_LIST_HEAD(&emu->mapped_order_link_head); 1661 emu->pci = pci; 1662 emu->irq = -1; 1663 emu->synth = NULL; 1664 emu->get_synth_voice = NULL; 1665 /* read revision & serial */ 1666 emu->revision = pci->revision; 1667 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial); 1668 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model); 1669 snd_printdd("vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", pci->vendor, pci->device, emu->serial, emu->model); 1670 1671 for (c = emu_chip_details; c->vendor; c++) { 1672 if (c->vendor == pci->vendor && c->device == pci->device) { 1673 if (subsystem) { 1674 if (c->subsystem && (c->subsystem == subsystem)) 1675 break; 1676 else 1677 continue; 1678 } else { 1679 if (c->subsystem && (c->subsystem != emu->serial)) 1680 continue; 1681 if (c->revision && c->revision != emu->revision) 1682 continue; 1683 } 1684 break; 1685 } 1686 } 1687 if (c->vendor == 0) { 1688 snd_printk(KERN_ERR "emu10k1: Card not recognised\n"); 1689 kfree(emu); 1690 pci_disable_device(pci); 1691 return -ENOENT; 1692 } 1693 emu->card_capabilities = c; 1694 if (c->subsystem && !subsystem) 1695 snd_printdd("Sound card name = %s\n", c->name); 1696 else if (subsystem) 1697 snd_printdd("Sound card name = %s, " 1698 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. " 1699 "Forced to subsystem = 0x%x\n", c->name, 1700 pci->vendor, pci->device, emu->serial, c->subsystem); 1701 else 1702 snd_printdd("Sound card name = %s, " 1703 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n", 1704 c->name, pci->vendor, pci->device, 1705 emu->serial); 1706 1707 if (!*card->id && c->id) { 1708 int i, n = 0; 1709 strlcpy(card->id, c->id, sizeof(card->id)); 1710 for (;;) { 1711 for (i = 0; i < snd_ecards_limit; i++) { 1712 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id)) 1713 break; 1714 } 1715 if (i >= snd_ecards_limit) 1716 break; 1717 n++; 1718 if (n >= SNDRV_CARDS) 1719 break; 1720 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n); 1721 } 1722 } 1723 1724 is_audigy = emu->audigy = c->emu10k2_chip; 1725 1726 /* set the DMA transfer mask */ 1727 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK; 1728 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 || 1729 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) { 1730 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask); 1731 kfree(emu); 1732 pci_disable_device(pci); 1733 return -ENXIO; 1734 } 1735 if (is_audigy) 1736 emu->gpr_base = A_FXGPREGBASE; 1737 else 1738 emu->gpr_base = FXGPREGBASE; 1739 1740 err = pci_request_regions(pci, "EMU10K1"); 1741 if (err < 0) { 1742 kfree(emu); 1743 pci_disable_device(pci); 1744 return err; 1745 } 1746 emu->port = pci_resource_start(pci, 0); 1747 1748 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT; 1749 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), 1750 32 * 1024, &emu->ptb_pages) < 0) { 1751 err = -ENOMEM; 1752 goto error; 1753 } 1754 1755 emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *)); 1756 emu->page_addr_table = vmalloc(emu->max_cache_pages * 1757 sizeof(unsigned long)); 1758 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) { 1759 err = -ENOMEM; 1760 goto error; 1761 } 1762 1763 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), 1764 EMUPAGESIZE, &emu->silent_page) < 0) { 1765 err = -ENOMEM; 1766 goto error; 1767 } 1768 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE); 1769 if (emu->memhdr == NULL) { 1770 err = -ENOMEM; 1771 goto error; 1772 } 1773 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) - 1774 sizeof(struct snd_util_memblk); 1775 1776 pci_set_master(pci); 1777 1778 emu->fx8010.fxbus_mask = 0x303f; 1779 if (extin_mask == 0) 1780 extin_mask = 0x3fcf; 1781 if (extout_mask == 0) 1782 extout_mask = 0x7fff; 1783 emu->fx8010.extin_mask = extin_mask; 1784 emu->fx8010.extout_mask = extout_mask; 1785 emu->enable_ir = enable_ir; 1786 1787 if (emu->card_capabilities->ca_cardbus_chip) { 1788 err = snd_emu10k1_cardbus_init(emu); 1789 if (err < 0) 1790 goto error; 1791 } 1792 if (emu->card_capabilities->ecard) { 1793 err = snd_emu10k1_ecard_init(emu); 1794 if (err < 0) 1795 goto error; 1796 } else if (emu->card_capabilities->emu_model) { 1797 err = snd_emu10k1_emu1010_init(emu); 1798 if (err < 0) { 1799 snd_emu10k1_free(emu); 1800 return err; 1801 } 1802 } else { 1803 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version 1804 does not support this, it shouldn't do any harm */ 1805 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, 1806 AC97SLOT_CNTR|AC97SLOT_LFE); 1807 } 1808 1809 /* initialize TRAM setup */ 1810 emu->fx8010.itram_size = (16 * 1024)/2; 1811 emu->fx8010.etram_pages.area = NULL; 1812 emu->fx8010.etram_pages.bytes = 0; 1813 1814 /* irq handler must be registered after I/O ports are activated */ 1815 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED, 1816 "EMU10K1", emu)) { 1817 err = -EBUSY; 1818 goto error; 1819 } 1820 emu->irq = pci->irq; 1821 1822 /* 1823 * Init to 0x02109204 : 1824 * Clock accuracy = 0 (1000ppm) 1825 * Sample Rate = 2 (48kHz) 1826 * Audio Channel = 1 (Left of 2) 1827 * Source Number = 0 (Unspecified) 1828 * Generation Status = 1 (Original for Cat Code 12) 1829 * Cat Code = 12 (Digital Signal Mixer) 1830 * Mode = 0 (Mode 0) 1831 * Emphasis = 0 (None) 1832 * CP = 1 (Copyright unasserted) 1833 * AN = 0 (Audio data) 1834 * P = 0 (Consumer) 1835 */ 1836 emu->spdif_bits[0] = emu->spdif_bits[1] = 1837 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1838 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1839 SPCS_GENERATIONSTATUS | 0x00001200 | 1840 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1841 1842 emu->reserved_page = (struct snd_emu10k1_memblk *) 1843 snd_emu10k1_synth_alloc(emu, 4096); 1844 if (emu->reserved_page) 1845 emu->reserved_page->map_locked = 1; 1846 1847 /* Clear silent pages and set up pointers */ 1848 memset(emu->silent_page.area, 0, PAGE_SIZE); 1849 silent_page = emu->silent_page.addr << 1; 1850 for (idx = 0; idx < MAXPAGES; idx++) 1851 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx); 1852 1853 /* set up voice indices */ 1854 for (idx = 0; idx < NUM_G; idx++) { 1855 emu->voices[idx].emu = emu; 1856 emu->voices[idx].number = idx; 1857 } 1858 1859 err = snd_emu10k1_init(emu, enable_ir, 0); 1860 if (err < 0) 1861 goto error; 1862#ifdef CONFIG_PM 1863 err = alloc_pm_buffer(emu); 1864 if (err < 0) 1865 goto error; 1866#endif 1867 1868 /* Initialize the effect engine */ 1869 err = snd_emu10k1_init_efx(emu); 1870 if (err < 0) 1871 goto error; 1872 snd_emu10k1_audio_enable(emu); 1873 1874 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops); 1875 if (err < 0) 1876 goto error; 1877 1878#ifdef CONFIG_PROC_FS 1879 snd_emu10k1_proc_init(emu); 1880#endif 1881 1882 snd_card_set_dev(card, &pci->dev); 1883 *remu = emu; 1884 return 0; 1885 1886 error: 1887 snd_emu10k1_free(emu); 1888 return err; 1889} 1890 1891#ifdef CONFIG_PM 1892static unsigned char saved_regs[] = { 1893 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP, 1894 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL, 1895 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2, 1896 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA, 1897 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2, 1898 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX, 1899 0xff /* end */ 1900}; 1901static unsigned char saved_regs_audigy[] = { 1902 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE, 1903 A_FXRT2, A_SENDAMOUNTS, A_FXRT1, 1904 0xff /* end */ 1905}; 1906 1907static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu) 1908{ 1909 int size; 1910 1911 size = ARRAY_SIZE(saved_regs); 1912 if (emu->audigy) 1913 size += ARRAY_SIZE(saved_regs_audigy); 1914 emu->saved_ptr = vmalloc(4 * NUM_G * size); 1915 if (!emu->saved_ptr) 1916 return -ENOMEM; 1917 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0) 1918 return -ENOMEM; 1919 if (emu->card_capabilities->ca0151_chip && 1920 snd_p16v_alloc_pm_buffer(emu) < 0) 1921 return -ENOMEM; 1922 return 0; 1923} 1924 1925static void free_pm_buffer(struct snd_emu10k1 *emu) 1926{ 1927 vfree(emu->saved_ptr); 1928 snd_emu10k1_efx_free_pm_buffer(emu); 1929 if (emu->card_capabilities->ca0151_chip) 1930 snd_p16v_free_pm_buffer(emu); 1931} 1932 1933void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu) 1934{ 1935 int i; 1936 unsigned char *reg; 1937 unsigned int *val; 1938 1939 val = emu->saved_ptr; 1940 for (reg = saved_regs; *reg != 0xff; reg++) 1941 for (i = 0; i < NUM_G; i++, val++) 1942 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1943 if (emu->audigy) { 1944 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1945 for (i = 0; i < NUM_G; i++, val++) 1946 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1947 } 1948 if (emu->audigy) 1949 emu->saved_a_iocfg = inl(emu->port + A_IOCFG); 1950 emu->saved_hcfg = inl(emu->port + HCFG); 1951} 1952 1953void snd_emu10k1_resume_init(struct snd_emu10k1 *emu) 1954{ 1955 if (emu->card_capabilities->ca_cardbus_chip) 1956 snd_emu10k1_cardbus_init(emu); 1957 if (emu->card_capabilities->ecard) 1958 snd_emu10k1_ecard_init(emu); 1959 else if (emu->card_capabilities->emu_model) 1960 snd_emu10k1_emu1010_init(emu); 1961 else 1962 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE); 1963 snd_emu10k1_init(emu, emu->enable_ir, 1); 1964} 1965 1966void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu) 1967{ 1968 int i; 1969 unsigned char *reg; 1970 unsigned int *val; 1971 1972 snd_emu10k1_audio_enable(emu); 1973 1974 /* resore for spdif */ 1975 if (emu->audigy) 1976 outl(emu->saved_a_iocfg, emu->port + A_IOCFG); 1977 outl(emu->saved_hcfg, emu->port + HCFG); 1978 1979 val = emu->saved_ptr; 1980 for (reg = saved_regs; *reg != 0xff; reg++) 1981 for (i = 0; i < NUM_G; i++, val++) 1982 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1983 if (emu->audigy) { 1984 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1985 for (i = 0; i < NUM_G; i++, val++) 1986 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1987 } 1988} 1989#endif 1990