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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/sound/pci/echoaudio/
1/***************************************************************************
2
3   Copyright Echo Digital Audio Corporation (c) 1998 - 2004
4   All rights reserved
5   www.echoaudio.com
6
7   This file is part of Echo Digital Audio's generic driver library.
8
9   Echo Digital Audio's generic driver library is free software;
10   you can redistribute it and/or modify it under the terms of
11   the GNU General Public License as published by the Free Software
12   Foundation.
13
14   This program is distributed in the hope that it will be useful,
15   but WITHOUT ANY WARRANTY; without even the implied warranty of
16   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17   GNU General Public License for more details.
18
19   You should have received a copy of the GNU General Public License
20   along with this program; if not, write to the Free Software
21   Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22   MA  02111-1307, USA.
23
24   *************************************************************************
25
26 Translation from C++ and adaptation for use in ALSA-Driver
27 were made by Giuliano Pochini <pochini@shiny.it>
28
29****************************************************************************/
30
31
32static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
33{
34	int err;
35
36	DE_INIT(("init_hw() - Darla20\n"));
37	if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA20))
38		return -ENODEV;
39
40	if ((err = init_dsp_comm_page(chip))) {
41		DE_INIT(("init_hw - could not initialize DSP comm page\n"));
42		return err;
43	}
44
45	chip->device_id = device_id;
46	chip->subdevice_id = subdevice_id;
47	chip->bad_board = TRUE;
48	chip->dsp_code_to_load = FW_DARLA20_DSP;
49	chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
50	chip->clock_state = GD_CLOCK_UNDEF;
51	/* Since this card has no ASIC, mark it as loaded so everything
52	   works OK */
53	chip->asic_loaded = TRUE;
54	chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
55
56	if ((err = load_firmware(chip)) < 0)
57		return err;
58	chip->bad_board = FALSE;
59
60	DE_INIT(("init_hw done\n"));
61	return err;
62}
63
64
65
66static int set_mixer_defaults(struct echoaudio *chip)
67{
68	return init_line_levels(chip);
69}
70
71
72
73/* The Darla20 has no external clock sources */
74static u32 detect_input_clocks(const struct echoaudio *chip)
75{
76	return ECHO_CLOCK_BIT_INTERNAL;
77}
78
79
80
81/* The Darla20 has no ASIC. Just do nothing */
82static int load_asic(struct echoaudio *chip)
83{
84	return 0;
85}
86
87
88
89static int set_sample_rate(struct echoaudio *chip, u32 rate)
90{
91	u8 clock_state, spdif_status;
92
93	if (wait_handshake(chip))
94		return -EIO;
95
96	switch (rate) {
97	case 44100:
98		clock_state = GD_CLOCK_44;
99		spdif_status = GD_SPDIF_STATUS_44;
100		break;
101	case 48000:
102		clock_state = GD_CLOCK_48;
103		spdif_status = GD_SPDIF_STATUS_48;
104		break;
105	default:
106		clock_state = GD_CLOCK_NOCHANGE;
107		spdif_status = GD_SPDIF_STATUS_NOCHANGE;
108		break;
109	}
110
111	if (chip->clock_state == clock_state)
112		clock_state = GD_CLOCK_NOCHANGE;
113	if (spdif_status == chip->spdif_status)
114		spdif_status = GD_SPDIF_STATUS_NOCHANGE;
115
116	chip->comm_page->sample_rate = cpu_to_le32(rate);
117	chip->comm_page->gd_clock_state = clock_state;
118	chip->comm_page->gd_spdif_status = spdif_status;
119	chip->comm_page->gd_resampler_state = 3;	/* magic number - should always be 3 */
120
121	/* Save the new audio state if it changed */
122	if (clock_state != GD_CLOCK_NOCHANGE)
123		chip->clock_state = clock_state;
124	if (spdif_status != GD_SPDIF_STATUS_NOCHANGE)
125		chip->spdif_status = spdif_status;
126	chip->sample_rate = rate;
127
128	clear_handshake(chip);
129	return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
130}
131