1/* 2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 3 * Universal interface for Audio Codec '97 4 * 5 * For more details look to AC '97 component specification revision 2.2 6 * by Intel Corporation (http://developer.intel.com) and to datasheets 7 * for specific codecs. 8 * 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 */ 25 26#include <linux/delay.h> 27#include <linux/init.h> 28#include <linux/slab.h> 29#include <linux/mutex.h> 30 31#include <sound/core.h> 32#include <sound/pcm.h> 33#include <sound/control.h> 34#include <sound/ac97_codec.h> 35#include <sound/asoundef.h> 36#include "ac97_id.h" 37#include "ac97_local.h" 38 39/* 40 * PCM support 41 */ 42 43static unsigned char rate_reg_tables[2][4][9] = { 44{ 45 /* standard rates */ 46 { 47 /* 3&4 front, 7&8 rear, 6&9 center/lfe */ 48 AC97_PCM_FRONT_DAC_RATE, /* slot 3 */ 49 AC97_PCM_FRONT_DAC_RATE, /* slot 4 */ 50 0xff, /* slot 5 */ 51 AC97_PCM_LFE_DAC_RATE, /* slot 6 */ 52 AC97_PCM_SURR_DAC_RATE, /* slot 7 */ 53 AC97_PCM_SURR_DAC_RATE, /* slot 8 */ 54 AC97_PCM_LFE_DAC_RATE, /* slot 9 */ 55 0xff, /* slot 10 */ 56 0xff, /* slot 11 */ 57 }, 58 { 59 /* 7&8 front, 6&9 rear, 10&11 center/lfe */ 60 0xff, /* slot 3 */ 61 0xff, /* slot 4 */ 62 0xff, /* slot 5 */ 63 AC97_PCM_SURR_DAC_RATE, /* slot 6 */ 64 AC97_PCM_FRONT_DAC_RATE, /* slot 7 */ 65 AC97_PCM_FRONT_DAC_RATE, /* slot 8 */ 66 AC97_PCM_SURR_DAC_RATE, /* slot 9 */ 67 AC97_PCM_LFE_DAC_RATE, /* slot 10 */ 68 AC97_PCM_LFE_DAC_RATE, /* slot 11 */ 69 }, 70 { 71 /* 6&9 front, 10&11 rear, 3&4 center/lfe */ 72 AC97_PCM_LFE_DAC_RATE, /* slot 3 */ 73 AC97_PCM_LFE_DAC_RATE, /* slot 4 */ 74 0xff, /* slot 5 */ 75 AC97_PCM_FRONT_DAC_RATE, /* slot 6 */ 76 0xff, /* slot 7 */ 77 0xff, /* slot 8 */ 78 AC97_PCM_FRONT_DAC_RATE, /* slot 9 */ 79 AC97_PCM_SURR_DAC_RATE, /* slot 10 */ 80 AC97_PCM_SURR_DAC_RATE, /* slot 11 */ 81 }, 82 { 83 /* 10&11 front, 3&4 rear, 7&8 center/lfe */ 84 AC97_PCM_SURR_DAC_RATE, /* slot 3 */ 85 AC97_PCM_SURR_DAC_RATE, /* slot 4 */ 86 0xff, /* slot 5 */ 87 0xff, /* slot 6 */ 88 AC97_PCM_LFE_DAC_RATE, /* slot 7 */ 89 AC97_PCM_LFE_DAC_RATE, /* slot 8 */ 90 0xff, /* slot 9 */ 91 AC97_PCM_FRONT_DAC_RATE, /* slot 10 */ 92 AC97_PCM_FRONT_DAC_RATE, /* slot 11 */ 93 }, 94}, 95{ 96 /* double rates */ 97 { 98 /* 3&4 front, 7&8 front (t+1) */ 99 AC97_PCM_FRONT_DAC_RATE, /* slot 3 */ 100 AC97_PCM_FRONT_DAC_RATE, /* slot 4 */ 101 0xff, /* slot 5 */ 102 0xff, /* slot 6 */ 103 AC97_PCM_FRONT_DAC_RATE, /* slot 7 */ 104 AC97_PCM_FRONT_DAC_RATE, /* slot 8 */ 105 0xff, /* slot 9 */ 106 0xff, /* slot 10 */ 107 0xff, /* slot 11 */ 108 }, 109 { 110 /* not specified in the specification */ 111 0xff, /* slot 3 */ 112 0xff, /* slot 4 */ 113 0xff, /* slot 5 */ 114 0xff, /* slot 6 */ 115 0xff, /* slot 7 */ 116 0xff, /* slot 8 */ 117 0xff, /* slot 9 */ 118 0xff, /* slot 10 */ 119 0xff, /* slot 11 */ 120 }, 121 { 122 0xff, /* slot 3 */ 123 0xff, /* slot 4 */ 124 0xff, /* slot 5 */ 125 0xff, /* slot 6 */ 126 0xff, /* slot 7 */ 127 0xff, /* slot 8 */ 128 0xff, /* slot 9 */ 129 0xff, /* slot 10 */ 130 0xff, /* slot 11 */ 131 }, 132 { 133 0xff, /* slot 3 */ 134 0xff, /* slot 4 */ 135 0xff, /* slot 5 */ 136 0xff, /* slot 6 */ 137 0xff, /* slot 7 */ 138 0xff, /* slot 8 */ 139 0xff, /* slot 9 */ 140 0xff, /* slot 10 */ 141 0xff, /* slot 11 */ 142 } 143}}; 144 145static unsigned char rate_cregs[9] = { 146 AC97_PCM_LR_ADC_RATE, /* 3 */ 147 AC97_PCM_LR_ADC_RATE, /* 4 */ 148 0xff, /* 5 */ 149 AC97_PCM_MIC_ADC_RATE, /* 6 */ 150 0xff, /* 7 */ 151 0xff, /* 8 */ 152 0xff, /* 9 */ 153 0xff, /* 10 */ 154 0xff, /* 11 */ 155}; 156 157static unsigned char get_slot_reg(struct ac97_pcm *pcm, unsigned short cidx, 158 unsigned short slot, int dbl) 159{ 160 if (slot < 3) 161 return 0xff; 162 if (slot > 11) 163 return 0xff; 164 if (pcm->spdif) 165 return AC97_SPDIF; /* pseudo register */ 166 if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK) 167 return rate_reg_tables[dbl][pcm->r[dbl].rate_table[cidx]][slot - 3]; 168 else 169 return rate_cregs[slot - 3]; 170} 171 172static int set_spdif_rate(struct snd_ac97 *ac97, unsigned short rate) 173{ 174 unsigned short old, bits, reg, mask; 175 unsigned int sbits; 176 177 if (! (ac97->ext_id & AC97_EI_SPDIF)) 178 return -ENODEV; 179 180 /* TODO: double rate support */ 181 if (ac97->flags & AC97_CS_SPDIF) { 182 switch (rate) { 183 case 48000: bits = 0; break; 184 case 44100: bits = 1 << AC97_SC_SPSR_SHIFT; break; 185 default: /* invalid - disable output */ 186 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 187 return -EINVAL; 188 } 189 reg = AC97_CSR_SPDIF; 190 mask = 1 << AC97_SC_SPSR_SHIFT; 191 } else { 192 if (ac97->id == AC97_ID_CM9739 && rate != 48000) { 193 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 194 return -EINVAL; 195 } 196 switch (rate) { 197 case 44100: bits = AC97_SC_SPSR_44K; break; 198 case 48000: bits = AC97_SC_SPSR_48K; break; 199 case 32000: bits = AC97_SC_SPSR_32K; break; 200 default: /* invalid - disable output */ 201 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 202 return -EINVAL; 203 } 204 reg = AC97_SPDIF; 205 mask = AC97_SC_SPSR_MASK; 206 } 207 208 mutex_lock(&ac97->reg_mutex); 209 old = snd_ac97_read(ac97, reg) & mask; 210 if (old != bits) { 211 snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 212 snd_ac97_update_bits_nolock(ac97, reg, mask, bits); 213 /* update the internal spdif bits */ 214 sbits = ac97->spdif_status; 215 if (sbits & IEC958_AES0_PROFESSIONAL) { 216 sbits &= ~IEC958_AES0_PRO_FS; 217 switch (rate) { 218 case 44100: sbits |= IEC958_AES0_PRO_FS_44100; break; 219 case 48000: sbits |= IEC958_AES0_PRO_FS_48000; break; 220 case 32000: sbits |= IEC958_AES0_PRO_FS_32000; break; 221 } 222 } else { 223 sbits &= ~(IEC958_AES3_CON_FS << 24); 224 switch (rate) { 225 case 44100: sbits |= IEC958_AES3_CON_FS_44100<<24; break; 226 case 48000: sbits |= IEC958_AES3_CON_FS_48000<<24; break; 227 case 32000: sbits |= IEC958_AES3_CON_FS_32000<<24; break; 228 } 229 } 230 ac97->spdif_status = sbits; 231 } 232 snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF); 233 mutex_unlock(&ac97->reg_mutex); 234 return 0; 235} 236 237/** 238 * snd_ac97_set_rate - change the rate of the given input/output. 239 * @ac97: the ac97 instance 240 * @reg: the register to change 241 * @rate: the sample rate to set 242 * 243 * Changes the rate of the given input/output on the codec. 244 * If the codec doesn't support VAR, the rate must be 48000 (except 245 * for SPDIF). 246 * 247 * The valid registers are AC97_PMC_MIC_ADC_RATE, 248 * AC97_PCM_FRONT_DAC_RATE, AC97_PCM_LR_ADC_RATE. 249 * AC97_PCM_SURR_DAC_RATE and AC97_PCM_LFE_DAC_RATE are accepted 250 * if the codec supports them. 251 * AC97_SPDIF is accepted as a pseudo register to modify the SPDIF 252 * status bits. 253 * 254 * Returns zero if successful, or a negative error code on failure. 255 */ 256int snd_ac97_set_rate(struct snd_ac97 *ac97, int reg, unsigned int rate) 257{ 258 int dbl; 259 unsigned int tmp; 260 261 dbl = rate > 48000; 262 if (dbl) { 263 if (!(ac97->flags & AC97_DOUBLE_RATE)) 264 return -EINVAL; 265 if (reg != AC97_PCM_FRONT_DAC_RATE) 266 return -EINVAL; 267 } 268 269 snd_ac97_update_power(ac97, reg, 1); 270 switch (reg) { 271 case AC97_PCM_MIC_ADC_RATE: 272 if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRM) == 0) /* MIC VRA */ 273 if (rate != 48000) 274 return -EINVAL; 275 break; 276 case AC97_PCM_FRONT_DAC_RATE: 277 case AC97_PCM_LR_ADC_RATE: 278 if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRA) == 0) /* VRA */ 279 if (rate != 48000 && rate != 96000) 280 return -EINVAL; 281 break; 282 case AC97_PCM_SURR_DAC_RATE: 283 if (! (ac97->scaps & AC97_SCAP_SURROUND_DAC)) 284 return -EINVAL; 285 break; 286 case AC97_PCM_LFE_DAC_RATE: 287 if (! (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)) 288 return -EINVAL; 289 break; 290 case AC97_SPDIF: 291 /* special case */ 292 return set_spdif_rate(ac97, rate); 293 default: 294 return -EINVAL; 295 } 296 if (dbl) 297 rate /= 2; 298 tmp = (rate * ac97->bus->clock) / 48000; 299 if (tmp > 65535) 300 return -EINVAL; 301 if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) 302 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, 303 AC97_EA_DRA, dbl ? AC97_EA_DRA : 0); 304 snd_ac97_update(ac97, reg, tmp & 0xffff); 305 snd_ac97_read(ac97, reg); 306 if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) { 307 /* Intel controllers require double rate data to be put in 308 * slots 7+8 309 */ 310 snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE, 311 AC97_GP_DRSS_MASK, 312 dbl ? AC97_GP_DRSS_78 : 0); 313 snd_ac97_read(ac97, AC97_GENERAL_PURPOSE); 314 } 315 return 0; 316} 317 318EXPORT_SYMBOL(snd_ac97_set_rate); 319 320static unsigned short get_pslots(struct snd_ac97 *ac97, unsigned char *rate_table, unsigned short *spdif_slots) 321{ 322 if (!ac97_is_audio(ac97)) 323 return 0; 324 if (ac97_is_rev22(ac97) || ac97_can_amap(ac97)) { 325 unsigned short slots = 0; 326 if (ac97_is_rev22(ac97)) { 327 /* Note: it's simply emulation of AMAP behaviour */ 328 u16 es; 329 es = ac97->regs[AC97_EXTENDED_ID] &= ~AC97_EI_DACS_SLOT_MASK; 330 switch (ac97->addr) { 331 case 1: 332 case 2: es |= (1<<AC97_EI_DACS_SLOT_SHIFT); break; 333 case 3: es |= (2<<AC97_EI_DACS_SLOT_SHIFT); break; 334 } 335 snd_ac97_write_cache(ac97, AC97_EXTENDED_ID, es); 336 } 337 switch (ac97->addr) { 338 case 0: 339 slots |= (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT); 340 if (ac97->scaps & AC97_SCAP_SURROUND_DAC) 341 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT); 342 if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC) 343 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 344 if (ac97->ext_id & AC97_EI_SPDIF) { 345 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC)) 346 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT); 347 else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)) 348 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1); 349 else 350 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 351 } 352 *rate_table = 0; 353 break; 354 case 1: 355 case 2: 356 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT); 357 if (ac97->scaps & AC97_SCAP_SURROUND_DAC) 358 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 359 if (ac97->ext_id & AC97_EI_SPDIF) { 360 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC)) 361 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1); 362 else 363 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 364 } 365 *rate_table = 1; 366 break; 367 case 3: 368 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 369 if (ac97->ext_id & AC97_EI_SPDIF) 370 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 371 *rate_table = 2; 372 break; 373 } 374 return slots; 375 } else { 376 unsigned short slots; 377 slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT); 378 if (ac97->scaps & AC97_SCAP_SURROUND_DAC) 379 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT); 380 if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC) 381 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 382 if (ac97->ext_id & AC97_EI_SPDIF) { 383 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC)) 384 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT); 385 else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)) 386 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1); 387 else 388 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 389 } 390 *rate_table = 0; 391 return slots; 392 } 393} 394 395static unsigned short get_cslots(struct snd_ac97 *ac97) 396{ 397 unsigned short slots; 398 399 if (!ac97_is_audio(ac97)) 400 return 0; 401 slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT); 402 slots |= (1<<AC97_SLOT_MIC); 403 return slots; 404} 405 406static unsigned int get_rates(struct ac97_pcm *pcm, unsigned int cidx, unsigned short slots, int dbl) 407{ 408 int i, idx; 409 unsigned int rates = ~0; 410 unsigned char reg; 411 412 for (i = 3; i < 12; i++) { 413 if (!(slots & (1 << i))) 414 continue; 415 reg = get_slot_reg(pcm, cidx, i, dbl); 416 switch (reg) { 417 case AC97_PCM_FRONT_DAC_RATE: idx = AC97_RATES_FRONT_DAC; break; 418 case AC97_PCM_SURR_DAC_RATE: idx = AC97_RATES_SURR_DAC; break; 419 case AC97_PCM_LFE_DAC_RATE: idx = AC97_RATES_LFE_DAC; break; 420 case AC97_PCM_LR_ADC_RATE: idx = AC97_RATES_ADC; break; 421 case AC97_PCM_MIC_ADC_RATE: idx = AC97_RATES_MIC_ADC; break; 422 default: idx = AC97_RATES_SPDIF; break; 423 } 424 rates &= pcm->r[dbl].codec[cidx]->rates[idx]; 425 } 426 if (!dbl) 427 rates &= ~(SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | 428 SNDRV_PCM_RATE_96000); 429 return rates; 430} 431 432int snd_ac97_pcm_assign(struct snd_ac97_bus *bus, 433 unsigned short pcms_count, 434 const struct ac97_pcm *pcms) 435{ 436 int i, j, k; 437 const struct ac97_pcm *pcm; 438 struct ac97_pcm *rpcms, *rpcm; 439 unsigned short avail_slots[2][4]; 440 unsigned char rate_table[2][4]; 441 unsigned short tmp, slots; 442 unsigned short spdif_slots[4]; 443 unsigned int rates; 444 struct snd_ac97 *codec; 445 446 rpcms = kcalloc(pcms_count, sizeof(struct ac97_pcm), GFP_KERNEL); 447 if (rpcms == NULL) 448 return -ENOMEM; 449 memset(avail_slots, 0, sizeof(avail_slots)); 450 memset(rate_table, 0, sizeof(rate_table)); 451 memset(spdif_slots, 0, sizeof(spdif_slots)); 452 for (i = 0; i < 4; i++) { 453 codec = bus->codec[i]; 454 if (!codec) 455 continue; 456 avail_slots[0][i] = get_pslots(codec, &rate_table[0][i], &spdif_slots[i]); 457 avail_slots[1][i] = get_cslots(codec); 458 if (!(codec->scaps & AC97_SCAP_INDEP_SDIN)) { 459 for (j = 0; j < i; j++) { 460 if (bus->codec[j]) 461 avail_slots[1][i] &= ~avail_slots[1][j]; 462 } 463 } 464 } 465 /* first step - exclusive devices */ 466 for (i = 0; i < pcms_count; i++) { 467 pcm = &pcms[i]; 468 rpcm = &rpcms[i]; 469 /* low-level driver thinks that it's more clever */ 470 if (pcm->copy_flag) { 471 *rpcm = *pcm; 472 continue; 473 } 474 rpcm->stream = pcm->stream; 475 rpcm->exclusive = pcm->exclusive; 476 rpcm->spdif = pcm->spdif; 477 rpcm->private_value = pcm->private_value; 478 rpcm->bus = bus; 479 rpcm->rates = ~0; 480 slots = pcm->r[0].slots; 481 for (j = 0; j < 4 && slots; j++) { 482 if (!bus->codec[j]) 483 continue; 484 rates = ~0; 485 if (pcm->spdif && pcm->stream == 0) 486 tmp = spdif_slots[j]; 487 else 488 tmp = avail_slots[pcm->stream][j]; 489 if (pcm->exclusive) { 490 /* exclusive access */ 491 tmp &= slots; 492 for (k = 0; k < i; k++) { 493 if (rpcm->stream == rpcms[k].stream) 494 tmp &= ~rpcms[k].r[0].rslots[j]; 495 } 496 } else { 497 /* non-exclusive access */ 498 tmp &= pcm->r[0].slots; 499 } 500 if (tmp) { 501 rpcm->r[0].rslots[j] = tmp; 502 rpcm->r[0].codec[j] = bus->codec[j]; 503 rpcm->r[0].rate_table[j] = rate_table[pcm->stream][j]; 504 if (bus->no_vra) 505 rates = SNDRV_PCM_RATE_48000; 506 else 507 rates = get_rates(rpcm, j, tmp, 0); 508 if (pcm->exclusive) 509 avail_slots[pcm->stream][j] &= ~tmp; 510 } 511 slots &= ~tmp; 512 rpcm->r[0].slots |= tmp; 513 rpcm->rates &= rates; 514 } 515 /* for double rate, we check the first codec only */ 516 if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK && 517 bus->codec[0] && (bus->codec[0]->flags & AC97_DOUBLE_RATE) && 518 rate_table[pcm->stream][0] == 0) { 519 tmp = (1<<AC97_SLOT_PCM_LEFT) | (1<<AC97_SLOT_PCM_RIGHT) | 520 (1<<AC97_SLOT_PCM_LEFT_0) | (1<<AC97_SLOT_PCM_RIGHT_0); 521 if ((tmp & pcm->r[1].slots) == tmp) { 522 rpcm->r[1].slots = tmp; 523 rpcm->r[1].rslots[0] = tmp; 524 rpcm->r[1].rate_table[0] = 0; 525 rpcm->r[1].codec[0] = bus->codec[0]; 526 if (pcm->exclusive) 527 avail_slots[pcm->stream][0] &= ~tmp; 528 if (bus->no_vra) 529 rates = SNDRV_PCM_RATE_96000; 530 else 531 rates = get_rates(rpcm, 0, tmp, 1); 532 rpcm->rates |= rates; 533 } 534 } 535 if (rpcm->rates == ~0) 536 rpcm->rates = 0; /* not used */ 537 } 538 bus->pcms_count = pcms_count; 539 bus->pcms = rpcms; 540 return 0; 541} 542 543EXPORT_SYMBOL(snd_ac97_pcm_assign); 544 545/** 546 * snd_ac97_pcm_open - opens the given AC97 pcm 547 * @pcm: the ac97 pcm instance 548 * @rate: rate in Hz, if codec does not support VRA, this value must be 48000Hz 549 * @cfg: output stream characteristics 550 * @slots: a subset of allocated slots (snd_ac97_pcm_assign) for this pcm 551 * 552 * It locks the specified slots and sets the given rate to AC97 registers. 553 */ 554int snd_ac97_pcm_open(struct ac97_pcm *pcm, unsigned int rate, 555 enum ac97_pcm_cfg cfg, unsigned short slots) 556{ 557 struct snd_ac97_bus *bus; 558 int i, cidx, r, ok_flag; 559 unsigned int reg_ok[4] = {0,0,0,0}; 560 unsigned char reg; 561 int err = 0; 562 563 r = rate > 48000; 564 bus = pcm->bus; 565 if (cfg == AC97_PCM_CFG_SPDIF) { 566 for (cidx = 0; cidx < 4; cidx++) 567 if (bus->codec[cidx] && (bus->codec[cidx]->ext_id & AC97_EI_SPDIF)) { 568 err = set_spdif_rate(bus->codec[cidx], rate); 569 if (err < 0) 570 return err; 571 } 572 } 573 spin_lock_irq(&pcm->bus->bus_lock); 574 for (i = 3; i < 12; i++) { 575 if (!(slots & (1 << i))) 576 continue; 577 ok_flag = 0; 578 for (cidx = 0; cidx < 4; cidx++) { 579 if (bus->used_slots[pcm->stream][cidx] & (1 << i)) { 580 spin_unlock_irq(&pcm->bus->bus_lock); 581 err = -EBUSY; 582 goto error; 583 } 584 if (pcm->r[r].rslots[cidx] & (1 << i)) { 585 bus->used_slots[pcm->stream][cidx] |= (1 << i); 586 ok_flag++; 587 } 588 } 589 if (!ok_flag) { 590 spin_unlock_irq(&pcm->bus->bus_lock); 591 snd_printk(KERN_ERR "cannot find configuration for AC97 slot %i\n", i); 592 err = -EAGAIN; 593 goto error; 594 } 595 } 596 pcm->cur_dbl = r; 597 spin_unlock_irq(&pcm->bus->bus_lock); 598 for (i = 3; i < 12; i++) { 599 if (!(slots & (1 << i))) 600 continue; 601 for (cidx = 0; cidx < 4; cidx++) { 602 if (pcm->r[r].rslots[cidx] & (1 << i)) { 603 reg = get_slot_reg(pcm, cidx, i, r); 604 if (reg == 0xff) { 605 snd_printk(KERN_ERR "invalid AC97 slot %i?\n", i); 606 continue; 607 } 608 if (reg_ok[cidx] & (1 << (reg - AC97_PCM_FRONT_DAC_RATE))) 609 continue; 610 //printk(KERN_DEBUG "setting ac97 reg 0x%x to rate %d\n", reg, rate); 611 err = snd_ac97_set_rate(pcm->r[r].codec[cidx], reg, rate); 612 if (err < 0) 613 snd_printk(KERN_ERR "error in snd_ac97_set_rate: cidx=%d, reg=0x%x, rate=%d, err=%d\n", cidx, reg, rate, err); 614 else 615 reg_ok[cidx] |= (1 << (reg - AC97_PCM_FRONT_DAC_RATE)); 616 } 617 } 618 } 619 pcm->aslots = slots; 620 return 0; 621 622 error: 623 pcm->aslots = slots; 624 snd_ac97_pcm_close(pcm); 625 return err; 626} 627 628EXPORT_SYMBOL(snd_ac97_pcm_open); 629 630/** 631 * snd_ac97_pcm_close - closes the given AC97 pcm 632 * @pcm: the ac97 pcm instance 633 * 634 * It frees the locked AC97 slots. 635 */ 636int snd_ac97_pcm_close(struct ac97_pcm *pcm) 637{ 638 struct snd_ac97_bus *bus; 639 unsigned short slots = pcm->aslots; 640 int i, cidx; 641 642#ifdef CONFIG_SND_AC97_POWER_SAVE 643 int r = pcm->cur_dbl; 644 for (i = 3; i < 12; i++) { 645 if (!(slots & (1 << i))) 646 continue; 647 for (cidx = 0; cidx < 4; cidx++) { 648 if (pcm->r[r].rslots[cidx] & (1 << i)) { 649 int reg = get_slot_reg(pcm, cidx, i, r); 650 snd_ac97_update_power(pcm->r[r].codec[cidx], 651 reg, 0); 652 } 653 } 654 } 655#endif 656 657 bus = pcm->bus; 658 spin_lock_irq(&pcm->bus->bus_lock); 659 for (i = 3; i < 12; i++) { 660 if (!(slots & (1 << i))) 661 continue; 662 for (cidx = 0; cidx < 4; cidx++) 663 bus->used_slots[pcm->stream][cidx] &= ~(1 << i); 664 } 665 pcm->aslots = 0; 666 pcm->cur_dbl = 0; 667 spin_unlock_irq(&pcm->bus->bus_lock); 668 return 0; 669} 670 671EXPORT_SYMBOL(snd_ac97_pcm_close); 672 673static int double_rate_hw_constraint_rate(struct snd_pcm_hw_params *params, 674 struct snd_pcm_hw_rule *rule) 675{ 676 struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 677 if (channels->min > 2) { 678 static const struct snd_interval single_rates = { 679 .min = 1, 680 .max = 48000, 681 }; 682 struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 683 return snd_interval_refine(rate, &single_rates); 684 } 685 return 0; 686} 687 688static int double_rate_hw_constraint_channels(struct snd_pcm_hw_params *params, 689 struct snd_pcm_hw_rule *rule) 690{ 691 struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 692 if (rate->min > 48000) { 693 static const struct snd_interval double_rate_channels = { 694 .min = 2, 695 .max = 2, 696 }; 697 struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 698 return snd_interval_refine(channels, &double_rate_channels); 699 } 700 return 0; 701} 702 703/** 704 * snd_ac97_pcm_double_rate_rules - set double rate constraints 705 * @runtime: the runtime of the ac97 front playback pcm 706 * 707 * Installs the hardware constraint rules to prevent using double rates and 708 * more than two channels at the same time. 709 */ 710int snd_ac97_pcm_double_rate_rules(struct snd_pcm_runtime *runtime) 711{ 712 int err; 713 714 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 715 double_rate_hw_constraint_rate, NULL, 716 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 717 if (err < 0) 718 return err; 719 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 720 double_rate_hw_constraint_channels, NULL, 721 SNDRV_PCM_HW_PARAM_RATE, -1); 722 return err; 723} 724 725EXPORT_SYMBOL(snd_ac97_pcm_double_rate_rules); 726