1/* 2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program; if not, write to the Free Software Foundation, Inc., 17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * 20 * File: mac.c 21 * 22 * Purpose: MAC routines 23 * 24 * Author: Tevin Chen 25 * 26 * Date: May 21, 1996 27 * 28 * Functions: 29 * MACvReadAllRegs - Read All MAC Registers to buffer 30 * MACbIsRegBitsOn - Test if All test Bits On 31 * MACbIsRegBitsOff - Test if All test Bits Off 32 * MACbIsIntDisable - Test if MAC interrupt disable 33 * MACbyReadMultiAddr - Read Multicast Address Mask Pattern 34 * MACvWriteMultiAddr - Write Multicast Address Mask Pattern 35 * MACvSetMultiAddrByHash - Set Multicast Address Mask by Hash value 36 * MACvResetMultiAddrByHash - Clear Multicast Address Mask by Hash value 37 * MACvSetRxThreshold - Set Rx Threshold value 38 * MACvGetRxThreshold - Get Rx Threshold value 39 * MACvSetTxThreshold - Set Tx Threshold value 40 * MACvGetTxThreshold - Get Tx Threshold value 41 * MACvSetDmaLength - Set Dma Length value 42 * MACvGetDmaLength - Get Dma Length value 43 * MACvSetShortRetryLimit - Set 802.11 Short Retry limit 44 * MACvGetShortRetryLimit - Get 802.11 Short Retry limit 45 * MACvSetLongRetryLimit - Set 802.11 Long Retry limit 46 * MACvGetLongRetryLimit - Get 802.11 Long Retry limit 47 * MACvSetLoopbackMode - Set MAC Loopback Mode 48 * MACbIsInLoopbackMode - Test if MAC in Loopback mode 49 * MACvSetPacketFilter - Set MAC Address Filter 50 * MACvSaveContext - Save Context of MAC Registers 51 * MACvRestoreContext - Restore Context of MAC Registers 52 * MACbCompareContext - Compare if values of MAC Registers same as Context 53 * MACbSoftwareReset - Software Reset MAC 54 * MACbSafeRxOff - Turn Off MAC Rx 55 * MACbSafeTxOff - Turn Off MAC Tx 56 * MACbSafeStop - Stop MAC function 57 * MACbShutdown - Shut down MAC 58 * MACvInitialize - Initialize MAC 59 * MACvSetCurrRxDescAddr - Set Rx Descriptos Address 60 * MACvSetCurrTx0DescAddr - Set Tx0 Descriptos Address 61 * MACvSetCurrTx1DescAddr - Set Tx1 Descriptos Address 62 * MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC 63 * 64 * Revision History: 65 * 08-22-2003 Kyle Hsu : Porting MAC functions from sim53 66 * 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& MACvEnableBusSusEn() 67 * 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry 68 * 69 */ 70 71#include "tmacro.h" 72#include "tether.h" 73#include "mac.h" 74 75unsigned short TxRate_iwconfig;//2008-5-8 <add> by chester 76/*--------------------- Static Definitions -------------------------*/ 77//static int msglevel =MSG_LEVEL_DEBUG; 78static int msglevel =MSG_LEVEL_INFO; 79/*--------------------- Static Classes ----------------------------*/ 80 81/*--------------------- Static Variables --------------------------*/ 82 83/*--------------------- Static Functions --------------------------*/ 84 85/*--------------------- Export Variables --------------------------*/ 86 87/*--------------------- Export Functions --------------------------*/ 88 89 90 91 92 93/* 94 * Description: 95 * Read All MAC Registers to buffer 96 * 97 * Parameters: 98 * In: 99 * dwIoBase - Base Address for MAC 100 * Out: 101 * pbyMacRegs - buffer to read 102 * 103 * Return Value: none 104 * 105 */ 106void MACvReadAllRegs (unsigned long dwIoBase, unsigned char *pbyMacRegs) 107{ 108 int ii; 109 110 // read page0 register 111 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++) { 112 VNSvInPortB(dwIoBase + ii, pbyMacRegs); 113 pbyMacRegs++; 114 } 115 116 MACvSelectPage1(dwIoBase); 117 118 // read page1 register 119 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) { 120 VNSvInPortB(dwIoBase + ii, pbyMacRegs); 121 pbyMacRegs++; 122 } 123 124 MACvSelectPage0(dwIoBase); 125 126} 127 128/* 129 * Description: 130 * Test if all test bits on 131 * 132 * Parameters: 133 * In: 134 * dwIoBase - Base Address for MAC 135 * byRegOfs - Offset of MAC Register 136 * byTestBits - Test bits 137 * Out: 138 * none 139 * 140 * Return Value: true if all test bits On; otherwise false 141 * 142 */ 143bool MACbIsRegBitsOn (unsigned long dwIoBase, unsigned char byRegOfs, unsigned char byTestBits) 144{ 145 unsigned char byData; 146 147 VNSvInPortB(dwIoBase + byRegOfs, &byData); 148 return (byData & byTestBits) == byTestBits; 149} 150 151/* 152 * Description: 153 * Test if all test bits off 154 * 155 * Parameters: 156 * In: 157 * dwIoBase - Base Address for MAC 158 * byRegOfs - Offset of MAC Register 159 * byTestBits - Test bits 160 * Out: 161 * none 162 * 163 * Return Value: true if all test bits Off; otherwise false 164 * 165 */ 166bool MACbIsRegBitsOff (unsigned long dwIoBase, unsigned char byRegOfs, unsigned char byTestBits) 167{ 168 unsigned char byData; 169 170 VNSvInPortB(dwIoBase + byRegOfs, &byData); 171 return !(byData & byTestBits); 172} 173 174/* 175 * Description: 176 * Test if MAC interrupt disable 177 * 178 * Parameters: 179 * In: 180 * dwIoBase - Base Address for MAC 181 * Out: 182 * none 183 * 184 * Return Value: true if interrupt is disable; otherwise false 185 * 186 */ 187bool MACbIsIntDisable (unsigned long dwIoBase) 188{ 189 unsigned long dwData; 190 191 VNSvInPortD(dwIoBase + MAC_REG_IMR, &dwData); 192 if (dwData != 0) 193 return false; 194 195 return true; 196} 197 198/* 199 * Description: 200 * Read MAC Multicast Address Mask 201 * 202 * Parameters: 203 * In: 204 * dwIoBase - Base Address for MAC 205 * uByteidx - Index of Mask 206 * Out: 207 * none 208 * 209 * Return Value: Mask Value read 210 * 211 */ 212unsigned char MACbyReadMultiAddr (unsigned long dwIoBase, unsigned int uByteIdx) 213{ 214 unsigned char byData; 215 216 MACvSelectPage1(dwIoBase); 217 VNSvInPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, &byData); 218 MACvSelectPage0(dwIoBase); 219 return byData; 220} 221 222/* 223 * Description: 224 * Write MAC Multicast Address Mask 225 * 226 * Parameters: 227 * In: 228 * dwIoBase - Base Address for MAC 229 * uByteidx - Index of Mask 230 * byData - Mask Value to write 231 * Out: 232 * none 233 * 234 * Return Value: none 235 * 236 */ 237void MACvWriteMultiAddr (unsigned long dwIoBase, unsigned int uByteIdx, unsigned char byData) 238{ 239 MACvSelectPage1(dwIoBase); 240 VNSvOutPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, byData); 241 MACvSelectPage0(dwIoBase); 242} 243 244/* 245 * Description: 246 * Set this hash index into multicast address register bit 247 * 248 * Parameters: 249 * In: 250 * dwIoBase - Base Address for MAC 251 * byHashIdx - Hash index to set 252 * Out: 253 * none 254 * 255 * Return Value: none 256 * 257 */ 258void MACvSetMultiAddrByHash (unsigned long dwIoBase, unsigned char byHashIdx) 259{ 260 unsigned int uByteIdx; 261 unsigned char byBitMask; 262 unsigned char byOrgValue; 263 264 // calculate byte position 265 uByteIdx = byHashIdx / 8; 266 ASSERT(uByteIdx < 8); 267 // calculate bit position 268 byBitMask = 1; 269 byBitMask <<= (byHashIdx % 8); 270 // turn on the bit 271 byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx); 272 MACvWriteMultiAddr(dwIoBase, uByteIdx, (unsigned char)(byOrgValue | byBitMask)); 273} 274 275/* 276 * Description: 277 * Reset this hash index into multicast address register bit 278 * 279 * Parameters: 280 * In: 281 * dwIoBase - Base Address for MAC 282 * byHashIdx - Hash index to clear 283 * Out: 284 * none 285 * 286 * Return Value: none 287 * 288 */ 289void MACvResetMultiAddrByHash (unsigned long dwIoBase, unsigned char byHashIdx) 290{ 291 unsigned int uByteIdx; 292 unsigned char byBitMask; 293 unsigned char byOrgValue; 294 295 // calculate byte position 296 uByteIdx = byHashIdx / 8; 297 ASSERT(uByteIdx < 8); 298 // calculate bit position 299 byBitMask = 1; 300 byBitMask <<= (byHashIdx % 8); 301 // turn off the bit 302 byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx); 303 MACvWriteMultiAddr(dwIoBase, uByteIdx, (unsigned char)(byOrgValue & (~byBitMask))); 304} 305 306/* 307 * Description: 308 * Set Rx Threshold 309 * 310 * Parameters: 311 * In: 312 * dwIoBase - Base Address for MAC 313 * byThreshold - Threshold Value 314 * Out: 315 * none 316 * 317 * Return Value: none 318 * 319 */ 320void MACvSetRxThreshold (unsigned long dwIoBase, unsigned char byThreshold) 321{ 322 unsigned char byOrgValue; 323 324 ASSERT(byThreshold < 4); 325 326 // set FCR0 327 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue); 328 byOrgValue = (byOrgValue & 0xCF) | (byThreshold << 4); 329 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue); 330} 331 332/* 333 * Description: 334 * Get Rx Threshold 335 * 336 * Parameters: 337 * In: 338 * dwIoBase - Base Address for MAC 339 * Out: 340 * pbyThreshold- Threshold Value Get 341 * 342 * Return Value: none 343 * 344 */ 345void MACvGetRxThreshold (unsigned long dwIoBase, unsigned char *pbyThreshold) 346{ 347 // get FCR0 348 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold); 349 *pbyThreshold = (*pbyThreshold >> 4) & 0x03; 350} 351 352/* 353 * Description: 354 * Set Tx Threshold 355 * 356 * Parameters: 357 * In: 358 * dwIoBase - Base Address for MAC 359 * byThreshold - Threshold Value 360 * Out: 361 * none 362 * 363 * Return Value: none 364 * 365 */ 366void MACvSetTxThreshold (unsigned long dwIoBase, unsigned char byThreshold) 367{ 368 unsigned char byOrgValue; 369 370 ASSERT(byThreshold < 4); 371 372 // set FCR0 373 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue); 374 byOrgValue = (byOrgValue & 0xF3) | (byThreshold << 2); 375 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue); 376} 377 378/* 379 * Description: 380 * Get Tx Threshold 381 * 382 * Parameters: 383 * In: 384 * dwIoBase - Base Address for MAC 385 * Out: 386 * pbyThreshold- Threshold Value Get 387 * 388 * Return Value: none 389 * 390 */ 391void MACvGetTxThreshold (unsigned long dwIoBase, unsigned char *pbyThreshold) 392{ 393 // get FCR0 394 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold); 395 *pbyThreshold = (*pbyThreshold >> 2) & 0x03; 396} 397 398/* 399 * Description: 400 * Set Dma Length 401 * 402 * Parameters: 403 * In: 404 * dwIoBase - Base Address for MAC 405 * byDmaLength - Dma Length Value 406 * Out: 407 * none 408 * 409 * Return Value: none 410 * 411 */ 412void MACvSetDmaLength (unsigned long dwIoBase, unsigned char byDmaLength) 413{ 414 unsigned char byOrgValue; 415 416 ASSERT(byDmaLength < 4); 417 418 // set FCR0 419 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue); 420 byOrgValue = (byOrgValue & 0xFC) | byDmaLength; 421 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue); 422} 423 424/* 425 * Description: 426 * Get Dma Length 427 * 428 * Parameters: 429 * In: 430 * dwIoBase - Base Address for MAC 431 * Out: 432 * pbyDmaLength- Dma Length Value Get 433 * 434 * Return Value: none 435 * 436 */ 437void MACvGetDmaLength (unsigned long dwIoBase, unsigned char *pbyDmaLength) 438{ 439 // get FCR0 440 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyDmaLength); 441 *pbyDmaLength &= 0x03; 442} 443 444/* 445 * Description: 446 * Set 802.11 Short Retry Limit 447 * 448 * Parameters: 449 * In: 450 * dwIoBase - Base Address for MAC 451 * byRetryLimit- Retry Limit 452 * Out: 453 * none 454 * 455 * Return Value: none 456 * 457 */ 458void MACvSetShortRetryLimit (unsigned long dwIoBase, unsigned char byRetryLimit) 459{ 460 // set SRT 461 VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit); 462} 463 464/* 465 * Description: 466 * Get 802.11 Short Retry Limit 467 * 468 * Parameters: 469 * In: 470 * dwIoBase - Base Address for MAC 471 * Out: 472 * pbyRetryLimit - Retry Limit Get 473 * 474 * Return Value: none 475 * 476 */ 477void MACvGetShortRetryLimit (unsigned long dwIoBase, unsigned char *pbyRetryLimit) 478{ 479 // get SRT 480 VNSvInPortB(dwIoBase + MAC_REG_SRT, pbyRetryLimit); 481} 482 483/* 484 * Description: 485 * Set 802.11 Long Retry Limit 486 * 487 * Parameters: 488 * In: 489 * dwIoBase - Base Address for MAC 490 * byRetryLimit- Retry Limit 491 * Out: 492 * none 493 * 494 * Return Value: none 495 * 496 */ 497void MACvSetLongRetryLimit (unsigned long dwIoBase, unsigned char byRetryLimit) 498{ 499 // set LRT 500 VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit); 501} 502 503/* 504 * Description: 505 * Get 802.11 Long Retry Limit 506 * 507 * Parameters: 508 * In: 509 * dwIoBase - Base Address for MAC 510 * Out: 511 * pbyRetryLimit - Retry Limit Get 512 * 513 * Return Value: none 514 * 515 */ 516void MACvGetLongRetryLimit (unsigned long dwIoBase, unsigned char *pbyRetryLimit) 517{ 518 // get LRT 519 VNSvInPortB(dwIoBase + MAC_REG_LRT, pbyRetryLimit); 520} 521 522/* 523 * Description: 524 * Set MAC Loopback mode 525 * 526 * Parameters: 527 * In: 528 * dwIoBase - Base Address for MAC 529 * byLoopbackMode - Loopback Mode 530 * Out: 531 * none 532 * 533 * Return Value: none 534 * 535 */ 536void MACvSetLoopbackMode (unsigned long dwIoBase, unsigned char byLoopbackMode) 537{ 538 unsigned char byOrgValue; 539 540 ASSERT(byLoopbackMode < 3); 541 byLoopbackMode <<= 6; 542 // set TCR 543 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue); 544 byOrgValue = byOrgValue & 0x3F; 545 byOrgValue = byOrgValue | byLoopbackMode; 546 VNSvOutPortB(dwIoBase + MAC_REG_TEST, byOrgValue); 547} 548 549/* 550 * Description: 551 * Test if MAC in Loopback mode 552 * 553 * Parameters: 554 * In: 555 * dwIoBase - Base Address for MAC 556 * Out: 557 * none 558 * 559 * Return Value: true if in Loopback mode; otherwise false 560 * 561 */ 562bool MACbIsInLoopbackMode (unsigned long dwIoBase) 563{ 564 unsigned char byOrgValue; 565 566 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue); 567 if (byOrgValue & (TEST_LBINT | TEST_LBEXT)) 568 return true; 569 return false; 570} 571 572/* 573 * Description: 574 * Set MAC Address filter 575 * 576 * Parameters: 577 * In: 578 * dwIoBase - Base Address for MAC 579 * wFilterType - Filter Type 580 * Out: 581 * none 582 * 583 * Return Value: none 584 * 585 */ 586void MACvSetPacketFilter (unsigned long dwIoBase, unsigned short wFilterType) 587{ 588 unsigned char byOldRCR; 589 unsigned char byNewRCR = 0; 590 591 // if only in DIRECTED mode, multicast-address will set to zero, 592 // but if other mode exist (e.g. PROMISCUOUS), multicast-address 593 // will be open 594 if (wFilterType & PKT_TYPE_DIRECTED) { 595 // set multicast address to accept none 596 MACvSelectPage1(dwIoBase); 597 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0L); 598 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(unsigned long), 0L); 599 MACvSelectPage0(dwIoBase); 600 } 601 602 if (wFilterType & (PKT_TYPE_PROMISCUOUS | PKT_TYPE_ALL_MULTICAST)) { 603 // set multicast address to accept all 604 MACvSelectPage1(dwIoBase); 605 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0xFFFFFFFFL); 606 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(unsigned long), 0xFFFFFFFFL); 607 MACvSelectPage0(dwIoBase); 608 } 609 610 if (wFilterType & PKT_TYPE_PROMISCUOUS) { 611 612 byNewRCR |= (RCR_RXALLTYPE | RCR_UNICAST | RCR_MULTICAST | RCR_BROADCAST); 613 614 byNewRCR &= ~RCR_BSSID; 615 } 616 617 if (wFilterType & (PKT_TYPE_ALL_MULTICAST | PKT_TYPE_MULTICAST)) 618 byNewRCR |= RCR_MULTICAST; 619 620 if (wFilterType & PKT_TYPE_BROADCAST) 621 byNewRCR |= RCR_BROADCAST; 622 623 if (wFilterType & PKT_TYPE_ERROR_CRC) 624 byNewRCR |= RCR_ERRCRC; 625 626 VNSvInPortB(dwIoBase + MAC_REG_RCR, &byOldRCR); 627 if (byNewRCR != byOldRCR) { 628 // Modify the Receive Command Register 629 VNSvOutPortB(dwIoBase + MAC_REG_RCR, byNewRCR); 630 } 631} 632 633/* 634 * Description: 635 * Save MAC registers to context buffer 636 * 637 * Parameters: 638 * In: 639 * dwIoBase - Base Address for MAC 640 * Out: 641 * pbyCxtBuf - Context buffer 642 * 643 * Return Value: none 644 * 645 */ 646void MACvSaveContext (unsigned long dwIoBase, unsigned char *pbyCxtBuf) 647{ 648 int ii; 649 650 // read page0 register 651 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++) { 652 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii)); 653 } 654 655 MACvSelectPage1(dwIoBase); 656 657 // read page1 register 658 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) { 659 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii)); 660 } 661 662 MACvSelectPage0(dwIoBase); 663} 664 665/* 666 * Description: 667 * Restore MAC registers from context buffer 668 * 669 * Parameters: 670 * In: 671 * dwIoBase - Base Address for MAC 672 * pbyCxtBuf - Context buffer 673 * Out: 674 * none 675 * 676 * Return Value: none 677 * 678 */ 679void MACvRestoreContext (unsigned long dwIoBase, unsigned char *pbyCxtBuf) 680{ 681 int ii; 682 683 MACvSelectPage1(dwIoBase); 684 // restore page1 685 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) { 686 VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii)); 687 } 688 MACvSelectPage0(dwIoBase); 689 690 // restore RCR,TCR,IMR... 691 for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++) { 692 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii)); 693 } 694 // restore MAC Config. 695 for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++) { 696 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii)); 697 } 698 VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG)); 699 700 // restore PS Config. 701 for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++) { 702 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii)); 703 } 704 705 // restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR 706 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0)); 707 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR)); 708 VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_BCNDMAPTR)); 709 710 711 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0)); 712 713 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1)); 714 715} 716 717/* 718 * Description: 719 * Compare if MAC registers same as context buffer 720 * 721 * Parameters: 722 * In: 723 * dwIoBase - Base Address for MAC 724 * pbyCxtBuf - Context buffer 725 * Out: 726 * none 727 * 728 * Return Value: true if all values are the same; otherwise false 729 * 730 */ 731bool MACbCompareContext (unsigned long dwIoBase, unsigned char *pbyCxtBuf) 732{ 733 unsigned long dwData; 734 735 // compare MAC context to determine if this is a power lost init, 736 // return true for power remaining init, return false for power lost init 737 738 // compare CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR 739 VNSvInPortD(dwIoBase + MAC_REG_TXDMAPTR0, &dwData); 740 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0)) { 741 return false; 742 } 743 744 VNSvInPortD(dwIoBase + MAC_REG_AC0DMAPTR, &dwData); 745 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR)) { 746 return false; 747 } 748 749 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR0, &dwData); 750 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0)) { 751 return false; 752 } 753 754 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR1, &dwData); 755 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1)) { 756 return false; 757 } 758 759 760 return true; 761} 762 763/* 764 * Description: 765 * Software Reset MAC 766 * 767 * Parameters: 768 * In: 769 * dwIoBase - Base Address for MAC 770 * Out: 771 * none 772 * 773 * Return Value: true if Reset Success; otherwise false 774 * 775 */ 776bool MACbSoftwareReset (unsigned long dwIoBase) 777{ 778 unsigned char byData; 779 unsigned short ww; 780 781 // turn on HOSTCR_SOFTRST, just write 0x01 to reset 782 //MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_SOFTRST); 783 VNSvOutPortB(dwIoBase+ MAC_REG_HOSTCR, 0x01); 784 785 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 786 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData); 787 if ( !(byData & HOSTCR_SOFTRST)) 788 break; 789 } 790 if (ww == W_MAX_TIMEOUT) 791 return false; 792 return true; 793 794} 795 796/* 797 * Description: 798 * save some important register's value, then do reset, then restore register's value 799 * 800 * Parameters: 801 * In: 802 * dwIoBase - Base Address for MAC 803 * Out: 804 * none 805 * 806 * Return Value: true if success; otherwise false 807 * 808 */ 809bool MACbSafeSoftwareReset (unsigned long dwIoBase) 810{ 811 unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1]; 812 bool bRetVal; 813 814 // PATCH.... 815 // save some important register's value, then do 816 // reset, then restore register's value 817 818 // save MAC context 819 MACvSaveContext(dwIoBase, abyTmpRegData); 820 // do reset 821 bRetVal = MACbSoftwareReset(dwIoBase); 822 //BBvSoftwareReset(pDevice->PortOffset); 823 // restore MAC context, except CR0 824 MACvRestoreContext(dwIoBase, abyTmpRegData); 825 826 return bRetVal; 827} 828 829/* 830 * Description: 831 * Trun Off MAC Rx 832 * 833 * Parameters: 834 * In: 835 * dwIoBase - Base Address for MAC 836 * Out: 837 * none 838 * 839 * Return Value: true if success; otherwise false 840 * 841 */ 842bool MACbSafeRxOff (unsigned long dwIoBase) 843{ 844 unsigned short ww; 845 unsigned long dwData; 846 unsigned char byData; 847 848 // turn off wow temp for turn off Rx safely 849 850 // Clear RX DMA0,1 851 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN); 852 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN); 853 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 854 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData); 855 if (!(dwData & DMACTL_RUN)) 856 break; 857 } 858 if (ww == W_MAX_TIMEOUT) { 859 DBG_PORT80(0x10); 860 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x10)\n"); 861 return(false); 862 } 863 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 864 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData); 865 if ( !(dwData & DMACTL_RUN)) 866 break; 867 } 868 if (ww == W_MAX_TIMEOUT) { 869 DBG_PORT80(0x11); 870 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x11)\n"); 871 return(false); 872 } 873 874 // try to safe shutdown RX 875 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON); 876 // W_MAX_TIMEOUT is the timeout period 877 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 878 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData); 879 if ( !(byData & HOSTCR_RXONST)) 880 break; 881 } 882 if (ww == W_MAX_TIMEOUT) { 883 DBG_PORT80(0x12); 884 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x12)\n"); 885 return(false); 886 } 887 return true; 888} 889 890/* 891 * Description: 892 * Trun Off MAC Tx 893 * 894 * Parameters: 895 * In: 896 * dwIoBase - Base Address for MAC 897 * Out: 898 * none 899 * 900 * Return Value: true if success; otherwise false 901 * 902 */ 903bool MACbSafeTxOff (unsigned long dwIoBase) 904{ 905 unsigned short ww; 906 unsigned long dwData; 907 unsigned char byData; 908 909 // Clear TX DMA 910 //Tx0 911 VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN); 912 //AC0 913 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN); 914 915 916 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 917 VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData); 918 if ( !(dwData & DMACTL_RUN)) 919 break; 920 } 921 if (ww == W_MAX_TIMEOUT) { 922 DBG_PORT80(0x20); 923 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x20)\n"); 924 return(false); 925 } 926 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 927 VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData); 928 if ( !(dwData & DMACTL_RUN)) 929 break; 930 } 931 if (ww == W_MAX_TIMEOUT) { 932 DBG_PORT80(0x21); 933 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x21)\n"); 934 return(false); 935 } 936 937 // try to safe shutdown TX 938 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON); 939 940 // W_MAX_TIMEOUT is the timeout period 941 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 942 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData); 943 if ( !(byData & HOSTCR_TXONST)) 944 break; 945 } 946 if (ww == W_MAX_TIMEOUT) { 947 DBG_PORT80(0x24); 948 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x24)\n"); 949 return(false); 950 } 951 return true; 952} 953 954/* 955 * Description: 956 * Stop MAC function 957 * 958 * Parameters: 959 * In: 960 * dwIoBase - Base Address for MAC 961 * Out: 962 * none 963 * 964 * Return Value: true if success; otherwise false 965 * 966 */ 967bool MACbSafeStop (unsigned long dwIoBase) 968{ 969 MACvRegBitsOff(dwIoBase, MAC_REG_TCR, TCR_AUTOBCNTX); 970 971 if (MACbSafeRxOff(dwIoBase) == false) { 972 DBG_PORT80(0xA1); 973 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" MACbSafeRxOff == false)\n"); 974 MACbSafeSoftwareReset(dwIoBase); 975 return false; 976 } 977 if (MACbSafeTxOff(dwIoBase) == false) { 978 DBG_PORT80(0xA2); 979 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" MACbSafeTxOff == false)\n"); 980 MACbSafeSoftwareReset(dwIoBase); 981 return false; 982 } 983 984 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_MACEN); 985 986 return true; 987} 988 989/* 990 * Description: 991 * Shut Down MAC 992 * 993 * Parameters: 994 * In: 995 * dwIoBase - Base Address for MAC 996 * Out: 997 * none 998 * 999 * Return Value: true if success; otherwise false 1000 * 1001 */ 1002bool MACbShutdown (unsigned long dwIoBase) 1003{ 1004 // disable MAC IMR 1005 MACvIntDisable(dwIoBase); 1006 MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL); 1007 // stop the adapter 1008 if (!MACbSafeStop(dwIoBase)) { 1009 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE); 1010 return false; 1011 } 1012 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE); 1013 return true; 1014} 1015 1016/* 1017 * Description: 1018 * Initialize MAC 1019 * 1020 * Parameters: 1021 * In: 1022 * dwIoBase - Base Address for MAC 1023 * Out: 1024 * none 1025 * 1026 * Return Value: none 1027 * 1028 */ 1029void MACvInitialize (unsigned long dwIoBase) 1030{ 1031 // clear sticky bits 1032 MACvClearStckDS(dwIoBase); 1033 // disable force PME-enable 1034 VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR); 1035 // only 3253 A 1036 /* 1037 MACvPwrEvntDisable(dwIoBase); 1038 // clear power status 1039 VNSvOutPortW(dwIoBase + MAC_REG_WAKEUPSR0, 0x0F0F); 1040 */ 1041 1042 // do reset 1043 MACbSoftwareReset(dwIoBase); 1044 1045 // issue AUTOLD in EECSR to reload eeprom 1046 //MACvRegBitsOn(dwIoBase, MAC_REG_I2MCSR, I2MCSR_AUTOLD); 1047 // wait until EEPROM loading complete 1048 //while (true) { 1049 // u8 u8Data; 1050 // VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &u8Data); 1051 // if ( !(u8Data & I2MCSR_AUTOLD)) 1052 // break; 1053 //} 1054 1055 // reset TSF counter 1056 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); 1057 // enable TSF counter 1058 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 1059 1060 1061 // set packet filter 1062 // receive directed and broadcast address 1063 1064 MACvSetPacketFilter(dwIoBase, PKT_TYPE_DIRECTED | PKT_TYPE_BROADCAST); 1065 1066} 1067 1068/* 1069 * Description: 1070 * Set the chip with current rx descriptor address 1071 * 1072 * Parameters: 1073 * In: 1074 * dwIoBase - Base Address for MAC 1075 * dwCurrDescAddr - Descriptor Address 1076 * Out: 1077 * none 1078 * 1079 * Return Value: none 1080 * 1081 */ 1082void MACvSetCurrRx0DescAddr (unsigned long dwIoBase, unsigned long dwCurrDescAddr) 1083{ 1084unsigned short ww; 1085unsigned char byData; 1086unsigned char byOrgDMACtl; 1087 1088 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl); 1089 if (byOrgDMACtl & DMACTL_RUN) { 1090 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN); 1091 } 1092 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 1093 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData); 1094 if ( !(byData & DMACTL_RUN)) 1095 break; 1096 } 1097 if (ww == W_MAX_TIMEOUT) { 1098 DBG_PORT80(0x13); 1099 } 1100 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr); 1101 if (byOrgDMACtl & DMACTL_RUN) { 1102 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN); 1103 } 1104} 1105 1106/* 1107 * Description: 1108 * Set the chip with current rx descriptor address 1109 * 1110 * Parameters: 1111 * In: 1112 * dwIoBase - Base Address for MAC 1113 * dwCurrDescAddr - Descriptor Address 1114 * Out: 1115 * none 1116 * 1117 * Return Value: none 1118 * 1119 */ 1120void MACvSetCurrRx1DescAddr (unsigned long dwIoBase, unsigned long dwCurrDescAddr) 1121{ 1122unsigned short ww; 1123unsigned char byData; 1124unsigned char byOrgDMACtl; 1125 1126 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byOrgDMACtl); 1127 if (byOrgDMACtl & DMACTL_RUN) { 1128 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1+2, DMACTL_RUN); 1129 } 1130 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 1131 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byData); 1132 if ( !(byData & DMACTL_RUN)) 1133 break; 1134 } 1135 if (ww == W_MAX_TIMEOUT) { 1136 DBG_PORT80(0x14); 1137 } 1138 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, dwCurrDescAddr); 1139 if (byOrgDMACtl & DMACTL_RUN) { 1140 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN); 1141 } 1142} 1143 1144/* 1145 * Description: 1146 * Set the chip with current tx0 descriptor address 1147 * 1148 * Parameters: 1149 * In: 1150 * dwIoBase - Base Address for MAC 1151 * dwCurrDescAddr - Descriptor Address 1152 * Out: 1153 * none 1154 * 1155 * Return Value: none 1156 * 1157 */ 1158void MACvSetCurrTx0DescAddrEx (unsigned long dwIoBase, unsigned long dwCurrDescAddr) 1159{ 1160unsigned short ww; 1161unsigned char byData; 1162unsigned char byOrgDMACtl; 1163 1164 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byOrgDMACtl); 1165 if (byOrgDMACtl & DMACTL_RUN) { 1166 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN); 1167 } 1168 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 1169 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData); 1170 if ( !(byData & DMACTL_RUN)) 1171 break; 1172 } 1173 if (ww == W_MAX_TIMEOUT) { 1174 DBG_PORT80(0x25); 1175 } 1176 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, dwCurrDescAddr); 1177 if (byOrgDMACtl & DMACTL_RUN) { 1178 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN); 1179 } 1180} 1181 1182/* 1183 * Description: 1184 * Set the chip with current AC0 descriptor address 1185 * 1186 * Parameters: 1187 * In: 1188 * dwIoBase - Base Address for MAC 1189 * dwCurrDescAddr - Descriptor Address 1190 * Out: 1191 * none 1192 * 1193 * Return Value: none 1194 * 1195 */ 1196 //TxDMA1 = AC0DMA 1197void MACvSetCurrAC0DescAddrEx (unsigned long dwIoBase, unsigned long dwCurrDescAddr) 1198{ 1199unsigned short ww; 1200unsigned char byData; 1201unsigned char byOrgDMACtl; 1202 1203 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl); 1204 if (byOrgDMACtl & DMACTL_RUN) { 1205 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN); 1206 } 1207 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 1208 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData); 1209 if (!(byData & DMACTL_RUN)) 1210 break; 1211 } 1212 if (ww == W_MAX_TIMEOUT) { 1213 DBG_PORT80(0x26); 1214 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x26)\n"); 1215 } 1216 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr); 1217 if (byOrgDMACtl & DMACTL_RUN) { 1218 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN); 1219 } 1220} 1221 1222 1223 1224void MACvSetCurrTXDescAddr (int iTxType, unsigned long dwIoBase, unsigned long dwCurrDescAddr) 1225{ 1226 if(iTxType == TYPE_AC0DMA){ 1227 MACvSetCurrAC0DescAddrEx(dwIoBase, dwCurrDescAddr); 1228 }else if(iTxType == TYPE_TXDMA0){ 1229 MACvSetCurrTx0DescAddrEx(dwIoBase, dwCurrDescAddr); 1230 } 1231} 1232 1233/* 1234 * Description: 1235 * Micro Second Delay via MAC 1236 * 1237 * Parameters: 1238 * In: 1239 * dwIoBase - Base Address for MAC 1240 * uDelay - Delay time (timer resolution is 4 us) 1241 * Out: 1242 * none 1243 * 1244 * Return Value: none 1245 * 1246 */ 1247void MACvTimer0MicroSDelay (unsigned long dwIoBase, unsigned int uDelay) 1248{ 1249unsigned char byValue; 1250unsigned int uu,ii; 1251 1252 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0); 1253 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay); 1254 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE)); 1255 for(ii=0;ii<66;ii++) { // assume max PCI clock is 66Mhz 1256 for (uu = 0; uu < uDelay; uu++) { 1257 VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue); 1258 if ((byValue == 0) || 1259 (byValue & TMCTL_TSUSP)) { 1260 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0); 1261 return; 1262 } 1263 } 1264 } 1265 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0); 1266 1267} 1268 1269/* 1270 * Description: 1271 * Micro Second One shot timer via MAC 1272 * 1273 * Parameters: 1274 * In: 1275 * dwIoBase - Base Address for MAC 1276 * uDelay - Delay time 1277 * Out: 1278 * none 1279 * 1280 * Return Value: none 1281 * 1282 */ 1283void MACvOneShotTimer0MicroSec (unsigned long dwIoBase, unsigned int uDelayTime) 1284{ 1285 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0); 1286 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelayTime); 1287 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE)); 1288} 1289 1290/* 1291 * Description: 1292 * Micro Second One shot timer via MAC 1293 * 1294 * Parameters: 1295 * In: 1296 * dwIoBase - Base Address for MAC 1297 * uDelay - Delay time 1298 * Out: 1299 * none 1300 * 1301 * Return Value: none 1302 * 1303 */ 1304void MACvOneShotTimer1MicroSec (unsigned long dwIoBase, unsigned int uDelayTime) 1305{ 1306 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0); 1307 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime); 1308 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE)); 1309} 1310 1311 1312void MACvSetMISCFifo (unsigned long dwIoBase, unsigned short wOffset, unsigned long dwData) 1313{ 1314 if (wOffset > 273) 1315 return; 1316 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); 1317 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); 1318 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); 1319} 1320 1321 1322bool MACbTxDMAOff (unsigned long dwIoBase, unsigned int idx) 1323{ 1324unsigned char byData; 1325unsigned int ww = 0; 1326 1327 if (idx == TYPE_TXDMA0) { 1328 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN); 1329 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 1330 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData); 1331 if ( !(byData & DMACTL_RUN)) 1332 break; 1333 } 1334 } else if (idx == TYPE_AC0DMA) { 1335 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN); 1336 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 1337 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData); 1338 if ( !(byData & DMACTL_RUN)) 1339 break; 1340 } 1341 } 1342 if (ww == W_MAX_TIMEOUT) { 1343 DBG_PORT80(0x29); 1344 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x29)\n"); 1345 return false; 1346 } 1347 return true; 1348} 1349 1350void MACvClearBusSusInd (unsigned long dwIoBase) 1351{ 1352 unsigned long dwOrgValue; 1353 unsigned int ww; 1354 // check if BcnSusInd enabled 1355 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); 1356 if( !(dwOrgValue & EnCFG_BcnSusInd)) 1357 return; 1358 //Set BcnSusClr 1359 dwOrgValue = dwOrgValue | EnCFG_BcnSusClr; 1360 VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); 1361 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 1362 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); 1363 if( !(dwOrgValue & EnCFG_BcnSusInd)) 1364 break; 1365 } 1366 if (ww == W_MAX_TIMEOUT) { 1367 DBG_PORT80(0x33); 1368 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x33)\n"); 1369 } 1370} 1371 1372void MACvEnableBusSusEn (unsigned long dwIoBase) 1373{ 1374 unsigned char byOrgValue; 1375 unsigned long dwOrgValue; 1376 unsigned int ww; 1377 // check if BcnSusInd enabled 1378 VNSvInPortB(dwIoBase + MAC_REG_CFG , &byOrgValue); 1379 1380 //Set BcnSusEn 1381 byOrgValue = byOrgValue | CFG_BCNSUSEN; 1382 VNSvOutPortB(dwIoBase + MAC_REG_ENCFG, byOrgValue); 1383 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 1384 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); 1385 if(dwOrgValue & EnCFG_BcnSusInd) 1386 break; 1387 } 1388 if (ww == W_MAX_TIMEOUT) { 1389 DBG_PORT80(0x34); 1390 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x34)\n"); 1391 } 1392} 1393 1394bool MACbFlushSYNCFifo (unsigned long dwIoBase) 1395{ 1396 unsigned char byOrgValue; 1397 unsigned int ww; 1398 // Read MACCR 1399 VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue); 1400 1401 // Set SYNCFLUSH 1402 byOrgValue = byOrgValue | MACCR_SYNCFLUSH; 1403 VNSvOutPortB(dwIoBase + MAC_REG_MACCR, byOrgValue); 1404 1405 // Check if SyncFlushOK 1406 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 1407 VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue); 1408 if(byOrgValue & MACCR_SYNCFLUSHOK) 1409 break; 1410 } 1411 if (ww == W_MAX_TIMEOUT) { 1412 DBG_PORT80(0x35); 1413 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x33)\n"); 1414 } 1415 return true; 1416} 1417 1418bool MACbPSWakeup (unsigned long dwIoBase) 1419{ 1420 unsigned char byOrgValue; 1421 unsigned int ww; 1422 // Read PSCTL 1423 if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS)) { 1424 return true; 1425 } 1426 // Disable PS 1427 MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN); 1428 1429 // Check if SyncFlushOK 1430 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 1431 VNSvInPortB(dwIoBase + MAC_REG_PSCTL , &byOrgValue); 1432 if(byOrgValue & PSCTL_WAKEDONE) 1433 break; 1434 } 1435 if (ww == W_MAX_TIMEOUT) { 1436 DBG_PORT80(0x36); 1437 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x33)\n"); 1438 return false; 1439 } 1440 return true; 1441} 1442 1443/* 1444 * Description: 1445 * Set the Key by MISCFIFO 1446 * 1447 * Parameters: 1448 * In: 1449 * dwIoBase - Base Address for MAC 1450 * 1451 * Out: 1452 * none 1453 * 1454 * Return Value: none 1455 * 1456 */ 1457 1458void MACvSetKeyEntry (unsigned long dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx, 1459 unsigned int uKeyIdx, unsigned char *pbyAddr, unsigned long *pdwKey, unsigned char byLocalID) 1460{ 1461unsigned short wOffset; 1462unsigned long dwData; 1463int ii; 1464 1465 if (byLocalID <= 1) 1466 return; 1467 1468 1469 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetKeyEntry\n"); 1470 wOffset = MISCFIFO_KEYETRY0; 1471 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE); 1472 1473 dwData = 0; 1474 dwData |= wKeyCtl; 1475 dwData <<= 16; 1476 dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5)); 1477 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1. wOffset: %d, Data: %lX, KeyCtl:%X\n", wOffset, dwData, wKeyCtl); 1478 1479 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); 1480 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); 1481 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); 1482 wOffset++; 1483 1484 dwData = 0; 1485 dwData |= *(pbyAddr+3); 1486 dwData <<= 8; 1487 dwData |= *(pbyAddr+2); 1488 dwData <<= 8; 1489 dwData |= *(pbyAddr+1); 1490 dwData <<= 8; 1491 dwData |= *(pbyAddr+0); 1492 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2. wOffset: %d, Data: %lX\n", wOffset, dwData); 1493 1494 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); 1495 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); 1496 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); 1497 wOffset++; 1498 1499 wOffset += (uKeyIdx * 4); 1500 for (ii=0;ii<4;ii++) { 1501 // alway push 128 bits 1502 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"3.(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey); 1503 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii); 1504 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++); 1505 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); 1506 } 1507} 1508 1509 1510 1511/* 1512 * Description: 1513 * Disable the Key Entry by MISCFIFO 1514 * 1515 * Parameters: 1516 * In: 1517 * dwIoBase - Base Address for MAC 1518 * 1519 * Out: 1520 * none 1521 * 1522 * Return Value: none 1523 * 1524 */ 1525void MACvDisableKeyEntry (unsigned long dwIoBase, unsigned int uEntryIdx) 1526{ 1527unsigned short wOffset; 1528 1529 wOffset = MISCFIFO_KEYETRY0; 1530 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE); 1531 1532 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); 1533 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0); 1534 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); 1535} 1536 1537 1538/* 1539 * Description: 1540 * Set the default Key (KeyEntry[10]) by MISCFIFO 1541 * 1542 * Parameters: 1543 * In: 1544 * dwIoBase - Base Address for MAC 1545 * 1546 * Out: 1547 * none 1548 * 1549 * Return Value: none 1550 * 1551 */ 1552 1553void MACvSetDefaultKeyEntry (unsigned long dwIoBase, unsigned int uKeyLen, 1554 unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID) 1555{ 1556unsigned short wOffset; 1557unsigned long dwData; 1558int ii; 1559 1560 if (byLocalID <= 1) 1561 return; 1562 1563 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetDefaultKeyEntry\n"); 1564 wOffset = MISCFIFO_KEYETRY0; 1565 wOffset += (10 * MISCFIFO_KEYENTRYSIZE); 1566 1567 wOffset++; 1568 wOffset++; 1569 wOffset += (uKeyIdx * 4); 1570 // alway push 128 bits 1571 for (ii=0; ii<3; ii++) { 1572 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey); 1573 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii); 1574 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++); 1575 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); 1576 } 1577 dwData = *pdwKey; 1578 if (uKeyLen == WLAN_WEP104_KEYLEN) { 1579 dwData |= 0x80000000; 1580 } 1581 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+3); 1582 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); 1583 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); 1584 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"End. wOffset: %d, Data: %lX\n", wOffset+3, dwData); 1585 1586} 1587 1588 1589/* 1590 * Description: 1591 * Enable default Key (KeyEntry[10]) by MISCFIFO 1592 * 1593 * Parameters: 1594 * In: 1595 * dwIoBase - Base Address for MAC 1596 * 1597 * Out: 1598 * none 1599 * 1600 * Return Value: none 1601 * 1602 */ 1603/* 1604void MACvEnableDefaultKey (unsigned long dwIoBase, unsigned char byLocalID) 1605{ 1606unsigned short wOffset; 1607unsigned long dwData; 1608 1609 1610 if (byLocalID <= 1) 1611 return; 1612 1613 wOffset = MISCFIFO_KEYETRY0; 1614 wOffset += (10 * MISCFIFO_KEYENTRYSIZE); 1615 1616 dwData = 0xC0440000; 1617 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); 1618 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); 1619 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); 1620 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvEnableDefaultKey: wOffset: %d, Data: %lX\n", wOffset, dwData); 1621 1622} 1623*/ 1624 1625/* 1626 * Description: 1627 * Disable default Key (KeyEntry[10]) by MISCFIFO 1628 * 1629 * Parameters: 1630 * In: 1631 * dwIoBase - Base Address for MAC 1632 * 1633 * Out: 1634 * none 1635 * 1636 * Return Value: none 1637 * 1638 */ 1639void MACvDisableDefaultKey (unsigned long dwIoBase) 1640{ 1641unsigned short wOffset; 1642unsigned long dwData; 1643 1644 1645 wOffset = MISCFIFO_KEYETRY0; 1646 wOffset += (10 * MISCFIFO_KEYENTRYSIZE); 1647 1648 dwData = 0x0; 1649 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); 1650 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); 1651 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); 1652 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvDisableDefaultKey: wOffset: %d, Data: %lX\n", wOffset, dwData); 1653} 1654 1655/* 1656 * Description: 1657 * Set the default TKIP Group Key (KeyEntry[10]) by MISCFIFO 1658 * 1659 * Parameters: 1660 * In: 1661 * dwIoBase - Base Address for MAC 1662 * 1663 * Out: 1664 * none 1665 * 1666 * Return Value: none 1667 * 1668 */ 1669void MACvSetDefaultTKIPKeyEntry (unsigned long dwIoBase, unsigned int uKeyLen, 1670 unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID) 1671{ 1672unsigned short wOffset; 1673unsigned long dwData; 1674int ii; 1675 1676 if (byLocalID <= 1) 1677 return; 1678 1679 1680 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetDefaultTKIPKeyEntry\n"); 1681 wOffset = MISCFIFO_KEYETRY0; 1682 // Kyle test : change offset from 10 -> 0 1683 wOffset += (10 * MISCFIFO_KEYENTRYSIZE); 1684 1685 dwData = 0xC0660000; 1686 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); 1687 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); 1688 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); 1689 wOffset++; 1690 1691 dwData = 0; 1692 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); 1693 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); 1694 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); 1695 wOffset++; 1696 1697 wOffset += (uKeyIdx * 4); 1698 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1. wOffset: %d, Data: %lX, idx:%d\n", wOffset, *pdwKey, uKeyIdx); 1699 // alway push 128 bits 1700 for (ii=0; ii<4; ii++) { 1701 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2.(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey); 1702 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii); 1703 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++); 1704 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); 1705 } 1706 1707} 1708 1709 1710 1711/* 1712 * Description: 1713 * Set the Key Control by MISCFIFO 1714 * 1715 * Parameters: 1716 * In: 1717 * dwIoBase - Base Address for MAC 1718 * 1719 * Out: 1720 * none 1721 * 1722 * Return Value: none 1723 * 1724 */ 1725 1726void MACvSetDefaultKeyCtl (unsigned long dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx, unsigned char byLocalID) 1727{ 1728unsigned short wOffset; 1729unsigned long dwData; 1730 1731 if (byLocalID <= 1) 1732 return; 1733 1734 1735 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetKeyEntry\n"); 1736 wOffset = MISCFIFO_KEYETRY0; 1737 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE); 1738 1739 dwData = 0; 1740 dwData |= wKeyCtl; 1741 dwData <<= 16; 1742 dwData |= 0xffff; 1743 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1. wOffset: %d, Data: %lX, KeyCtl:%X\n", wOffset, dwData, wKeyCtl); 1744 1745 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); 1746 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); 1747 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); 1748 1749} 1750