1/* 2 ************************************************************************* 3 * Ralink Tech Inc. 4 * 5F., No.36, Taiyuan St., Jhubei City, 5 * Hsinchu County 302, 6 * Taiwan, R.O.C. 7 * 8 * (c) Copyright 2002-2007, Ralink Technology, Inc. 9 * 10 * This program is free software; you can redistribute it and/or modify * 11 * it under the terms of the GNU General Public License as published by * 12 * the Free Software Foundation; either version 2 of the License, or * 13 * (at your option) any later version. * 14 * * 15 * This program is distributed in the hope that it will be useful, * 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of * 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * 18 * GNU General Public License for more details. * 19 * * 20 * You should have received a copy of the GNU General Public License * 21 * along with this program; if not, write to the * 22 * Free Software Foundation, Inc., * 23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * 24 * * 25 ************************************************************************* 26 27 Module Name: 28 rt3090.c 29 30 Abstract: 31 Specific funcitons and variables for RT3070 32 33 Revision History: 34 Who When What 35 -------- ---------- ---------------------------------------------- 36*/ 37 38#ifdef RT3090 39 40#include "../rt_config.h" 41 42#ifndef RTMP_RF_RW_SUPPORT 43#error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip" 44#endif /* RTMP_RF_RW_SUPPORT // */ 45 46void NICInitRT3090RFRegisters(struct rt_rtmp_adapter *pAd) 47{ 48 int i; 49 /* Driver must read EEPROM to get RfIcType before initial RF registers */ 50 /* Initialize RF register to default value */ 51 if (IS_RT3090(pAd)) { 52 /* Init RF calibration */ 53 /* Driver should toggle RF R30 bit7 before init RF registers */ 54 u8 RfReg; 55 u32 data; 56 57 RT30xxReadRFRegister(pAd, RF_R30, (u8 *)&RfReg); 58 RfReg |= 0x80; 59 RT30xxWriteRFRegister(pAd, RF_R30, (u8)RfReg); 60 RTMPusecDelay(1000); 61 RfReg &= 0x7F; 62 RT30xxWriteRFRegister(pAd, RF_R30, (u8)RfReg); 63 64 /* init R24, R31 */ 65 RT30xxWriteRFRegister(pAd, RF_R24, 0x0F); 66 RT30xxWriteRFRegister(pAd, RF_R31, 0x0F); 67 68 /* RT309x version E has fixed this issue */ 69 if ((pAd->NicConfig2.field.DACTestBit == 1) 70 && ((pAd->MACVersion & 0xffff) < 0x0211)) { 71 /* patch tx EVM issue temporarily */ 72 RTMP_IO_READ32(pAd, LDO_CFG0, &data); 73 data = ((data & 0xE0FFFFFF) | 0x0D000000); 74 RTMP_IO_WRITE32(pAd, LDO_CFG0, data); 75 } else { 76 RTMP_IO_READ32(pAd, LDO_CFG0, &data); 77 data = ((data & 0xE0FFFFFF) | 0x01000000); 78 RTMP_IO_WRITE32(pAd, LDO_CFG0, data); 79 } 80 81 /* patch LNA_PE_G1 failed issue */ 82 RTMP_IO_READ32(pAd, GPIO_SWITCH, &data); 83 data &= ~(0x20); 84 RTMP_IO_WRITE32(pAd, GPIO_SWITCH, data); 85 86 /* Initialize RF register to default value */ 87 for (i = 0; i < NUM_RF_REG_PARMS; i++) { 88 RT30xxWriteRFRegister(pAd, 89 RT30xx_RFRegTable[i].Register, 90 RT30xx_RFRegTable[i].Value); 91 } 92 93 /* Driver should set RF R6 bit6 on before calibration */ 94 RT30xxReadRFRegister(pAd, RF_R06, (u8 *)&RfReg); 95 RfReg |= 0x40; 96 RT30xxWriteRFRegister(pAd, RF_R06, (u8)RfReg); 97 98 /*For RF filter Calibration */ 99 RTMPFilterCalibration(pAd); 100 101 /* Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration() */ 102 if ((pAd->MACVersion & 0xffff) < 0x0211) 103 RT30xxWriteRFRegister(pAd, RF_R27, 0x3); 104 105 /* set led open drain enable */ 106 RTMP_IO_READ32(pAd, OPT_14, &data); 107 data |= 0x01; 108 RTMP_IO_WRITE32(pAd, OPT_14, data); 109 110 /* set default antenna as main */ 111 if (pAd->RfIcType == RFIC_3020) 112 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt); 113 114 /* add by johnli, RF power sequence setup, load RF normal operation-mode setup */ 115 RT30xxLoadRFNormalModeSetup(pAd); 116 } 117 118} 119 120#endif /* RT3090 // */ 121