1/* 2 * dz.c: Serial port driver for DECstations equipped 3 * with the DZ chipset. 4 * 5 * Copyright (C) 1998 Olivier A. D. Lebaillif 6 * 7 * Email: olivier.lebaillif@ifrsys.com 8 * 9 * Copyright (C) 2004, 2006, 2007 Maciej W. Rozycki 10 * 11 * [31-AUG-98] triemer 12 * Changed IRQ to use Harald's dec internals interrupts.h 13 * removed base_addr code - moving address assignment to setup.c 14 * Changed name of dz_init to rs_init to be consistent with tc code 15 * [13-NOV-98] triemer fixed code to receive characters 16 * after patches by harald to irq code. 17 * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout 18 * field from "current" - somewhere between 2.1.121 and 2.1.131 19 Qua Jun 27 15:02:26 BRT 2001 20 * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups 21 * 22 * Parts (C) 1999 David Airlie, airlied@linux.ie 23 * [07-SEP-99] Bugfixes 24 * 25 * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk> 26 * Converted to new serial core 27 */ 28 29#undef DEBUG_DZ 30 31#if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 32#define SUPPORT_SYSRQ 33#endif 34 35#include <linux/bitops.h> 36#include <linux/compiler.h> 37#include <linux/console.h> 38#include <linux/delay.h> 39#include <linux/errno.h> 40#include <linux/init.h> 41#include <linux/interrupt.h> 42#include <linux/ioport.h> 43#include <linux/kernel.h> 44#include <linux/major.h> 45#include <linux/module.h> 46#include <linux/serial.h> 47#include <linux/serial_core.h> 48#include <linux/sysrq.h> 49#include <linux/tty.h> 50 51#include <asm/atomic.h> 52#include <asm/bootinfo.h> 53#include <asm/io.h> 54#include <asm/system.h> 55 56#include <asm/dec/interrupts.h> 57#include <asm/dec/kn01.h> 58#include <asm/dec/kn02.h> 59#include <asm/dec/machtype.h> 60#include <asm/dec/prom.h> 61#include <asm/dec/system.h> 62 63#include "dz.h" 64 65 66MODULE_DESCRIPTION("DECstation DZ serial driver"); 67MODULE_LICENSE("GPL"); 68 69 70static char dz_name[] __initdata = "DECstation DZ serial driver version "; 71static char dz_version[] __initdata = "1.04"; 72 73struct dz_port { 74 struct dz_mux *mux; 75 struct uart_port port; 76 unsigned int cflag; 77}; 78 79struct dz_mux { 80 struct dz_port dport[DZ_NB_PORT]; 81 atomic_t map_guard; 82 atomic_t irq_guard; 83 int initialised; 84}; 85 86static struct dz_mux dz_mux; 87 88static inline struct dz_port *to_dport(struct uart_port *uport) 89{ 90 return container_of(uport, struct dz_port, port); 91} 92 93/* 94 * ------------------------------------------------------------ 95 * dz_in () and dz_out () 96 * 97 * These routines are used to access the registers of the DZ 98 * chip, hiding relocation differences between implementation. 99 * ------------------------------------------------------------ 100 */ 101 102static u16 dz_in(struct dz_port *dport, unsigned offset) 103{ 104 void __iomem *addr = dport->port.membase + offset; 105 106 return readw(addr); 107} 108 109static void dz_out(struct dz_port *dport, unsigned offset, u16 value) 110{ 111 void __iomem *addr = dport->port.membase + offset; 112 113 writew(value, addr); 114} 115 116/* 117 * ------------------------------------------------------------ 118 * rs_stop () and rs_start () 119 * 120 * These routines are called before setting or resetting 121 * tty->stopped. They enable or disable transmitter interrupts, 122 * as necessary. 123 * ------------------------------------------------------------ 124 */ 125 126static void dz_stop_tx(struct uart_port *uport) 127{ 128 struct dz_port *dport = to_dport(uport); 129 u16 tmp, mask = 1 << dport->port.line; 130 131 tmp = dz_in(dport, DZ_TCR); /* read the TX flag */ 132 tmp &= ~mask; /* clear the TX flag */ 133 dz_out(dport, DZ_TCR, tmp); 134} 135 136static void dz_start_tx(struct uart_port *uport) 137{ 138 struct dz_port *dport = to_dport(uport); 139 u16 tmp, mask = 1 << dport->port.line; 140 141 tmp = dz_in(dport, DZ_TCR); /* read the TX flag */ 142 tmp |= mask; /* set the TX flag */ 143 dz_out(dport, DZ_TCR, tmp); 144} 145 146static void dz_stop_rx(struct uart_port *uport) 147{ 148 struct dz_port *dport = to_dport(uport); 149 150 dport->cflag &= ~DZ_RXENAB; 151 dz_out(dport, DZ_LPR, dport->cflag); 152} 153 154static void dz_enable_ms(struct uart_port *uport) 155{ 156 /* nothing to do */ 157} 158 159/* 160 * ------------------------------------------------------------ 161 * 162 * Here start the interrupt handling routines. All of the following 163 * subroutines are declared as inline and are folded into 164 * dz_interrupt. They were separated out for readability's sake. 165 * 166 * Note: dz_interrupt() is a "fast" interrupt, which means that it 167 * runs with interrupts turned off. People who may want to modify 168 * dz_interrupt() should try to keep the interrupt handler as fast as 169 * possible. After you are done making modifications, it is not a bad 170 * idea to do: 171 * 172 * make drivers/serial/dz.s 173 * 174 * and look at the resulting assemble code in dz.s. 175 * 176 * ------------------------------------------------------------ 177 */ 178 179/* 180 * ------------------------------------------------------------ 181 * receive_char () 182 * 183 * This routine deals with inputs from any lines. 184 * ------------------------------------------------------------ 185 */ 186static inline void dz_receive_chars(struct dz_mux *mux) 187{ 188 struct uart_port *uport; 189 struct dz_port *dport = &mux->dport[0]; 190 struct tty_struct *tty = NULL; 191 struct uart_icount *icount; 192 int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 }; 193 unsigned char ch, flag; 194 u16 status; 195 int i; 196 197 while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) { 198 dport = &mux->dport[LINE(status)]; 199 uport = &dport->port; 200 tty = uport->state->port.tty; /* point to the proper dev */ 201 202 ch = UCHAR(status); /* grab the char */ 203 flag = TTY_NORMAL; 204 205 icount = &uport->icount; 206 icount->rx++; 207 208 if (unlikely(status & (DZ_OERR | DZ_FERR | DZ_PERR))) { 209 210 /* 211 * There is no separate BREAK status bit, so treat 212 * null characters with framing errors as BREAKs; 213 * normally, otherwise. For this move the Framing 214 * Error bit to a simulated BREAK bit. 215 */ 216 if (!ch) { 217 status |= (status & DZ_FERR) >> 218 (ffs(DZ_FERR) - ffs(DZ_BREAK)); 219 status &= ~DZ_FERR; 220 } 221 222 /* Handle SysRq/SAK & keep track of the statistics. */ 223 if (status & DZ_BREAK) { 224 icount->brk++; 225 if (uart_handle_break(uport)) 226 continue; 227 } else if (status & DZ_FERR) 228 icount->frame++; 229 else if (status & DZ_PERR) 230 icount->parity++; 231 if (status & DZ_OERR) 232 icount->overrun++; 233 234 status &= uport->read_status_mask; 235 if (status & DZ_BREAK) 236 flag = TTY_BREAK; 237 else if (status & DZ_FERR) 238 flag = TTY_FRAME; 239 else if (status & DZ_PERR) 240 flag = TTY_PARITY; 241 242 } 243 244 if (uart_handle_sysrq_char(uport, ch)) 245 continue; 246 247 uart_insert_char(uport, status, DZ_OERR, ch, flag); 248 lines_rx[LINE(status)] = 1; 249 } 250 for (i = 0; i < DZ_NB_PORT; i++) 251 if (lines_rx[i]) 252 tty_flip_buffer_push(mux->dport[i].port.state->port.tty); 253} 254 255/* 256 * ------------------------------------------------------------ 257 * transmit_char () 258 * 259 * This routine deals with outputs to any lines. 260 * ------------------------------------------------------------ 261 */ 262static inline void dz_transmit_chars(struct dz_mux *mux) 263{ 264 struct dz_port *dport = &mux->dport[0]; 265 struct circ_buf *xmit; 266 unsigned char tmp; 267 u16 status; 268 269 status = dz_in(dport, DZ_CSR); 270 dport = &mux->dport[LINE(status)]; 271 xmit = &dport->port.state->xmit; 272 273 if (dport->port.x_char) { /* XON/XOFF chars */ 274 dz_out(dport, DZ_TDR, dport->port.x_char); 275 dport->port.icount.tx++; 276 dport->port.x_char = 0; 277 return; 278 } 279 /* If nothing to do or stopped or hardware stopped. */ 280 if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) { 281 spin_lock(&dport->port.lock); 282 dz_stop_tx(&dport->port); 283 spin_unlock(&dport->port.lock); 284 return; 285 } 286 287 /* 288 * If something to do... (remember the dz has no output fifo, 289 * so we go one char at a time) :-< 290 */ 291 tmp = xmit->buf[xmit->tail]; 292 xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1); 293 dz_out(dport, DZ_TDR, tmp); 294 dport->port.icount.tx++; 295 296 if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS) 297 uart_write_wakeup(&dport->port); 298 299 /* Are we are done. */ 300 if (uart_circ_empty(xmit)) { 301 spin_lock(&dport->port.lock); 302 dz_stop_tx(&dport->port); 303 spin_unlock(&dport->port.lock); 304 } 305} 306 307/* 308 * ------------------------------------------------------------ 309 * check_modem_status() 310 * 311 * DS 3100 & 5100: Only valid for the MODEM line, duh! 312 * DS 5000/200: Valid for the MODEM and PRINTER line. 313 * ------------------------------------------------------------ 314 */ 315static inline void check_modem_status(struct dz_port *dport) 316{ 317 u16 status; 318 319 /* If not the modem line just return. */ 320 if (dport->port.line != DZ_MODEM) 321 return; 322 323 status = dz_in(dport, DZ_MSR); 324 325 /* it's easy, since DSR2 is the only bit in the register */ 326 if (status) 327 dport->port.icount.dsr++; 328} 329 330/* 331 * ------------------------------------------------------------ 332 * dz_interrupt () 333 * 334 * this is the main interrupt routine for the DZ chip. 335 * It deals with the multiple ports. 336 * ------------------------------------------------------------ 337 */ 338static irqreturn_t dz_interrupt(int irq, void *dev_id) 339{ 340 struct dz_mux *mux = dev_id; 341 struct dz_port *dport = &mux->dport[0]; 342 u16 status; 343 344 /* get the reason why we just got an irq */ 345 status = dz_in(dport, DZ_CSR); 346 347 if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE)) 348 dz_receive_chars(mux); 349 350 if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE)) 351 dz_transmit_chars(mux); 352 353 return IRQ_HANDLED; 354} 355 356/* 357 * ------------------------------------------------------------------- 358 * Here ends the DZ interrupt routines. 359 * ------------------------------------------------------------------- 360 */ 361 362static unsigned int dz_get_mctrl(struct uart_port *uport) 363{ 364 struct dz_port *dport = to_dport(uport); 365 unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; 366 367 if (dport->port.line == DZ_MODEM) { 368 if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR) 369 mctrl &= ~TIOCM_DSR; 370 } 371 372 return mctrl; 373} 374 375static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl) 376{ 377 struct dz_port *dport = to_dport(uport); 378 u16 tmp; 379 380 if (dport->port.line == DZ_MODEM) { 381 tmp = dz_in(dport, DZ_TCR); 382 if (mctrl & TIOCM_DTR) 383 tmp &= ~DZ_MODEM_DTR; 384 else 385 tmp |= DZ_MODEM_DTR; 386 dz_out(dport, DZ_TCR, tmp); 387 } 388} 389 390/* 391 * ------------------------------------------------------------------- 392 * startup () 393 * 394 * various initialization tasks 395 * ------------------------------------------------------------------- 396 */ 397static int dz_startup(struct uart_port *uport) 398{ 399 struct dz_port *dport = to_dport(uport); 400 struct dz_mux *mux = dport->mux; 401 unsigned long flags; 402 int irq_guard; 403 int ret; 404 u16 tmp; 405 406 irq_guard = atomic_add_return(1, &mux->irq_guard); 407 if (irq_guard != 1) 408 return 0; 409 410 ret = request_irq(dport->port.irq, dz_interrupt, 411 IRQF_SHARED, "dz", mux); 412 if (ret) { 413 atomic_add(-1, &mux->irq_guard); 414 printk(KERN_ERR "dz: Cannot get IRQ %d!\n", dport->port.irq); 415 return ret; 416 } 417 418 spin_lock_irqsave(&dport->port.lock, flags); 419 420 /* Enable interrupts. */ 421 tmp = dz_in(dport, DZ_CSR); 422 tmp |= DZ_RIE | DZ_TIE; 423 dz_out(dport, DZ_CSR, tmp); 424 425 spin_unlock_irqrestore(&dport->port.lock, flags); 426 427 return 0; 428} 429 430/* 431 * ------------------------------------------------------------------- 432 * shutdown () 433 * 434 * This routine will shutdown a serial port; interrupts are disabled, and 435 * DTR is dropped if the hangup on close termio flag is on. 436 * ------------------------------------------------------------------- 437 */ 438static void dz_shutdown(struct uart_port *uport) 439{ 440 struct dz_port *dport = to_dport(uport); 441 struct dz_mux *mux = dport->mux; 442 unsigned long flags; 443 int irq_guard; 444 u16 tmp; 445 446 spin_lock_irqsave(&dport->port.lock, flags); 447 dz_stop_tx(&dport->port); 448 spin_unlock_irqrestore(&dport->port.lock, flags); 449 450 irq_guard = atomic_add_return(-1, &mux->irq_guard); 451 if (!irq_guard) { 452 /* Disable interrupts. */ 453 tmp = dz_in(dport, DZ_CSR); 454 tmp &= ~(DZ_RIE | DZ_TIE); 455 dz_out(dport, DZ_CSR, tmp); 456 457 free_irq(dport->port.irq, mux); 458 } 459} 460 461/* 462 * ------------------------------------------------------------------- 463 * dz_tx_empty() -- get the transmitter empty status 464 * 465 * Purpose: Let user call ioctl() to get info when the UART physically 466 * is emptied. On bus types like RS485, the transmitter must 467 * release the bus after transmitting. This must be done when 468 * the transmit shift register is empty, not be done when the 469 * transmit holding register is empty. This functionality 470 * allows an RS485 driver to be written in user space. 471 * ------------------------------------------------------------------- 472 */ 473static unsigned int dz_tx_empty(struct uart_port *uport) 474{ 475 struct dz_port *dport = to_dport(uport); 476 unsigned short tmp, mask = 1 << dport->port.line; 477 478 tmp = dz_in(dport, DZ_TCR); 479 tmp &= mask; 480 481 return tmp ? 0 : TIOCSER_TEMT; 482} 483 484static void dz_break_ctl(struct uart_port *uport, int break_state) 485{ 486 struct dz_port *dport = to_dport(uport); 487 unsigned long flags; 488 unsigned short tmp, mask = 1 << dport->port.line; 489 490 spin_lock_irqsave(&uport->lock, flags); 491 tmp = dz_in(dport, DZ_TCR); 492 if (break_state) 493 tmp |= mask; 494 else 495 tmp &= ~mask; 496 dz_out(dport, DZ_TCR, tmp); 497 spin_unlock_irqrestore(&uport->lock, flags); 498} 499 500static int dz_encode_baud_rate(unsigned int baud) 501{ 502 switch (baud) { 503 case 50: 504 return DZ_B50; 505 case 75: 506 return DZ_B75; 507 case 110: 508 return DZ_B110; 509 case 134: 510 return DZ_B134; 511 case 150: 512 return DZ_B150; 513 case 300: 514 return DZ_B300; 515 case 600: 516 return DZ_B600; 517 case 1200: 518 return DZ_B1200; 519 case 1800: 520 return DZ_B1800; 521 case 2000: 522 return DZ_B2000; 523 case 2400: 524 return DZ_B2400; 525 case 3600: 526 return DZ_B3600; 527 case 4800: 528 return DZ_B4800; 529 case 7200: 530 return DZ_B7200; 531 case 9600: 532 return DZ_B9600; 533 default: 534 return -1; 535 } 536} 537 538 539static void dz_reset(struct dz_port *dport) 540{ 541 struct dz_mux *mux = dport->mux; 542 543 if (mux->initialised) 544 return; 545 546 dz_out(dport, DZ_CSR, DZ_CLR); 547 while (dz_in(dport, DZ_CSR) & DZ_CLR); 548 iob(); 549 550 /* Enable scanning. */ 551 dz_out(dport, DZ_CSR, DZ_MSE); 552 553 mux->initialised = 1; 554} 555 556static void dz_set_termios(struct uart_port *uport, struct ktermios *termios, 557 struct ktermios *old_termios) 558{ 559 struct dz_port *dport = to_dport(uport); 560 unsigned long flags; 561 unsigned int cflag, baud; 562 int bflag; 563 564 cflag = dport->port.line; 565 566 switch (termios->c_cflag & CSIZE) { 567 case CS5: 568 cflag |= DZ_CS5; 569 break; 570 case CS6: 571 cflag |= DZ_CS6; 572 break; 573 case CS7: 574 cflag |= DZ_CS7; 575 break; 576 case CS8: 577 default: 578 cflag |= DZ_CS8; 579 } 580 581 if (termios->c_cflag & CSTOPB) 582 cflag |= DZ_CSTOPB; 583 if (termios->c_cflag & PARENB) 584 cflag |= DZ_PARENB; 585 if (termios->c_cflag & PARODD) 586 cflag |= DZ_PARODD; 587 588 baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600); 589 bflag = dz_encode_baud_rate(baud); 590 if (bflag < 0) { /* Try to keep unchanged. */ 591 baud = uart_get_baud_rate(uport, old_termios, NULL, 50, 9600); 592 bflag = dz_encode_baud_rate(baud); 593 if (bflag < 0) { /* Resort to 9600. */ 594 baud = 9600; 595 bflag = DZ_B9600; 596 } 597 tty_termios_encode_baud_rate(termios, baud, baud); 598 } 599 cflag |= bflag; 600 601 if (termios->c_cflag & CREAD) 602 cflag |= DZ_RXENAB; 603 604 spin_lock_irqsave(&dport->port.lock, flags); 605 606 uart_update_timeout(uport, termios->c_cflag, baud); 607 608 dz_out(dport, DZ_LPR, cflag); 609 dport->cflag = cflag; 610 611 /* setup accept flag */ 612 dport->port.read_status_mask = DZ_OERR; 613 if (termios->c_iflag & INPCK) 614 dport->port.read_status_mask |= DZ_FERR | DZ_PERR; 615 if (termios->c_iflag & (BRKINT | PARMRK)) 616 dport->port.read_status_mask |= DZ_BREAK; 617 618 /* characters to ignore */ 619 uport->ignore_status_mask = 0; 620 if ((termios->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 621 dport->port.ignore_status_mask |= DZ_OERR; 622 if (termios->c_iflag & IGNPAR) 623 dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR; 624 if (termios->c_iflag & IGNBRK) 625 dport->port.ignore_status_mask |= DZ_BREAK; 626 627 spin_unlock_irqrestore(&dport->port.lock, flags); 628} 629 630/* 631 * Hack alert! 632 * Required solely so that the initial PROM-based console 633 * works undisturbed in parallel with this one. 634 */ 635static void dz_pm(struct uart_port *uport, unsigned int state, 636 unsigned int oldstate) 637{ 638 struct dz_port *dport = to_dport(uport); 639 unsigned long flags; 640 641 spin_lock_irqsave(&dport->port.lock, flags); 642 if (state < 3) 643 dz_start_tx(&dport->port); 644 else 645 dz_stop_tx(&dport->port); 646 spin_unlock_irqrestore(&dport->port.lock, flags); 647} 648 649 650static const char *dz_type(struct uart_port *uport) 651{ 652 return "DZ"; 653} 654 655static void dz_release_port(struct uart_port *uport) 656{ 657 struct dz_mux *mux = to_dport(uport)->mux; 658 int map_guard; 659 660 iounmap(uport->membase); 661 uport->membase = NULL; 662 663 map_guard = atomic_add_return(-1, &mux->map_guard); 664 if (!map_guard) 665 release_mem_region(uport->mapbase, dec_kn_slot_size); 666} 667 668static int dz_map_port(struct uart_port *uport) 669{ 670 if (!uport->membase) 671 uport->membase = ioremap_nocache(uport->mapbase, 672 dec_kn_slot_size); 673 if (!uport->membase) { 674 printk(KERN_ERR "dz: Cannot map MMIO\n"); 675 return -ENOMEM; 676 } 677 return 0; 678} 679 680static int dz_request_port(struct uart_port *uport) 681{ 682 struct dz_mux *mux = to_dport(uport)->mux; 683 int map_guard; 684 int ret; 685 686 map_guard = atomic_add_return(1, &mux->map_guard); 687 if (map_guard == 1) { 688 if (!request_mem_region(uport->mapbase, dec_kn_slot_size, 689 "dz")) { 690 atomic_add(-1, &mux->map_guard); 691 printk(KERN_ERR 692 "dz: Unable to reserve MMIO resource\n"); 693 return -EBUSY; 694 } 695 } 696 ret = dz_map_port(uport); 697 if (ret) { 698 map_guard = atomic_add_return(-1, &mux->map_guard); 699 if (!map_guard) 700 release_mem_region(uport->mapbase, dec_kn_slot_size); 701 return ret; 702 } 703 return 0; 704} 705 706static void dz_config_port(struct uart_port *uport, int flags) 707{ 708 struct dz_port *dport = to_dport(uport); 709 710 if (flags & UART_CONFIG_TYPE) { 711 if (dz_request_port(uport)) 712 return; 713 714 uport->type = PORT_DZ; 715 716 dz_reset(dport); 717 } 718} 719 720/* 721 * Verify the new serial_struct (for TIOCSSERIAL). 722 */ 723static int dz_verify_port(struct uart_port *uport, struct serial_struct *ser) 724{ 725 int ret = 0; 726 727 if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ) 728 ret = -EINVAL; 729 if (ser->irq != uport->irq) 730 ret = -EINVAL; 731 return ret; 732} 733 734static struct uart_ops dz_ops = { 735 .tx_empty = dz_tx_empty, 736 .get_mctrl = dz_get_mctrl, 737 .set_mctrl = dz_set_mctrl, 738 .stop_tx = dz_stop_tx, 739 .start_tx = dz_start_tx, 740 .stop_rx = dz_stop_rx, 741 .enable_ms = dz_enable_ms, 742 .break_ctl = dz_break_ctl, 743 .startup = dz_startup, 744 .shutdown = dz_shutdown, 745 .set_termios = dz_set_termios, 746 .pm = dz_pm, 747 .type = dz_type, 748 .release_port = dz_release_port, 749 .request_port = dz_request_port, 750 .config_port = dz_config_port, 751 .verify_port = dz_verify_port, 752}; 753 754static void __init dz_init_ports(void) 755{ 756 static int first = 1; 757 unsigned long base; 758 int line; 759 760 if (!first) 761 return; 762 first = 0; 763 764 if (mips_machtype == MACH_DS23100 || mips_machtype == MACH_DS5100) 765 base = dec_kn_slot_base + KN01_DZ11; 766 else 767 base = dec_kn_slot_base + KN02_DZ11; 768 769 for (line = 0; line < DZ_NB_PORT; line++) { 770 struct dz_port *dport = &dz_mux.dport[line]; 771 struct uart_port *uport = &dport->port; 772 773 dport->mux = &dz_mux; 774 775 uport->irq = dec_interrupt[DEC_IRQ_DZ11]; 776 uport->fifosize = 1; 777 uport->iotype = UPIO_MEM; 778 uport->flags = UPF_BOOT_AUTOCONF; 779 uport->ops = &dz_ops; 780 uport->line = line; 781 uport->mapbase = base; 782 } 783} 784 785#ifdef CONFIG_SERIAL_DZ_CONSOLE 786/* 787 * ------------------------------------------------------------------- 788 * dz_console_putchar() -- transmit a character 789 * 790 * Polled transmission. This is tricky. We need to mask transmit 791 * interrupts so that they do not interfere, enable the transmitter 792 * for the line requested and then wait till the transmit scanner 793 * requests data for this line. But it may request data for another 794 * line first, in which case we have to disable its transmitter and 795 * repeat waiting till our line pops up. Only then the character may 796 * be transmitted. Finally, the state of the transmitter mask is 797 * restored. Welcome to the world of PDP-11! 798 * ------------------------------------------------------------------- 799 */ 800static void dz_console_putchar(struct uart_port *uport, int ch) 801{ 802 struct dz_port *dport = to_dport(uport); 803 unsigned long flags; 804 unsigned short csr, tcr, trdy, mask; 805 int loops = 10000; 806 807 spin_lock_irqsave(&dport->port.lock, flags); 808 csr = dz_in(dport, DZ_CSR); 809 dz_out(dport, DZ_CSR, csr & ~DZ_TIE); 810 tcr = dz_in(dport, DZ_TCR); 811 tcr |= 1 << dport->port.line; 812 mask = tcr; 813 dz_out(dport, DZ_TCR, mask); 814 iob(); 815 spin_unlock_irqrestore(&dport->port.lock, flags); 816 817 do { 818 trdy = dz_in(dport, DZ_CSR); 819 if (!(trdy & DZ_TRDY)) 820 continue; 821 trdy = (trdy & DZ_TLINE) >> 8; 822 if (trdy == dport->port.line) 823 break; 824 mask &= ~(1 << trdy); 825 dz_out(dport, DZ_TCR, mask); 826 iob(); 827 udelay(2); 828 } while (--loops); 829 830 if (loops) /* Cannot send otherwise. */ 831 dz_out(dport, DZ_TDR, ch); 832 833 dz_out(dport, DZ_TCR, tcr); 834 dz_out(dport, DZ_CSR, csr); 835} 836 837/* 838 * ------------------------------------------------------------------- 839 * dz_console_print () 840 * 841 * dz_console_print is registered for printk. 842 * The console must be locked when we get here. 843 * ------------------------------------------------------------------- 844 */ 845static void dz_console_print(struct console *co, 846 const char *str, 847 unsigned int count) 848{ 849 struct dz_port *dport = &dz_mux.dport[co->index]; 850#ifdef DEBUG_DZ 851 prom_printf((char *) str); 852#endif 853 uart_console_write(&dport->port, str, count, dz_console_putchar); 854} 855 856static int __init dz_console_setup(struct console *co, char *options) 857{ 858 struct dz_port *dport = &dz_mux.dport[co->index]; 859 struct uart_port *uport = &dport->port; 860 int baud = 9600; 861 int bits = 8; 862 int parity = 'n'; 863 int flow = 'n'; 864 int ret; 865 866 ret = dz_map_port(uport); 867 if (ret) 868 return ret; 869 870 spin_lock_init(&dport->port.lock); /* For dz_pm(). */ 871 872 dz_reset(dport); 873 dz_pm(uport, 0, -1); 874 875 if (options) 876 uart_parse_options(options, &baud, &parity, &bits, &flow); 877 878 return uart_set_options(&dport->port, co, baud, parity, bits, flow); 879} 880 881static struct uart_driver dz_reg; 882static struct console dz_console = { 883 .name = "ttyS", 884 .write = dz_console_print, 885 .device = uart_console_device, 886 .setup = dz_console_setup, 887 .flags = CON_PRINTBUFFER, 888 .index = -1, 889 .data = &dz_reg, 890}; 891 892static int __init dz_serial_console_init(void) 893{ 894 if (!IOASIC) { 895 dz_init_ports(); 896 register_console(&dz_console); 897 return 0; 898 } else 899 return -ENXIO; 900} 901 902console_initcall(dz_serial_console_init); 903 904#define SERIAL_DZ_CONSOLE &dz_console 905#else 906#define SERIAL_DZ_CONSOLE NULL 907#endif /* CONFIG_SERIAL_DZ_CONSOLE */ 908 909static struct uart_driver dz_reg = { 910 .owner = THIS_MODULE, 911 .driver_name = "serial", 912 .dev_name = "ttyS", 913 .major = TTY_MAJOR, 914 .minor = 64, 915 .nr = DZ_NB_PORT, 916 .cons = SERIAL_DZ_CONSOLE, 917}; 918 919static int __init dz_init(void) 920{ 921 int ret, i; 922 923 if (IOASIC) 924 return -ENXIO; 925 926 printk("%s%s\n", dz_name, dz_version); 927 928 dz_init_ports(); 929 930 ret = uart_register_driver(&dz_reg); 931 if (ret) 932 return ret; 933 934 for (i = 0; i < DZ_NB_PORT; i++) 935 uart_add_one_port(&dz_reg, &dz_mux.dport[i].port); 936 937 return 0; 938} 939 940module_init(dz_init); 941