1/******************************************************************************* 2 STMMAC Ethernet Driver -- MDIO bus implementation 3 Provides Bus interface for MII registers 4 5 Copyright (C) 2007-2009 STMicroelectronics Ltd 6 7 This program is free software; you can redistribute it and/or modify it 8 under the terms and conditions of the GNU General Public License, 9 version 2, as published by the Free Software Foundation. 10 11 This program is distributed in the hope it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 more details. 15 16 You should have received a copy of the GNU General Public License along with 17 this program; if not, write to the Free Software Foundation, Inc., 18 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 19 20 The full GNU General Public License is included in this distribution in 21 the file called "COPYING". 22 23 Author: Carl Shaw <carl.shaw@st.com> 24 Maintainer: Giuseppe Cavallaro <peppe.cavallaro@st.com> 25*******************************************************************************/ 26 27#include <linux/mii.h> 28#include <linux/phy.h> 29#include <linux/slab.h> 30 31#include "stmmac.h" 32 33#define MII_BUSY 0x00000001 34#define MII_WRITE 0x00000002 35 36/** 37 * stmmac_mdio_read 38 * @bus: points to the mii_bus structure 39 * @phyaddr: MII addr reg bits 15-11 40 * @phyreg: MII addr reg bits 10-6 41 * Description: it reads data from the MII register from within the phy device. 42 * For the 7111 GMAC, we must set the bit 0 in the MII address register while 43 * accessing the PHY registers. 44 * Fortunately, it seems this has no drawback for the 7109 MAC. 45 */ 46static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg) 47{ 48 struct net_device *ndev = bus->priv; 49 struct stmmac_priv *priv = netdev_priv(ndev); 50 unsigned long ioaddr = ndev->base_addr; 51 unsigned int mii_address = priv->hw->mii.addr; 52 unsigned int mii_data = priv->hw->mii.data; 53 54 int data; 55 u16 regValue = (((phyaddr << 11) & (0x0000F800)) | 56 ((phyreg << 6) & (0x000007C0))); 57 regValue |= MII_BUSY; /* in case of GMAC */ 58 59 do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1); 60 writel(regValue, ioaddr + mii_address); 61 do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1); 62 63 /* Read the data from the MII data register */ 64 data = (int)readl(ioaddr + mii_data); 65 66 return data; 67} 68 69/** 70 * stmmac_mdio_write 71 * @bus: points to the mii_bus structure 72 * @phyaddr: MII addr reg bits 15-11 73 * @phyreg: MII addr reg bits 10-6 74 * @phydata: phy data 75 * Description: it writes the data into the MII register from within the device. 76 */ 77static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg, 78 u16 phydata) 79{ 80 struct net_device *ndev = bus->priv; 81 struct stmmac_priv *priv = netdev_priv(ndev); 82 unsigned long ioaddr = ndev->base_addr; 83 unsigned int mii_address = priv->hw->mii.addr; 84 unsigned int mii_data = priv->hw->mii.data; 85 86 u16 value = 87 (((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0))) 88 | MII_WRITE; 89 90 value |= MII_BUSY; 91 92 /* Wait until any existing MII operation is complete */ 93 do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1); 94 95 /* Set the MII address register to write */ 96 writel(phydata, ioaddr + mii_data); 97 writel(value, ioaddr + mii_address); 98 99 /* Wait until any existing MII operation is complete */ 100 do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1); 101 102 return 0; 103} 104 105/** 106 * stmmac_mdio_reset 107 * @bus: points to the mii_bus structure 108 * Description: reset the MII bus 109 */ 110static int stmmac_mdio_reset(struct mii_bus *bus) 111{ 112 struct net_device *ndev = bus->priv; 113 struct stmmac_priv *priv = netdev_priv(ndev); 114 unsigned long ioaddr = ndev->base_addr; 115 unsigned int mii_address = priv->hw->mii.addr; 116 117 if (priv->phy_reset) { 118 pr_debug("stmmac_mdio_reset: calling phy_reset\n"); 119 priv->phy_reset(priv->bsp_priv); 120 } 121 122 writel(0, ioaddr + mii_address); 123 124 return 0; 125} 126 127/** 128 * stmmac_mdio_register 129 * @ndev: net device structure 130 * Description: it registers the MII bus 131 */ 132int stmmac_mdio_register(struct net_device *ndev) 133{ 134 int err = 0; 135 struct mii_bus *new_bus; 136 int *irqlist; 137 struct stmmac_priv *priv = netdev_priv(ndev); 138 int addr, found; 139 140 new_bus = mdiobus_alloc(); 141 if (new_bus == NULL) 142 return -ENOMEM; 143 144 irqlist = kzalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL); 145 if (irqlist == NULL) { 146 err = -ENOMEM; 147 goto irqlist_alloc_fail; 148 } 149 150 /* Assign IRQ to phy at address phy_addr */ 151 if (priv->phy_addr != -1) 152 irqlist[priv->phy_addr] = priv->phy_irq; 153 154 new_bus->name = "STMMAC MII Bus"; 155 new_bus->read = &stmmac_mdio_read; 156 new_bus->write = &stmmac_mdio_write; 157 new_bus->reset = &stmmac_mdio_reset; 158 snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", priv->bus_id); 159 new_bus->priv = ndev; 160 new_bus->irq = irqlist; 161 new_bus->phy_mask = priv->phy_mask; 162 new_bus->parent = priv->device; 163 err = mdiobus_register(new_bus); 164 if (err != 0) { 165 pr_err("%s: Cannot register as MDIO bus\n", new_bus->name); 166 goto bus_register_fail; 167 } 168 169 priv->mii = new_bus; 170 171 found = 0; 172 for (addr = 0; addr < 32; addr++) { 173 struct phy_device *phydev = new_bus->phy_map[addr]; 174 if (phydev) { 175 if (priv->phy_addr == -1) { 176 priv->phy_addr = addr; 177 phydev->irq = priv->phy_irq; 178 irqlist[addr] = priv->phy_irq; 179 } 180 pr_info("%s: PHY ID %08x at %d IRQ %d (%s)%s\n", 181 ndev->name, phydev->phy_id, addr, 182 phydev->irq, dev_name(&phydev->dev), 183 (addr == priv->phy_addr) ? " active" : ""); 184 found = 1; 185 } 186 } 187 188 if (!found) 189 pr_warning("%s: No PHY found\n", ndev->name); 190 191 return 0; 192bus_register_fail: 193 kfree(irqlist); 194irqlist_alloc_fail: 195 kfree(new_bus); 196 return err; 197} 198 199/** 200 * stmmac_mdio_unregister 201 * @ndev: net device structure 202 * Description: it unregisters the MII bus 203 */ 204int stmmac_mdio_unregister(struct net_device *ndev) 205{ 206 struct stmmac_priv *priv = netdev_priv(ndev); 207 208 mdiobus_unregister(priv->mii); 209 priv->mii->priv = NULL; 210 kfree(priv->mii); 211 212 return 0; 213} 214