1/* 2 * sonic.c 3 * 4 * (C) 2005 Finn Thain 5 * 6 * Converted to DMA API, added zero-copy buffer handling, and 7 * (from the mac68k project) introduced dhd's support for 16-bit cards. 8 * 9 * (C) 1996,1998 by Thomas Bogendoerfer (tsbogend@alpha.franken.de) 10 * 11 * This driver is based on work from Andreas Busse, but most of 12 * the code is rewritten. 13 * 14 * (C) 1995 by Andreas Busse (andy@waldorf-gmbh.de) 15 * 16 * Core code included by system sonic drivers 17 * 18 * And... partially rewritten again by David Huggins-Daines in order 19 * to cope with screwed up Macintosh NICs that may or may not use 20 * 16-bit DMA. 21 * 22 * (C) 1999 David Huggins-Daines <dhd@debian.org> 23 * 24 */ 25 26/* 27 * Sources: Olivetti M700-10 Risc Personal Computer hardware handbook, 28 * National Semiconductors data sheet for the DP83932B Sonic Ethernet 29 * controller, and the files "8390.c" and "skeleton.c" in this directory. 30 * 31 * Additional sources: Nat Semi data sheet for the DP83932C and Nat Semi 32 * Application Note AN-746, the files "lance.c" and "ibmlana.c". See also 33 * the NetBSD file "sys/arch/mac68k/dev/if_sn.c". 34 */ 35 36 37 38/* 39 * Open/initialize the SONIC controller. 40 * 41 * This routine should set everything up anew at each open, even 42 * registers that "should" only need to be set once at boot, so that 43 * there is non-reboot way to recover if something goes wrong. 44 */ 45static int sonic_open(struct net_device *dev) 46{ 47 struct sonic_local *lp = netdev_priv(dev); 48 int i; 49 50 if (sonic_debug > 2) 51 printk("sonic_open: initializing sonic driver.\n"); 52 53 for (i = 0; i < SONIC_NUM_RRS; i++) { 54 struct sk_buff *skb = dev_alloc_skb(SONIC_RBSIZE + 2); 55 if (skb == NULL) { 56 while(i > 0) { /* free any that were allocated successfully */ 57 i--; 58 dev_kfree_skb(lp->rx_skb[i]); 59 lp->rx_skb[i] = NULL; 60 } 61 printk(KERN_ERR "%s: couldn't allocate receive buffers\n", 62 dev->name); 63 return -ENOMEM; 64 } 65 /* align IP header unless DMA requires otherwise */ 66 if (SONIC_BUS_SCALE(lp->dma_bitmode) == 2) 67 skb_reserve(skb, 2); 68 lp->rx_skb[i] = skb; 69 } 70 71 for (i = 0; i < SONIC_NUM_RRS; i++) { 72 dma_addr_t laddr = dma_map_single(lp->device, skb_put(lp->rx_skb[i], SONIC_RBSIZE), 73 SONIC_RBSIZE, DMA_FROM_DEVICE); 74 if (!laddr) { 75 while(i > 0) { /* free any that were mapped successfully */ 76 i--; 77 dma_unmap_single(lp->device, lp->rx_laddr[i], SONIC_RBSIZE, DMA_FROM_DEVICE); 78 lp->rx_laddr[i] = (dma_addr_t)0; 79 } 80 for (i = 0; i < SONIC_NUM_RRS; i++) { 81 dev_kfree_skb(lp->rx_skb[i]); 82 lp->rx_skb[i] = NULL; 83 } 84 printk(KERN_ERR "%s: couldn't map rx DMA buffers\n", 85 dev->name); 86 return -ENOMEM; 87 } 88 lp->rx_laddr[i] = laddr; 89 } 90 91 /* 92 * Initialize the SONIC 93 */ 94 sonic_init(dev); 95 96 netif_start_queue(dev); 97 98 if (sonic_debug > 2) 99 printk("sonic_open: Initialization done.\n"); 100 101 return 0; 102} 103 104 105/* 106 * Close the SONIC device 107 */ 108static int sonic_close(struct net_device *dev) 109{ 110 struct sonic_local *lp = netdev_priv(dev); 111 int i; 112 113 if (sonic_debug > 2) 114 printk("sonic_close\n"); 115 116 netif_stop_queue(dev); 117 118 /* 119 * stop the SONIC, disable interrupts 120 */ 121 SONIC_WRITE(SONIC_IMR, 0); 122 SONIC_WRITE(SONIC_ISR, 0x7fff); 123 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST); 124 125 /* unmap and free skbs that haven't been transmitted */ 126 for (i = 0; i < SONIC_NUM_TDS; i++) { 127 if(lp->tx_laddr[i]) { 128 dma_unmap_single(lp->device, lp->tx_laddr[i], lp->tx_len[i], DMA_TO_DEVICE); 129 lp->tx_laddr[i] = (dma_addr_t)0; 130 } 131 if(lp->tx_skb[i]) { 132 dev_kfree_skb(lp->tx_skb[i]); 133 lp->tx_skb[i] = NULL; 134 } 135 } 136 137 /* unmap and free the receive buffers */ 138 for (i = 0; i < SONIC_NUM_RRS; i++) { 139 if(lp->rx_laddr[i]) { 140 dma_unmap_single(lp->device, lp->rx_laddr[i], SONIC_RBSIZE, DMA_FROM_DEVICE); 141 lp->rx_laddr[i] = (dma_addr_t)0; 142 } 143 if(lp->rx_skb[i]) { 144 dev_kfree_skb(lp->rx_skb[i]); 145 lp->rx_skb[i] = NULL; 146 } 147 } 148 149 return 0; 150} 151 152static void sonic_tx_timeout(struct net_device *dev) 153{ 154 struct sonic_local *lp = netdev_priv(dev); 155 int i; 156 /* 157 * put the Sonic into software-reset mode and 158 * disable all interrupts before releasing DMA buffers 159 */ 160 SONIC_WRITE(SONIC_IMR, 0); 161 SONIC_WRITE(SONIC_ISR, 0x7fff); 162 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST); 163 /* We could resend the original skbs. Easier to re-initialise. */ 164 for (i = 0; i < SONIC_NUM_TDS; i++) { 165 if(lp->tx_laddr[i]) { 166 dma_unmap_single(lp->device, lp->tx_laddr[i], lp->tx_len[i], DMA_TO_DEVICE); 167 lp->tx_laddr[i] = (dma_addr_t)0; 168 } 169 if(lp->tx_skb[i]) { 170 dev_kfree_skb(lp->tx_skb[i]); 171 lp->tx_skb[i] = NULL; 172 } 173 } 174 /* Try to restart the adaptor. */ 175 sonic_init(dev); 176 lp->stats.tx_errors++; 177 dev->trans_start = jiffies; /* prevent tx timeout */ 178 netif_wake_queue(dev); 179} 180 181/* 182 * transmit packet 183 * 184 * Appends new TD during transmission thus avoiding any TX interrupts 185 * until we run out of TDs. 186 * This routine interacts closely with the ISR in that it may, 187 * set tx_skb[i] 188 * reset the status flags of the new TD 189 * set and reset EOL flags 190 * stop the tx queue 191 * The ISR interacts with this routine in various ways. It may, 192 * reset tx_skb[i] 193 * test the EOL and status flags of the TDs 194 * wake the tx queue 195 * Concurrently with all of this, the SONIC is potentially writing to 196 * the status flags of the TDs. 197 * Until some mutual exclusion is added, this code will not work with SMP. However, 198 * MIPS Jazz machines and m68k Macs were all uni-processor machines. 199 */ 200 201static int sonic_send_packet(struct sk_buff *skb, struct net_device *dev) 202{ 203 struct sonic_local *lp = netdev_priv(dev); 204 dma_addr_t laddr; 205 int length; 206 int entry = lp->next_tx; 207 208 if (sonic_debug > 2) 209 printk("sonic_send_packet: skb=%p, dev=%p\n", skb, dev); 210 211 length = skb->len; 212 if (length < ETH_ZLEN) { 213 if (skb_padto(skb, ETH_ZLEN)) 214 return NETDEV_TX_OK; 215 length = ETH_ZLEN; 216 } 217 218 /* 219 * Map the packet data into the logical DMA address space 220 */ 221 222 laddr = dma_map_single(lp->device, skb->data, length, DMA_TO_DEVICE); 223 if (!laddr) { 224 printk(KERN_ERR "%s: failed to map tx DMA buffer.\n", dev->name); 225 dev_kfree_skb(skb); 226 return NETDEV_TX_BUSY; 227 } 228 229 sonic_tda_put(dev, entry, SONIC_TD_STATUS, 0); /* clear status */ 230 sonic_tda_put(dev, entry, SONIC_TD_FRAG_COUNT, 1); /* single fragment */ 231 sonic_tda_put(dev, entry, SONIC_TD_PKTSIZE, length); /* length of packet */ 232 sonic_tda_put(dev, entry, SONIC_TD_FRAG_PTR_L, laddr & 0xffff); 233 sonic_tda_put(dev, entry, SONIC_TD_FRAG_PTR_H, laddr >> 16); 234 sonic_tda_put(dev, entry, SONIC_TD_FRAG_SIZE, length); 235 sonic_tda_put(dev, entry, SONIC_TD_LINK, 236 sonic_tda_get(dev, entry, SONIC_TD_LINK) | SONIC_EOL); 237 238 /* 239 * Must set tx_skb[entry] only after clearing status, and 240 * before clearing EOL and before stopping queue 241 */ 242 wmb(); 243 lp->tx_len[entry] = length; 244 lp->tx_laddr[entry] = laddr; 245 lp->tx_skb[entry] = skb; 246 247 wmb(); 248 sonic_tda_put(dev, lp->eol_tx, SONIC_TD_LINK, 249 sonic_tda_get(dev, lp->eol_tx, SONIC_TD_LINK) & ~SONIC_EOL); 250 lp->eol_tx = entry; 251 252 lp->next_tx = (entry + 1) & SONIC_TDS_MASK; 253 if (lp->tx_skb[lp->next_tx] != NULL) { 254 /* The ring is full, the ISR has yet to process the next TD. */ 255 if (sonic_debug > 3) 256 printk("%s: stopping queue\n", dev->name); 257 netif_stop_queue(dev); 258 /* after this packet, wait for ISR to free up some TDAs */ 259 } else netif_start_queue(dev); 260 261 if (sonic_debug > 2) 262 printk("sonic_send_packet: issuing Tx command\n"); 263 264 SONIC_WRITE(SONIC_CMD, SONIC_CR_TXP); 265 266 return NETDEV_TX_OK; 267} 268 269/* 270 * The typical workload of the driver: 271 * Handle the network interface interrupts. 272 */ 273static irqreturn_t sonic_interrupt(int irq, void *dev_id) 274{ 275 struct net_device *dev = dev_id; 276 struct sonic_local *lp = netdev_priv(dev); 277 int status; 278 279 if (!(status = SONIC_READ(SONIC_ISR) & SONIC_IMR_DEFAULT)) 280 return IRQ_NONE; 281 282 do { 283 if (status & SONIC_INT_PKTRX) { 284 if (sonic_debug > 2) 285 printk("%s: packet rx\n", dev->name); 286 sonic_rx(dev); /* got packet(s) */ 287 SONIC_WRITE(SONIC_ISR, SONIC_INT_PKTRX); /* clear the interrupt */ 288 } 289 290 if (status & SONIC_INT_TXDN) { 291 int entry = lp->cur_tx; 292 int td_status; 293 int freed_some = 0; 294 295 /* At this point, cur_tx is the index of a TD that is one of: 296 * unallocated/freed (status set & tx_skb[entry] clear) 297 * allocated and sent (status set & tx_skb[entry] set ) 298 * allocated and not yet sent (status clear & tx_skb[entry] set ) 299 * still being allocated by sonic_send_packet (status clear & tx_skb[entry] clear) 300 */ 301 302 if (sonic_debug > 2) 303 printk("%s: tx done\n", dev->name); 304 305 while (lp->tx_skb[entry] != NULL) { 306 if ((td_status = sonic_tda_get(dev, entry, SONIC_TD_STATUS)) == 0) 307 break; 308 309 if (td_status & 0x0001) { 310 lp->stats.tx_packets++; 311 lp->stats.tx_bytes += sonic_tda_get(dev, entry, SONIC_TD_PKTSIZE); 312 } else { 313 lp->stats.tx_errors++; 314 if (td_status & 0x0642) 315 lp->stats.tx_aborted_errors++; 316 if (td_status & 0x0180) 317 lp->stats.tx_carrier_errors++; 318 if (td_status & 0x0020) 319 lp->stats.tx_window_errors++; 320 if (td_status & 0x0004) 321 lp->stats.tx_fifo_errors++; 322 } 323 324 /* We must free the original skb */ 325 dev_kfree_skb_irq(lp->tx_skb[entry]); 326 lp->tx_skb[entry] = NULL; 327 /* and unmap DMA buffer */ 328 dma_unmap_single(lp->device, lp->tx_laddr[entry], lp->tx_len[entry], DMA_TO_DEVICE); 329 lp->tx_laddr[entry] = (dma_addr_t)0; 330 freed_some = 1; 331 332 if (sonic_tda_get(dev, entry, SONIC_TD_LINK) & SONIC_EOL) { 333 entry = (entry + 1) & SONIC_TDS_MASK; 334 break; 335 } 336 entry = (entry + 1) & SONIC_TDS_MASK; 337 } 338 339 if (freed_some || lp->tx_skb[entry] == NULL) 340 netif_wake_queue(dev); /* The ring is no longer full */ 341 lp->cur_tx = entry; 342 SONIC_WRITE(SONIC_ISR, SONIC_INT_TXDN); /* clear the interrupt */ 343 } 344 345 /* 346 * check error conditions 347 */ 348 if (status & SONIC_INT_RFO) { 349 if (sonic_debug > 1) 350 printk("%s: rx fifo overrun\n", dev->name); 351 lp->stats.rx_fifo_errors++; 352 SONIC_WRITE(SONIC_ISR, SONIC_INT_RFO); /* clear the interrupt */ 353 } 354 if (status & SONIC_INT_RDE) { 355 if (sonic_debug > 1) 356 printk("%s: rx descriptors exhausted\n", dev->name); 357 lp->stats.rx_dropped++; 358 SONIC_WRITE(SONIC_ISR, SONIC_INT_RDE); /* clear the interrupt */ 359 } 360 if (status & SONIC_INT_RBAE) { 361 if (sonic_debug > 1) 362 printk("%s: rx buffer area exceeded\n", dev->name); 363 lp->stats.rx_dropped++; 364 SONIC_WRITE(SONIC_ISR, SONIC_INT_RBAE); /* clear the interrupt */ 365 } 366 367 /* counter overruns; all counters are 16bit wide */ 368 if (status & SONIC_INT_FAE) { 369 lp->stats.rx_frame_errors += 65536; 370 SONIC_WRITE(SONIC_ISR, SONIC_INT_FAE); /* clear the interrupt */ 371 } 372 if (status & SONIC_INT_CRC) { 373 lp->stats.rx_crc_errors += 65536; 374 SONIC_WRITE(SONIC_ISR, SONIC_INT_CRC); /* clear the interrupt */ 375 } 376 if (status & SONIC_INT_MP) { 377 lp->stats.rx_missed_errors += 65536; 378 SONIC_WRITE(SONIC_ISR, SONIC_INT_MP); /* clear the interrupt */ 379 } 380 381 /* transmit error */ 382 if (status & SONIC_INT_TXER) { 383 if ((SONIC_READ(SONIC_TCR) & SONIC_TCR_FU) && (sonic_debug > 2)) 384 printk(KERN_ERR "%s: tx fifo underrun\n", dev->name); 385 SONIC_WRITE(SONIC_ISR, SONIC_INT_TXER); /* clear the interrupt */ 386 } 387 388 /* bus retry */ 389 if (status & SONIC_INT_BR) { 390 printk(KERN_ERR "%s: Bus retry occurred! Device interrupt disabled.\n", 391 dev->name); 392 /* ... to help debug DMA problems causing endless interrupts. */ 393 /* Bounce the eth interface to turn on the interrupt again. */ 394 SONIC_WRITE(SONIC_IMR, 0); 395 SONIC_WRITE(SONIC_ISR, SONIC_INT_BR); /* clear the interrupt */ 396 } 397 398 /* load CAM done */ 399 if (status & SONIC_INT_LCD) 400 SONIC_WRITE(SONIC_ISR, SONIC_INT_LCD); /* clear the interrupt */ 401 } while((status = SONIC_READ(SONIC_ISR) & SONIC_IMR_DEFAULT)); 402 return IRQ_HANDLED; 403} 404 405/* 406 * We have a good packet(s), pass it/them up the network stack. 407 */ 408static void sonic_rx(struct net_device *dev) 409{ 410 struct sonic_local *lp = netdev_priv(dev); 411 int status; 412 int entry = lp->cur_rx; 413 414 while (sonic_rda_get(dev, entry, SONIC_RD_IN_USE) == 0) { 415 struct sk_buff *used_skb; 416 struct sk_buff *new_skb; 417 dma_addr_t new_laddr; 418 u16 bufadr_l; 419 u16 bufadr_h; 420 int pkt_len; 421 422 status = sonic_rda_get(dev, entry, SONIC_RD_STATUS); 423 if (status & SONIC_RCR_PRX) { 424 /* Malloc up new buffer. */ 425 new_skb = dev_alloc_skb(SONIC_RBSIZE + 2); 426 if (new_skb == NULL) { 427 printk(KERN_ERR "%s: Memory squeeze, dropping packet.\n", dev->name); 428 lp->stats.rx_dropped++; 429 break; 430 } 431 /* provide 16 byte IP header alignment unless DMA requires otherwise */ 432 if(SONIC_BUS_SCALE(lp->dma_bitmode) == 2) 433 skb_reserve(new_skb, 2); 434 435 new_laddr = dma_map_single(lp->device, skb_put(new_skb, SONIC_RBSIZE), 436 SONIC_RBSIZE, DMA_FROM_DEVICE); 437 if (!new_laddr) { 438 dev_kfree_skb(new_skb); 439 printk(KERN_ERR "%s: Failed to map rx buffer, dropping packet.\n", dev->name); 440 lp->stats.rx_dropped++; 441 break; 442 } 443 444 /* now we have a new skb to replace it, pass the used one up the stack */ 445 dma_unmap_single(lp->device, lp->rx_laddr[entry], SONIC_RBSIZE, DMA_FROM_DEVICE); 446 used_skb = lp->rx_skb[entry]; 447 pkt_len = sonic_rda_get(dev, entry, SONIC_RD_PKTLEN); 448 skb_trim(used_skb, pkt_len); 449 used_skb->protocol = eth_type_trans(used_skb, dev); 450 netif_rx(used_skb); 451 lp->stats.rx_packets++; 452 lp->stats.rx_bytes += pkt_len; 453 454 /* and insert the new skb */ 455 lp->rx_laddr[entry] = new_laddr; 456 lp->rx_skb[entry] = new_skb; 457 458 bufadr_l = (unsigned long)new_laddr & 0xffff; 459 bufadr_h = (unsigned long)new_laddr >> 16; 460 sonic_rra_put(dev, entry, SONIC_RR_BUFADR_L, bufadr_l); 461 sonic_rra_put(dev, entry, SONIC_RR_BUFADR_H, bufadr_h); 462 } else { 463 /* This should only happen, if we enable accepting broken packets. */ 464 lp->stats.rx_errors++; 465 if (status & SONIC_RCR_FAER) 466 lp->stats.rx_frame_errors++; 467 if (status & SONIC_RCR_CRCR) 468 lp->stats.rx_crc_errors++; 469 } 470 if (status & SONIC_RCR_LPKT) { 471 /* 472 * this was the last packet out of the current receive buffer 473 * give the buffer back to the SONIC 474 */ 475 lp->cur_rwp += SIZEOF_SONIC_RR * SONIC_BUS_SCALE(lp->dma_bitmode); 476 if (lp->cur_rwp >= lp->rra_end) lp->cur_rwp = lp->rra_laddr & 0xffff; 477 SONIC_WRITE(SONIC_RWP, lp->cur_rwp); 478 if (SONIC_READ(SONIC_ISR) & SONIC_INT_RBE) { 479 if (sonic_debug > 2) 480 printk("%s: rx buffer exhausted\n", dev->name); 481 SONIC_WRITE(SONIC_ISR, SONIC_INT_RBE); /* clear the flag */ 482 } 483 } else 484 printk(KERN_ERR "%s: rx desc without RCR_LPKT. Shouldn't happen !?\n", 485 dev->name); 486 /* 487 * give back the descriptor 488 */ 489 sonic_rda_put(dev, entry, SONIC_RD_LINK, 490 sonic_rda_get(dev, entry, SONIC_RD_LINK) | SONIC_EOL); 491 sonic_rda_put(dev, entry, SONIC_RD_IN_USE, 1); 492 sonic_rda_put(dev, lp->eol_rx, SONIC_RD_LINK, 493 sonic_rda_get(dev, lp->eol_rx, SONIC_RD_LINK) & ~SONIC_EOL); 494 lp->eol_rx = entry; 495 lp->cur_rx = entry = (entry + 1) & SONIC_RDS_MASK; 496 } 497 /* 498 * If any worth-while packets have been received, netif_rx() 499 * has done a mark_bh(NET_BH) for us and will work on them 500 * when we get to the bottom-half routine. 501 */ 502} 503 504 505/* 506 * Get the current statistics. 507 * This may be called with the device open or closed. 508 */ 509static struct net_device_stats *sonic_get_stats(struct net_device *dev) 510{ 511 struct sonic_local *lp = netdev_priv(dev); 512 513 /* read the tally counter from the SONIC and reset them */ 514 lp->stats.rx_crc_errors += SONIC_READ(SONIC_CRCT); 515 SONIC_WRITE(SONIC_CRCT, 0xffff); 516 lp->stats.rx_frame_errors += SONIC_READ(SONIC_FAET); 517 SONIC_WRITE(SONIC_FAET, 0xffff); 518 lp->stats.rx_missed_errors += SONIC_READ(SONIC_MPT); 519 SONIC_WRITE(SONIC_MPT, 0xffff); 520 521 return &lp->stats; 522} 523 524 525/* 526 * Set or clear the multicast filter for this adaptor. 527 */ 528static void sonic_multicast_list(struct net_device *dev) 529{ 530 struct sonic_local *lp = netdev_priv(dev); 531 unsigned int rcr; 532 struct netdev_hw_addr *ha; 533 unsigned char *addr; 534 int i; 535 536 rcr = SONIC_READ(SONIC_RCR) & ~(SONIC_RCR_PRO | SONIC_RCR_AMC); 537 rcr |= SONIC_RCR_BRD; /* accept broadcast packets */ 538 539 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */ 540 rcr |= SONIC_RCR_PRO; 541 } else { 542 if ((dev->flags & IFF_ALLMULTI) || 543 (netdev_mc_count(dev) > 15)) { 544 rcr |= SONIC_RCR_AMC; 545 } else { 546 if (sonic_debug > 2) 547 printk("sonic_multicast_list: mc_count %d\n", 548 netdev_mc_count(dev)); 549 sonic_set_cam_enable(dev, 1); /* always enable our own address */ 550 i = 1; 551 netdev_for_each_mc_addr(ha, dev) { 552 addr = ha->addr; 553 sonic_cda_put(dev, i, SONIC_CD_CAP0, addr[1] << 8 | addr[0]); 554 sonic_cda_put(dev, i, SONIC_CD_CAP1, addr[3] << 8 | addr[2]); 555 sonic_cda_put(dev, i, SONIC_CD_CAP2, addr[5] << 8 | addr[4]); 556 sonic_set_cam_enable(dev, sonic_get_cam_enable(dev) | (1 << i)); 557 i++; 558 } 559 SONIC_WRITE(SONIC_CDC, 16); 560 /* issue Load CAM command */ 561 SONIC_WRITE(SONIC_CDP, lp->cda_laddr & 0xffff); 562 SONIC_WRITE(SONIC_CMD, SONIC_CR_LCAM); 563 } 564 } 565 566 if (sonic_debug > 2) 567 printk("sonic_multicast_list: setting RCR=%x\n", rcr); 568 569 SONIC_WRITE(SONIC_RCR, rcr); 570} 571 572 573/* 574 * Initialize the SONIC ethernet controller. 575 */ 576static int sonic_init(struct net_device *dev) 577{ 578 unsigned int cmd; 579 struct sonic_local *lp = netdev_priv(dev); 580 int i; 581 582 /* 583 * put the Sonic into software-reset mode and 584 * disable all interrupts 585 */ 586 SONIC_WRITE(SONIC_IMR, 0); 587 SONIC_WRITE(SONIC_ISR, 0x7fff); 588 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST); 589 590 /* 591 * clear software reset flag, disable receiver, clear and 592 * enable interrupts, then completely initialize the SONIC 593 */ 594 SONIC_WRITE(SONIC_CMD, 0); 595 SONIC_WRITE(SONIC_CMD, SONIC_CR_RXDIS); 596 597 /* 598 * initialize the receive resource area 599 */ 600 if (sonic_debug > 2) 601 printk("sonic_init: initialize receive resource area\n"); 602 603 for (i = 0; i < SONIC_NUM_RRS; i++) { 604 u16 bufadr_l = (unsigned long)lp->rx_laddr[i] & 0xffff; 605 u16 bufadr_h = (unsigned long)lp->rx_laddr[i] >> 16; 606 sonic_rra_put(dev, i, SONIC_RR_BUFADR_L, bufadr_l); 607 sonic_rra_put(dev, i, SONIC_RR_BUFADR_H, bufadr_h); 608 sonic_rra_put(dev, i, SONIC_RR_BUFSIZE_L, SONIC_RBSIZE >> 1); 609 sonic_rra_put(dev, i, SONIC_RR_BUFSIZE_H, 0); 610 } 611 612 /* initialize all RRA registers */ 613 lp->rra_end = (lp->rra_laddr + SONIC_NUM_RRS * SIZEOF_SONIC_RR * 614 SONIC_BUS_SCALE(lp->dma_bitmode)) & 0xffff; 615 lp->cur_rwp = (lp->rra_laddr + (SONIC_NUM_RRS - 1) * SIZEOF_SONIC_RR * 616 SONIC_BUS_SCALE(lp->dma_bitmode)) & 0xffff; 617 618 SONIC_WRITE(SONIC_RSA, lp->rra_laddr & 0xffff); 619 SONIC_WRITE(SONIC_REA, lp->rra_end); 620 SONIC_WRITE(SONIC_RRP, lp->rra_laddr & 0xffff); 621 SONIC_WRITE(SONIC_RWP, lp->cur_rwp); 622 SONIC_WRITE(SONIC_URRA, lp->rra_laddr >> 16); 623 SONIC_WRITE(SONIC_EOBC, (SONIC_RBSIZE >> 1) - (lp->dma_bitmode ? 2 : 1)); 624 625 /* load the resource pointers */ 626 if (sonic_debug > 3) 627 printk("sonic_init: issuing RRRA command\n"); 628 629 SONIC_WRITE(SONIC_CMD, SONIC_CR_RRRA); 630 i = 0; 631 while (i++ < 100) { 632 if (SONIC_READ(SONIC_CMD) & SONIC_CR_RRRA) 633 break; 634 } 635 636 if (sonic_debug > 2) 637 printk("sonic_init: status=%x i=%d\n", SONIC_READ(SONIC_CMD), i); 638 639 /* 640 * Initialize the receive descriptors so that they 641 * become a circular linked list, ie. let the last 642 * descriptor point to the first again. 643 */ 644 if (sonic_debug > 2) 645 printk("sonic_init: initialize receive descriptors\n"); 646 for (i=0; i<SONIC_NUM_RDS; i++) { 647 sonic_rda_put(dev, i, SONIC_RD_STATUS, 0); 648 sonic_rda_put(dev, i, SONIC_RD_PKTLEN, 0); 649 sonic_rda_put(dev, i, SONIC_RD_PKTPTR_L, 0); 650 sonic_rda_put(dev, i, SONIC_RD_PKTPTR_H, 0); 651 sonic_rda_put(dev, i, SONIC_RD_SEQNO, 0); 652 sonic_rda_put(dev, i, SONIC_RD_IN_USE, 1); 653 sonic_rda_put(dev, i, SONIC_RD_LINK, 654 lp->rda_laddr + 655 ((i+1) * SIZEOF_SONIC_RD * SONIC_BUS_SCALE(lp->dma_bitmode))); 656 } 657 /* fix last descriptor */ 658 sonic_rda_put(dev, SONIC_NUM_RDS - 1, SONIC_RD_LINK, 659 (lp->rda_laddr & 0xffff) | SONIC_EOL); 660 lp->eol_rx = SONIC_NUM_RDS - 1; 661 lp->cur_rx = 0; 662 SONIC_WRITE(SONIC_URDA, lp->rda_laddr >> 16); 663 SONIC_WRITE(SONIC_CRDA, lp->rda_laddr & 0xffff); 664 665 /* 666 * initialize transmit descriptors 667 */ 668 if (sonic_debug > 2) 669 printk("sonic_init: initialize transmit descriptors\n"); 670 for (i = 0; i < SONIC_NUM_TDS; i++) { 671 sonic_tda_put(dev, i, SONIC_TD_STATUS, 0); 672 sonic_tda_put(dev, i, SONIC_TD_CONFIG, 0); 673 sonic_tda_put(dev, i, SONIC_TD_PKTSIZE, 0); 674 sonic_tda_put(dev, i, SONIC_TD_FRAG_COUNT, 0); 675 sonic_tda_put(dev, i, SONIC_TD_LINK, 676 (lp->tda_laddr & 0xffff) + 677 (i + 1) * SIZEOF_SONIC_TD * SONIC_BUS_SCALE(lp->dma_bitmode)); 678 lp->tx_skb[i] = NULL; 679 } 680 /* fix last descriptor */ 681 sonic_tda_put(dev, SONIC_NUM_TDS - 1, SONIC_TD_LINK, 682 (lp->tda_laddr & 0xffff)); 683 684 SONIC_WRITE(SONIC_UTDA, lp->tda_laddr >> 16); 685 SONIC_WRITE(SONIC_CTDA, lp->tda_laddr & 0xffff); 686 lp->cur_tx = lp->next_tx = 0; 687 lp->eol_tx = SONIC_NUM_TDS - 1; 688 689 /* 690 * put our own address to CAM desc[0] 691 */ 692 sonic_cda_put(dev, 0, SONIC_CD_CAP0, dev->dev_addr[1] << 8 | dev->dev_addr[0]); 693 sonic_cda_put(dev, 0, SONIC_CD_CAP1, dev->dev_addr[3] << 8 | dev->dev_addr[2]); 694 sonic_cda_put(dev, 0, SONIC_CD_CAP2, dev->dev_addr[5] << 8 | dev->dev_addr[4]); 695 sonic_set_cam_enable(dev, 1); 696 697 for (i = 0; i < 16; i++) 698 sonic_cda_put(dev, i, SONIC_CD_ENTRY_POINTER, i); 699 700 /* 701 * initialize CAM registers 702 */ 703 SONIC_WRITE(SONIC_CDP, lp->cda_laddr & 0xffff); 704 SONIC_WRITE(SONIC_CDC, 16); 705 706 /* 707 * load the CAM 708 */ 709 SONIC_WRITE(SONIC_CMD, SONIC_CR_LCAM); 710 711 i = 0; 712 while (i++ < 100) { 713 if (SONIC_READ(SONIC_ISR) & SONIC_INT_LCD) 714 break; 715 } 716 if (sonic_debug > 2) { 717 printk("sonic_init: CMD=%x, ISR=%x\n, i=%d", 718 SONIC_READ(SONIC_CMD), SONIC_READ(SONIC_ISR), i); 719 } 720 721 /* 722 * enable receiver, disable loopback 723 * and enable all interrupts 724 */ 725 SONIC_WRITE(SONIC_CMD, SONIC_CR_RXEN | SONIC_CR_STP); 726 SONIC_WRITE(SONIC_RCR, SONIC_RCR_DEFAULT); 727 SONIC_WRITE(SONIC_TCR, SONIC_TCR_DEFAULT); 728 SONIC_WRITE(SONIC_ISR, 0x7fff); 729 SONIC_WRITE(SONIC_IMR, SONIC_IMR_DEFAULT); 730 731 cmd = SONIC_READ(SONIC_CMD); 732 if ((cmd & SONIC_CR_RXEN) == 0 || (cmd & SONIC_CR_STP) == 0) 733 printk(KERN_ERR "sonic_init: failed, status=%x\n", cmd); 734 735 if (sonic_debug > 2) 736 printk("sonic_init: new status=%x\n", 737 SONIC_READ(SONIC_CMD)); 738 739 return 0; 740} 741 742MODULE_LICENSE("GPL"); 743