1/******************************************************************************* 2 3 Intel 82599 Virtual Function driver 4 Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 25 26*******************************************************************************/ 27 28 29/****************************************************************************** 30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code 31******************************************************************************/ 32#include <linux/types.h> 33#include <linux/module.h> 34#include <linux/pci.h> 35#include <linux/netdevice.h> 36#include <linux/vmalloc.h> 37#include <linux/string.h> 38#include <linux/in.h> 39#include <linux/ip.h> 40#include <linux/tcp.h> 41#include <linux/ipv6.h> 42#include <linux/slab.h> 43#include <net/checksum.h> 44#include <net/ip6_checksum.h> 45#include <linux/ethtool.h> 46#include <linux/if_vlan.h> 47 48#include "ixgbevf.h" 49 50char ixgbevf_driver_name[] = "ixgbevf"; 51static const char ixgbevf_driver_string[] = 52 "Intel(R) 82599 Virtual Function"; 53 54#define DRV_VERSION "1.0.0-k0" 55const char ixgbevf_driver_version[] = DRV_VERSION; 56static char ixgbevf_copyright[] = "Copyright (c) 2009 Intel Corporation."; 57 58static const struct ixgbevf_info *ixgbevf_info_tbl[] = { 59 [board_82599_vf] = &ixgbevf_vf_info, 60}; 61 62/* ixgbevf_pci_tbl - PCI Device ID Table 63 * 64 * Wildcard entries (PCI_ANY_ID) should come last 65 * Last entry must be all 0s 66 * 67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 68 * Class, Class Mask, private data (not used) } 69 */ 70static struct pci_device_id ixgbevf_pci_tbl[] = { 71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), 72 board_82599_vf}, 73 74 /* required last entry */ 75 {0, } 76}; 77MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl); 78 79MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 80MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver"); 81MODULE_LICENSE("GPL"); 82MODULE_VERSION(DRV_VERSION); 83 84#define DEFAULT_DEBUG_LEVEL_SHIFT 3 85 86/* forward decls */ 87static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector); 88static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx, 89 u32 itr_reg); 90 91static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw, 92 struct ixgbevf_ring *rx_ring, 93 u32 val) 94{ 95 /* 96 * Force memory writes to complete before letting h/w 97 * know there are new descriptors to fetch. (Only 98 * applicable for weak-ordered memory model archs, 99 * such as IA-64). 100 */ 101 wmb(); 102 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val); 103} 104 105/* 106 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors 107 * @adapter: pointer to adapter struct 108 * @direction: 0 for Rx, 1 for Tx, -1 for other causes 109 * @queue: queue to map the corresponding interrupt to 110 * @msix_vector: the vector to map to the corresponding queue 111 * 112 */ 113static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction, 114 u8 queue, u8 msix_vector) 115{ 116 u32 ivar, index; 117 struct ixgbe_hw *hw = &adapter->hw; 118 if (direction == -1) { 119 /* other causes */ 120 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 121 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC); 122 ivar &= ~0xFF; 123 ivar |= msix_vector; 124 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar); 125 } else { 126 /* tx or rx causes */ 127 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 128 index = ((16 * (queue & 1)) + (8 * direction)); 129 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1)); 130 ivar &= ~(0xFF << index); 131 ivar |= (msix_vector << index); 132 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar); 133 } 134} 135 136static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter, 137 struct ixgbevf_tx_buffer 138 *tx_buffer_info) 139{ 140 if (tx_buffer_info->dma) { 141 if (tx_buffer_info->mapped_as_page) 142 dma_unmap_page(&adapter->pdev->dev, 143 tx_buffer_info->dma, 144 tx_buffer_info->length, 145 DMA_TO_DEVICE); 146 else 147 dma_unmap_single(&adapter->pdev->dev, 148 tx_buffer_info->dma, 149 tx_buffer_info->length, 150 DMA_TO_DEVICE); 151 tx_buffer_info->dma = 0; 152 } 153 if (tx_buffer_info->skb) { 154 dev_kfree_skb_any(tx_buffer_info->skb); 155 tx_buffer_info->skb = NULL; 156 } 157 tx_buffer_info->time_stamp = 0; 158 /* tx_buffer_info must be completely set up in the transmit path */ 159} 160 161static inline bool ixgbevf_check_tx_hang(struct ixgbevf_adapter *adapter, 162 struct ixgbevf_ring *tx_ring, 163 unsigned int eop) 164{ 165 struct ixgbe_hw *hw = &adapter->hw; 166 u32 head, tail; 167 168 /* Detect a transmit hang in hardware, this serializes the 169 * check with the clearing of time_stamp and movement of eop */ 170 head = readl(hw->hw_addr + tx_ring->head); 171 tail = readl(hw->hw_addr + tx_ring->tail); 172 adapter->detect_tx_hung = false; 173 if ((head != tail) && 174 tx_ring->tx_buffer_info[eop].time_stamp && 175 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ)) { 176 /* detected Tx unit hang */ 177 union ixgbe_adv_tx_desc *tx_desc; 178 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); 179 printk(KERN_ERR "Detected Tx Unit Hang\n" 180 " Tx Queue <%d>\n" 181 " TDH, TDT <%x>, <%x>\n" 182 " next_to_use <%x>\n" 183 " next_to_clean <%x>\n" 184 "tx_buffer_info[next_to_clean]\n" 185 " time_stamp <%lx>\n" 186 " jiffies <%lx>\n", 187 tx_ring->queue_index, 188 head, tail, 189 tx_ring->next_to_use, eop, 190 tx_ring->tx_buffer_info[eop].time_stamp, jiffies); 191 return true; 192 } 193 194 return false; 195} 196 197#define IXGBE_MAX_TXD_PWR 14 198#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR) 199 200/* Tx Descriptors needed, worst case */ 201#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \ 202 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0)) 203#ifdef MAX_SKB_FRAGS 204#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \ 205 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */ 206#else 207#define DESC_NEEDED TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) 208#endif 209 210static void ixgbevf_tx_timeout(struct net_device *netdev); 211 212/** 213 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes 214 * @adapter: board private structure 215 * @tx_ring: tx ring to clean 216 **/ 217static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter, 218 struct ixgbevf_ring *tx_ring) 219{ 220 struct net_device *netdev = adapter->netdev; 221 struct ixgbe_hw *hw = &adapter->hw; 222 union ixgbe_adv_tx_desc *tx_desc, *eop_desc; 223 struct ixgbevf_tx_buffer *tx_buffer_info; 224 unsigned int i, eop, count = 0; 225 unsigned int total_bytes = 0, total_packets = 0; 226 227 i = tx_ring->next_to_clean; 228 eop = tx_ring->tx_buffer_info[i].next_to_watch; 229 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); 230 231 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) && 232 (count < tx_ring->work_limit)) { 233 bool cleaned = false; 234 rmb(); /* read buffer_info after eop_desc */ 235 for ( ; !cleaned; count++) { 236 struct sk_buff *skb; 237 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i); 238 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 239 cleaned = (i == eop); 240 skb = tx_buffer_info->skb; 241 242 if (cleaned && skb) { 243 unsigned int segs, bytecount; 244 245 /* gso_segs is currently only valid for tcp */ 246 segs = skb_shinfo(skb)->gso_segs ?: 1; 247 /* multiply data chunks by size of headers */ 248 bytecount = ((segs - 1) * skb_headlen(skb)) + 249 skb->len; 250 total_packets += segs; 251 total_bytes += bytecount; 252 } 253 254 ixgbevf_unmap_and_free_tx_resource(adapter, 255 tx_buffer_info); 256 257 tx_desc->wb.status = 0; 258 259 i++; 260 if (i == tx_ring->count) 261 i = 0; 262 } 263 264 eop = tx_ring->tx_buffer_info[i].next_to_watch; 265 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); 266 } 267 268 tx_ring->next_to_clean = i; 269 270#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2) 271 if (unlikely(count && netif_carrier_ok(netdev) && 272 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) { 273 /* Make sure that anybody stopping the queue after this 274 * sees the new next_to_clean. 275 */ 276 smp_mb(); 277#ifdef HAVE_TX_MQ 278 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) && 279 !test_bit(__IXGBEVF_DOWN, &adapter->state)) { 280 netif_wake_subqueue(netdev, tx_ring->queue_index); 281 ++adapter->restart_queue; 282 } 283#else 284 if (netif_queue_stopped(netdev) && 285 !test_bit(__IXGBEVF_DOWN, &adapter->state)) { 286 netif_wake_queue(netdev); 287 ++adapter->restart_queue; 288 } 289#endif 290 } 291 292 if (adapter->detect_tx_hung) { 293 if (ixgbevf_check_tx_hang(adapter, tx_ring, i)) { 294 /* schedule immediate reset if we believe we hung */ 295 printk(KERN_INFO 296 "tx hang %d detected, resetting adapter\n", 297 adapter->tx_timeout_count + 1); 298 ixgbevf_tx_timeout(adapter->netdev); 299 } 300 } 301 302 /* re-arm the interrupt */ 303 if ((count >= tx_ring->work_limit) && 304 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) { 305 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx); 306 } 307 308 tx_ring->total_bytes += total_bytes; 309 tx_ring->total_packets += total_packets; 310 311 adapter->net_stats.tx_bytes += total_bytes; 312 adapter->net_stats.tx_packets += total_packets; 313 314 return (count < tx_ring->work_limit); 315} 316 317/** 318 * ixgbevf_receive_skb - Send a completed packet up the stack 319 * @q_vector: structure containing interrupt and ring information 320 * @skb: packet to send up 321 * @status: hardware indication of status of receive 322 * @rx_ring: rx descriptor ring (for a specific queue) to setup 323 * @rx_desc: rx descriptor 324 **/ 325static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector, 326 struct sk_buff *skb, u8 status, 327 struct ixgbevf_ring *ring, 328 union ixgbe_adv_rx_desc *rx_desc) 329{ 330 struct ixgbevf_adapter *adapter = q_vector->adapter; 331 bool is_vlan = (status & IXGBE_RXD_STAT_VP); 332 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan); 333 int ret; 334 335 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) { 336 if (adapter->vlgrp && is_vlan) 337 vlan_gro_receive(&q_vector->napi, 338 adapter->vlgrp, 339 tag, skb); 340 else 341 napi_gro_receive(&q_vector->napi, skb); 342 } else { 343 if (adapter->vlgrp && is_vlan) 344 ret = vlan_hwaccel_rx(skb, adapter->vlgrp, tag); 345 else 346 ret = netif_rx(skb); 347 } 348} 349 350/** 351 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum 352 * @adapter: address of board private structure 353 * @status_err: hardware indication of status of receive 354 * @skb: skb currently being received and modified 355 **/ 356static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter, 357 u32 status_err, struct sk_buff *skb) 358{ 359 skb->ip_summed = CHECKSUM_NONE; 360 361 /* Rx csum disabled */ 362 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED)) 363 return; 364 365 /* if IP and error */ 366 if ((status_err & IXGBE_RXD_STAT_IPCS) && 367 (status_err & IXGBE_RXDADV_ERR_IPE)) { 368 adapter->hw_csum_rx_error++; 369 return; 370 } 371 372 if (!(status_err & IXGBE_RXD_STAT_L4CS)) 373 return; 374 375 if (status_err & IXGBE_RXDADV_ERR_TCPE) { 376 adapter->hw_csum_rx_error++; 377 return; 378 } 379 380 /* It must be a TCP or UDP packet with a valid checksum */ 381 skb->ip_summed = CHECKSUM_UNNECESSARY; 382 adapter->hw_csum_rx_good++; 383} 384 385/** 386 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split 387 * @adapter: address of board private structure 388 **/ 389static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter, 390 struct ixgbevf_ring *rx_ring, 391 int cleaned_count) 392{ 393 struct pci_dev *pdev = adapter->pdev; 394 union ixgbe_adv_rx_desc *rx_desc; 395 struct ixgbevf_rx_buffer *bi; 396 struct sk_buff *skb; 397 unsigned int i; 398 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN; 399 400 i = rx_ring->next_to_use; 401 bi = &rx_ring->rx_buffer_info[i]; 402 403 while (cleaned_count--) { 404 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i); 405 406 if (!bi->page_dma && 407 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) { 408 if (!bi->page) { 409 bi->page = netdev_alloc_page(adapter->netdev); 410 if (!bi->page) { 411 adapter->alloc_rx_page_failed++; 412 goto no_buffers; 413 } 414 bi->page_offset = 0; 415 } else { 416 /* use a half page if we're re-using */ 417 bi->page_offset ^= (PAGE_SIZE / 2); 418 } 419 420 bi->page_dma = dma_map_page(&pdev->dev, bi->page, 421 bi->page_offset, 422 (PAGE_SIZE / 2), 423 DMA_FROM_DEVICE); 424 } 425 426 skb = bi->skb; 427 if (!skb) { 428 skb = netdev_alloc_skb(adapter->netdev, 429 bufsz); 430 431 if (!skb) { 432 adapter->alloc_rx_buff_failed++; 433 goto no_buffers; 434 } 435 436 /* 437 * Make buffer alignment 2 beyond a 16 byte boundary 438 * this will result in a 16 byte aligned IP header after 439 * the 14 byte MAC header is removed 440 */ 441 skb_reserve(skb, NET_IP_ALIGN); 442 443 bi->skb = skb; 444 } 445 if (!bi->dma) { 446 bi->dma = dma_map_single(&pdev->dev, skb->data, 447 rx_ring->rx_buf_len, 448 DMA_FROM_DEVICE); 449 } 450 /* Refresh the desc even if buffer_addrs didn't change because 451 * each write-back erases this info. */ 452 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 453 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma); 454 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma); 455 } else { 456 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma); 457 } 458 459 i++; 460 if (i == rx_ring->count) 461 i = 0; 462 bi = &rx_ring->rx_buffer_info[i]; 463 } 464 465no_buffers: 466 if (rx_ring->next_to_use != i) { 467 rx_ring->next_to_use = i; 468 if (i-- == 0) 469 i = (rx_ring->count - 1); 470 471 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i); 472 } 473} 474 475static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter, 476 u64 qmask) 477{ 478 u32 mask; 479 struct ixgbe_hw *hw = &adapter->hw; 480 481 mask = (qmask & 0xFFFFFFFF); 482 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); 483} 484 485static inline u16 ixgbevf_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc) 486{ 487 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info; 488} 489 490static inline u16 ixgbevf_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc) 491{ 492 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info; 493} 494 495static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector, 496 struct ixgbevf_ring *rx_ring, 497 int *work_done, int work_to_do) 498{ 499 struct ixgbevf_adapter *adapter = q_vector->adapter; 500 struct pci_dev *pdev = adapter->pdev; 501 union ixgbe_adv_rx_desc *rx_desc, *next_rxd; 502 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer; 503 struct sk_buff *skb; 504 unsigned int i; 505 u32 len, staterr; 506 u16 hdr_info; 507 bool cleaned = false; 508 int cleaned_count = 0; 509 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 510 511 i = rx_ring->next_to_clean; 512 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i); 513 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 514 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 515 516 while (staterr & IXGBE_RXD_STAT_DD) { 517 u32 upper_len = 0; 518 if (*work_done >= work_to_do) 519 break; 520 (*work_done)++; 521 522 rmb(); /* read descriptor and rx_buffer_info after status DD */ 523 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 524 hdr_info = le16_to_cpu(ixgbevf_get_hdr_info(rx_desc)); 525 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >> 526 IXGBE_RXDADV_HDRBUFLEN_SHIFT; 527 if (hdr_info & IXGBE_RXDADV_SPH) 528 adapter->rx_hdr_split++; 529 if (len > IXGBEVF_RX_HDR_SIZE) 530 len = IXGBEVF_RX_HDR_SIZE; 531 upper_len = le16_to_cpu(rx_desc->wb.upper.length); 532 } else { 533 len = le16_to_cpu(rx_desc->wb.upper.length); 534 } 535 cleaned = true; 536 skb = rx_buffer_info->skb; 537 prefetch(skb->data - NET_IP_ALIGN); 538 rx_buffer_info->skb = NULL; 539 540 if (rx_buffer_info->dma) { 541 dma_unmap_single(&pdev->dev, rx_buffer_info->dma, 542 rx_ring->rx_buf_len, 543 DMA_FROM_DEVICE); 544 rx_buffer_info->dma = 0; 545 skb_put(skb, len); 546 } 547 548 if (upper_len) { 549 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma, 550 PAGE_SIZE / 2, DMA_FROM_DEVICE); 551 rx_buffer_info->page_dma = 0; 552 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags, 553 rx_buffer_info->page, 554 rx_buffer_info->page_offset, 555 upper_len); 556 557 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) || 558 (page_count(rx_buffer_info->page) != 1)) 559 rx_buffer_info->page = NULL; 560 else 561 get_page(rx_buffer_info->page); 562 563 skb->len += upper_len; 564 skb->data_len += upper_len; 565 skb->truesize += upper_len; 566 } 567 568 i++; 569 if (i == rx_ring->count) 570 i = 0; 571 572 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i); 573 prefetch(next_rxd); 574 cleaned_count++; 575 576 next_buffer = &rx_ring->rx_buffer_info[i]; 577 578 if (!(staterr & IXGBE_RXD_STAT_EOP)) { 579 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 580 rx_buffer_info->skb = next_buffer->skb; 581 rx_buffer_info->dma = next_buffer->dma; 582 next_buffer->skb = skb; 583 next_buffer->dma = 0; 584 } else { 585 skb->next = next_buffer->skb; 586 skb->next->prev = skb; 587 } 588 adapter->non_eop_descs++; 589 goto next_desc; 590 } 591 592 /* ERR_MASK will only have valid bits if EOP set */ 593 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) { 594 dev_kfree_skb_irq(skb); 595 goto next_desc; 596 } 597 598 ixgbevf_rx_checksum(adapter, staterr, skb); 599 600 /* probably a little skewed due to removing CRC */ 601 total_rx_bytes += skb->len; 602 total_rx_packets++; 603 604 if (staterr & IXGBE_RXD_STAT_LB) { 605 u32 header_fixup_len = skb_headlen(skb); 606 if (header_fixup_len < 14) 607 skb_push(skb, header_fixup_len); 608 } 609 skb->protocol = eth_type_trans(skb, adapter->netdev); 610 611 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc); 612 613next_desc: 614 rx_desc->wb.upper.status_error = 0; 615 616 /* return some buffers to hardware, one at a time is too slow */ 617 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) { 618 ixgbevf_alloc_rx_buffers(adapter, rx_ring, 619 cleaned_count); 620 cleaned_count = 0; 621 } 622 623 /* use prefetched values */ 624 rx_desc = next_rxd; 625 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 626 627 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 628 } 629 630 rx_ring->next_to_clean = i; 631 cleaned_count = IXGBE_DESC_UNUSED(rx_ring); 632 633 if (cleaned_count) 634 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count); 635 636 rx_ring->total_packets += total_rx_packets; 637 rx_ring->total_bytes += total_rx_bytes; 638 adapter->net_stats.rx_bytes += total_rx_bytes; 639 adapter->net_stats.rx_packets += total_rx_packets; 640 641 return cleaned; 642} 643 644/** 645 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine 646 * @napi: napi struct with our devices info in it 647 * @budget: amount of work driver is allowed to do this pass, in packets 648 * 649 * This function is optimized for cleaning one queue only on a single 650 * q_vector!!! 651 **/ 652static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget) 653{ 654 struct ixgbevf_q_vector *q_vector = 655 container_of(napi, struct ixgbevf_q_vector, napi); 656 struct ixgbevf_adapter *adapter = q_vector->adapter; 657 struct ixgbevf_ring *rx_ring = NULL; 658 int work_done = 0; 659 long r_idx; 660 661 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 662 rx_ring = &(adapter->rx_ring[r_idx]); 663 664 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget); 665 666 /* If all Rx work done, exit the polling mode */ 667 if (work_done < budget) { 668 napi_complete(napi); 669 if (adapter->itr_setting & 1) 670 ixgbevf_set_itr_msix(q_vector); 671 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) 672 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx); 673 } 674 675 return work_done; 676} 677 678/** 679 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine 680 * @napi: napi struct with our devices info in it 681 * @budget: amount of work driver is allowed to do this pass, in packets 682 * 683 * This function will clean more than one rx queue associated with a 684 * q_vector. 685 **/ 686static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget) 687{ 688 struct ixgbevf_q_vector *q_vector = 689 container_of(napi, struct ixgbevf_q_vector, napi); 690 struct ixgbevf_adapter *adapter = q_vector->adapter; 691 struct ixgbevf_ring *rx_ring = NULL; 692 int work_done = 0, i; 693 long r_idx; 694 u64 enable_mask = 0; 695 696 /* attempt to distribute budget to each queue fairly, but don't allow 697 * the budget to go below 1 because we'll exit polling */ 698 budget /= (q_vector->rxr_count ?: 1); 699 budget = max(budget, 1); 700 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 701 for (i = 0; i < q_vector->rxr_count; i++) { 702 rx_ring = &(adapter->rx_ring[r_idx]); 703 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget); 704 enable_mask |= rx_ring->v_idx; 705 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, 706 r_idx + 1); 707 } 708 709#ifndef HAVE_NETDEV_NAPI_LIST 710 if (!netif_running(adapter->netdev)) 711 work_done = 0; 712 713#endif 714 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 715 rx_ring = &(adapter->rx_ring[r_idx]); 716 717 /* If all Rx work done, exit the polling mode */ 718 if (work_done < budget) { 719 napi_complete(napi); 720 if (adapter->itr_setting & 1) 721 ixgbevf_set_itr_msix(q_vector); 722 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) 723 ixgbevf_irq_enable_queues(adapter, enable_mask); 724 } 725 726 return work_done; 727} 728 729 730/** 731 * ixgbevf_configure_msix - Configure MSI-X hardware 732 * @adapter: board private structure 733 * 734 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X 735 * interrupts. 736 **/ 737static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter) 738{ 739 struct ixgbevf_q_vector *q_vector; 740 struct ixgbe_hw *hw = &adapter->hw; 741 int i, j, q_vectors, v_idx, r_idx; 742 u32 mask; 743 744 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 745 746 /* 747 * Populate the IVAR table and set the ITR values to the 748 * corresponding register. 749 */ 750 for (v_idx = 0; v_idx < q_vectors; v_idx++) { 751 q_vector = adapter->q_vector[v_idx]; 752 r_idx = find_first_bit(q_vector->rxr_idx, 753 adapter->num_rx_queues); 754 755 for (i = 0; i < q_vector->rxr_count; i++) { 756 j = adapter->rx_ring[r_idx].reg_idx; 757 ixgbevf_set_ivar(adapter, 0, j, v_idx); 758 r_idx = find_next_bit(q_vector->rxr_idx, 759 adapter->num_rx_queues, 760 r_idx + 1); 761 } 762 r_idx = find_first_bit(q_vector->txr_idx, 763 adapter->num_tx_queues); 764 765 for (i = 0; i < q_vector->txr_count; i++) { 766 j = adapter->tx_ring[r_idx].reg_idx; 767 ixgbevf_set_ivar(adapter, 1, j, v_idx); 768 r_idx = find_next_bit(q_vector->txr_idx, 769 adapter->num_tx_queues, 770 r_idx + 1); 771 } 772 773 /* if this is a tx only vector halve the interrupt rate */ 774 if (q_vector->txr_count && !q_vector->rxr_count) 775 q_vector->eitr = (adapter->eitr_param >> 1); 776 else if (q_vector->rxr_count) 777 /* rx only */ 778 q_vector->eitr = adapter->eitr_param; 779 780 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr); 781 } 782 783 ixgbevf_set_ivar(adapter, -1, 1, v_idx); 784 785 /* set up to autoclear timer, and the vectors */ 786 mask = IXGBE_EIMS_ENABLE_MASK; 787 mask &= ~IXGBE_EIMS_OTHER; 788 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask); 789} 790 791enum latency_range { 792 lowest_latency = 0, 793 low_latency = 1, 794 bulk_latency = 2, 795 latency_invalid = 255 796}; 797 798/** 799 * ixgbevf_update_itr - update the dynamic ITR value based on statistics 800 * @adapter: pointer to adapter 801 * @eitr: eitr setting (ints per sec) to give last timeslice 802 * @itr_setting: current throttle rate in ints/second 803 * @packets: the number of packets during this measurement interval 804 * @bytes: the number of bytes during this measurement interval 805 * 806 * Stores a new ITR value based on packets and byte 807 * counts during the last interrupt. The advantage of per interrupt 808 * computation is faster updates and more accurate ITR for the current 809 * traffic pattern. Constants in this function were computed 810 * based on theoretical maximum wire speed and thresholds were set based 811 * on testing data as well as attempting to minimize response time 812 * while increasing bulk throughput. 813 **/ 814static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter, 815 u32 eitr, u8 itr_setting, 816 int packets, int bytes) 817{ 818 unsigned int retval = itr_setting; 819 u32 timepassed_us; 820 u64 bytes_perint; 821 822 if (packets == 0) 823 goto update_itr_done; 824 825 826 /* simple throttlerate management 827 * 0-20MB/s lowest (100000 ints/s) 828 * 20-100MB/s low (20000 ints/s) 829 * 100-1249MB/s bulk (8000 ints/s) 830 */ 831 /* what was last interrupt timeslice? */ 832 timepassed_us = 1000000/eitr; 833 bytes_perint = bytes / timepassed_us; /* bytes/usec */ 834 835 switch (itr_setting) { 836 case lowest_latency: 837 if (bytes_perint > adapter->eitr_low) 838 retval = low_latency; 839 break; 840 case low_latency: 841 if (bytes_perint > adapter->eitr_high) 842 retval = bulk_latency; 843 else if (bytes_perint <= adapter->eitr_low) 844 retval = lowest_latency; 845 break; 846 case bulk_latency: 847 if (bytes_perint <= adapter->eitr_high) 848 retval = low_latency; 849 break; 850 } 851 852update_itr_done: 853 return retval; 854} 855 856/** 857 * ixgbevf_write_eitr - write VTEITR register in hardware specific way 858 * @adapter: pointer to adapter struct 859 * @v_idx: vector index into q_vector array 860 * @itr_reg: new value to be written in *register* format, not ints/s 861 * 862 * This function is made to be called by ethtool and by the driver 863 * when it needs to update VTEITR registers at runtime. Hardware 864 * specific quirks/differences are taken care of here. 865 */ 866static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx, 867 u32 itr_reg) 868{ 869 struct ixgbe_hw *hw = &adapter->hw; 870 871 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg); 872 873 /* 874 * set the WDIS bit to not clear the timer bits and cause an 875 * immediate assertion of the interrupt 876 */ 877 itr_reg |= IXGBE_EITR_CNT_WDIS; 878 879 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg); 880} 881 882static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector) 883{ 884 struct ixgbevf_adapter *adapter = q_vector->adapter; 885 u32 new_itr; 886 u8 current_itr, ret_itr; 887 int i, r_idx, v_idx = q_vector->v_idx; 888 struct ixgbevf_ring *rx_ring, *tx_ring; 889 890 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); 891 for (i = 0; i < q_vector->txr_count; i++) { 892 tx_ring = &(adapter->tx_ring[r_idx]); 893 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr, 894 q_vector->tx_itr, 895 tx_ring->total_packets, 896 tx_ring->total_bytes); 897 /* if the result for this queue would decrease interrupt 898 * rate for this vector then use that result */ 899 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ? 900 q_vector->tx_itr - 1 : ret_itr); 901 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, 902 r_idx + 1); 903 } 904 905 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 906 for (i = 0; i < q_vector->rxr_count; i++) { 907 rx_ring = &(adapter->rx_ring[r_idx]); 908 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr, 909 q_vector->rx_itr, 910 rx_ring->total_packets, 911 rx_ring->total_bytes); 912 /* if the result for this queue would decrease interrupt 913 * rate for this vector then use that result */ 914 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ? 915 q_vector->rx_itr - 1 : ret_itr); 916 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, 917 r_idx + 1); 918 } 919 920 current_itr = max(q_vector->rx_itr, q_vector->tx_itr); 921 922 switch (current_itr) { 923 /* counts and packets in update_itr are dependent on these numbers */ 924 case lowest_latency: 925 new_itr = 100000; 926 break; 927 case low_latency: 928 new_itr = 20000; /* aka hwitr = ~200 */ 929 break; 930 case bulk_latency: 931 default: 932 new_itr = 8000; 933 break; 934 } 935 936 if (new_itr != q_vector->eitr) { 937 u32 itr_reg; 938 939 /* save the algorithm value here, not the smoothed one */ 940 q_vector->eitr = new_itr; 941 /* do an exponential smoothing */ 942 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100); 943 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr); 944 ixgbevf_write_eitr(adapter, v_idx, itr_reg); 945 } 946} 947 948static irqreturn_t ixgbevf_msix_mbx(int irq, void *data) 949{ 950 struct net_device *netdev = data; 951 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 952 struct ixgbe_hw *hw = &adapter->hw; 953 u32 eicr; 954 u32 msg; 955 956 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS); 957 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr); 958 959 if (!hw->mbx.ops.check_for_ack(hw)) { 960 /* 961 * checking for the ack clears the PFACK bit. Place 962 * it back in the v2p_mailbox cache so that anyone 963 * polling for an ack will not miss it. Also 964 * avoid the read below because the code to read 965 * the mailbox will also clear the ack bit. This was 966 * causing lost acks. Just cache the bit and exit 967 * the IRQ handler. 968 */ 969 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFACK; 970 goto out; 971 } 972 973 /* Not an ack interrupt, go ahead and read the message */ 974 hw->mbx.ops.read(hw, &msg, 1); 975 976 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG) 977 mod_timer(&adapter->watchdog_timer, 978 round_jiffies(jiffies + 1)); 979 980out: 981 return IRQ_HANDLED; 982} 983 984static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data) 985{ 986 struct ixgbevf_q_vector *q_vector = data; 987 struct ixgbevf_adapter *adapter = q_vector->adapter; 988 struct ixgbevf_ring *tx_ring; 989 int i, r_idx; 990 991 if (!q_vector->txr_count) 992 return IRQ_HANDLED; 993 994 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); 995 for (i = 0; i < q_vector->txr_count; i++) { 996 tx_ring = &(adapter->tx_ring[r_idx]); 997 tx_ring->total_bytes = 0; 998 tx_ring->total_packets = 0; 999 ixgbevf_clean_tx_irq(adapter, tx_ring); 1000 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, 1001 r_idx + 1); 1002 } 1003 1004 if (adapter->itr_setting & 1) 1005 ixgbevf_set_itr_msix(q_vector); 1006 1007 return IRQ_HANDLED; 1008} 1009 1010/** 1011 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues) 1012 * @irq: unused 1013 * @data: pointer to our q_vector struct for this interrupt vector 1014 **/ 1015static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data) 1016{ 1017 struct ixgbevf_q_vector *q_vector = data; 1018 struct ixgbevf_adapter *adapter = q_vector->adapter; 1019 struct ixgbe_hw *hw = &adapter->hw; 1020 struct ixgbevf_ring *rx_ring; 1021 int r_idx; 1022 int i; 1023 1024 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 1025 for (i = 0; i < q_vector->rxr_count; i++) { 1026 rx_ring = &(adapter->rx_ring[r_idx]); 1027 rx_ring->total_bytes = 0; 1028 rx_ring->total_packets = 0; 1029 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, 1030 r_idx + 1); 1031 } 1032 1033 if (!q_vector->rxr_count) 1034 return IRQ_HANDLED; 1035 1036 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 1037 rx_ring = &(adapter->rx_ring[r_idx]); 1038 /* disable interrupts on this vector only */ 1039 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx); 1040 napi_schedule(&q_vector->napi); 1041 1042 1043 return IRQ_HANDLED; 1044} 1045 1046static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data) 1047{ 1048 ixgbevf_msix_clean_rx(irq, data); 1049 ixgbevf_msix_clean_tx(irq, data); 1050 1051 return IRQ_HANDLED; 1052} 1053 1054static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx, 1055 int r_idx) 1056{ 1057 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx]; 1058 1059 set_bit(r_idx, q_vector->rxr_idx); 1060 q_vector->rxr_count++; 1061 a->rx_ring[r_idx].v_idx = 1 << v_idx; 1062} 1063 1064static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx, 1065 int t_idx) 1066{ 1067 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx]; 1068 1069 set_bit(t_idx, q_vector->txr_idx); 1070 q_vector->txr_count++; 1071 a->tx_ring[t_idx].v_idx = 1 << v_idx; 1072} 1073 1074/** 1075 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors 1076 * @adapter: board private structure to initialize 1077 * 1078 * This function maps descriptor rings to the queue-specific vectors 1079 * we were allotted through the MSI-X enabling code. Ideally, we'd have 1080 * one vector per ring/queue, but on a constrained vector budget, we 1081 * group the rings as "efficiently" as possible. You would add new 1082 * mapping configurations in here. 1083 **/ 1084static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter) 1085{ 1086 int q_vectors; 1087 int v_start = 0; 1088 int rxr_idx = 0, txr_idx = 0; 1089 int rxr_remaining = adapter->num_rx_queues; 1090 int txr_remaining = adapter->num_tx_queues; 1091 int i, j; 1092 int rqpv, tqpv; 1093 int err = 0; 1094 1095 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1096 1097 /* 1098 * The ideal configuration... 1099 * We have enough vectors to map one per queue. 1100 */ 1101 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) { 1102 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++) 1103 map_vector_to_rxq(adapter, v_start, rxr_idx); 1104 1105 for (; txr_idx < txr_remaining; v_start++, txr_idx++) 1106 map_vector_to_txq(adapter, v_start, txr_idx); 1107 goto out; 1108 } 1109 1110 /* 1111 * If we don't have enough vectors for a 1-to-1 1112 * mapping, we'll have to group them so there are 1113 * multiple queues per vector. 1114 */ 1115 /* Re-adjusting *qpv takes care of the remainder. */ 1116 for (i = v_start; i < q_vectors; i++) { 1117 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i); 1118 for (j = 0; j < rqpv; j++) { 1119 map_vector_to_rxq(adapter, i, rxr_idx); 1120 rxr_idx++; 1121 rxr_remaining--; 1122 } 1123 } 1124 for (i = v_start; i < q_vectors; i++) { 1125 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i); 1126 for (j = 0; j < tqpv; j++) { 1127 map_vector_to_txq(adapter, i, txr_idx); 1128 txr_idx++; 1129 txr_remaining--; 1130 } 1131 } 1132 1133out: 1134 return err; 1135} 1136 1137/** 1138 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts 1139 * @adapter: board private structure 1140 * 1141 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests 1142 * interrupts from the kernel. 1143 **/ 1144static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter) 1145{ 1146 struct net_device *netdev = adapter->netdev; 1147 irqreturn_t (*handler)(int, void *); 1148 int i, vector, q_vectors, err; 1149 int ri = 0, ti = 0; 1150 1151 /* Decrement for Other and TCP Timer vectors */ 1152 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1153 1154#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \ 1155 ? &ixgbevf_msix_clean_many : \ 1156 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \ 1157 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \ 1158 NULL) 1159 for (vector = 0; vector < q_vectors; vector++) { 1160 handler = SET_HANDLER(adapter->q_vector[vector]); 1161 1162 if (handler == &ixgbevf_msix_clean_rx) { 1163 sprintf(adapter->name[vector], "%s-%s-%d", 1164 netdev->name, "rx", ri++); 1165 } else if (handler == &ixgbevf_msix_clean_tx) { 1166 sprintf(adapter->name[vector], "%s-%s-%d", 1167 netdev->name, "tx", ti++); 1168 } else if (handler == &ixgbevf_msix_clean_many) { 1169 sprintf(adapter->name[vector], "%s-%s-%d", 1170 netdev->name, "TxRx", vector); 1171 } else { 1172 /* skip this unused q_vector */ 1173 continue; 1174 } 1175 err = request_irq(adapter->msix_entries[vector].vector, 1176 handler, 0, adapter->name[vector], 1177 adapter->q_vector[vector]); 1178 if (err) { 1179 hw_dbg(&adapter->hw, 1180 "request_irq failed for MSIX interrupt " 1181 "Error: %d\n", err); 1182 goto free_queue_irqs; 1183 } 1184 } 1185 1186 sprintf(adapter->name[vector], "%s:mbx", netdev->name); 1187 err = request_irq(adapter->msix_entries[vector].vector, 1188 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev); 1189 if (err) { 1190 hw_dbg(&adapter->hw, 1191 "request_irq for msix_mbx failed: %d\n", err); 1192 goto free_queue_irqs; 1193 } 1194 1195 return 0; 1196 1197free_queue_irqs: 1198 for (i = vector - 1; i >= 0; i--) 1199 free_irq(adapter->msix_entries[--vector].vector, 1200 &(adapter->q_vector[i])); 1201 pci_disable_msix(adapter->pdev); 1202 kfree(adapter->msix_entries); 1203 adapter->msix_entries = NULL; 1204 return err; 1205} 1206 1207static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter) 1208{ 1209 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1210 1211 for (i = 0; i < q_vectors; i++) { 1212 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i]; 1213 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES); 1214 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES); 1215 q_vector->rxr_count = 0; 1216 q_vector->txr_count = 0; 1217 q_vector->eitr = adapter->eitr_param; 1218 } 1219} 1220 1221/** 1222 * ixgbevf_request_irq - initialize interrupts 1223 * @adapter: board private structure 1224 * 1225 * Attempts to configure interrupts using the best available 1226 * capabilities of the hardware and kernel. 1227 **/ 1228static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter) 1229{ 1230 int err = 0; 1231 1232 err = ixgbevf_request_msix_irqs(adapter); 1233 1234 if (err) 1235 hw_dbg(&adapter->hw, 1236 "request_irq failed, Error %d\n", err); 1237 1238 return err; 1239} 1240 1241static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter) 1242{ 1243 struct net_device *netdev = adapter->netdev; 1244 int i, q_vectors; 1245 1246 q_vectors = adapter->num_msix_vectors; 1247 1248 i = q_vectors - 1; 1249 1250 free_irq(adapter->msix_entries[i].vector, netdev); 1251 i--; 1252 1253 for (; i >= 0; i--) { 1254 free_irq(adapter->msix_entries[i].vector, 1255 adapter->q_vector[i]); 1256 } 1257 1258 ixgbevf_reset_q_vectors(adapter); 1259} 1260 1261/** 1262 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC 1263 * @adapter: board private structure 1264 **/ 1265static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter) 1266{ 1267 int i; 1268 struct ixgbe_hw *hw = &adapter->hw; 1269 1270 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0); 1271 1272 IXGBE_WRITE_FLUSH(hw); 1273 1274 for (i = 0; i < adapter->num_msix_vectors; i++) 1275 synchronize_irq(adapter->msix_entries[i].vector); 1276} 1277 1278/** 1279 * ixgbevf_irq_enable - Enable default interrupt generation settings 1280 * @adapter: board private structure 1281 **/ 1282static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter, 1283 bool queues, bool flush) 1284{ 1285 struct ixgbe_hw *hw = &adapter->hw; 1286 u32 mask; 1287 u64 qmask; 1288 1289 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 1290 qmask = ~0; 1291 1292 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); 1293 1294 if (queues) 1295 ixgbevf_irq_enable_queues(adapter, qmask); 1296 1297 if (flush) 1298 IXGBE_WRITE_FLUSH(hw); 1299} 1300 1301/** 1302 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset 1303 * @adapter: board private structure 1304 * 1305 * Configure the Tx unit of the MAC after a reset. 1306 **/ 1307static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter) 1308{ 1309 u64 tdba; 1310 struct ixgbe_hw *hw = &adapter->hw; 1311 u32 i, j, tdlen, txctrl; 1312 1313 /* Setup the HW Tx Head and Tail descriptor pointers */ 1314 for (i = 0; i < adapter->num_tx_queues; i++) { 1315 struct ixgbevf_ring *ring = &adapter->tx_ring[i]; 1316 j = ring->reg_idx; 1317 tdba = ring->dma; 1318 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc); 1319 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j), 1320 (tdba & DMA_BIT_MASK(32))); 1321 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32)); 1322 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen); 1323 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0); 1324 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0); 1325 adapter->tx_ring[i].head = IXGBE_VFTDH(j); 1326 adapter->tx_ring[i].tail = IXGBE_VFTDT(j); 1327 /* Disable Tx Head Writeback RO bit, since this hoses 1328 * bookkeeping if things aren't delivered in order. 1329 */ 1330 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j)); 1331 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN; 1332 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl); 1333 } 1334} 1335 1336#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 1337 1338static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index) 1339{ 1340 struct ixgbevf_ring *rx_ring; 1341 struct ixgbe_hw *hw = &adapter->hw; 1342 u32 srrctl; 1343 1344 rx_ring = &adapter->rx_ring[index]; 1345 1346 srrctl = IXGBE_SRRCTL_DROP_EN; 1347 1348 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 1349 u16 bufsz = IXGBEVF_RXBUFFER_2048; 1350 /* grow the amount we can receive on large page machines */ 1351 if (bufsz < (PAGE_SIZE / 2)) 1352 bufsz = (PAGE_SIZE / 2); 1353 /* cap the bufsz at our largest descriptor size */ 1354 bufsz = min((u16)IXGBEVF_MAX_RXBUFFER, bufsz); 1355 1356 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 1357 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS; 1358 srrctl |= ((IXGBEVF_RX_HDR_SIZE << 1359 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) & 1360 IXGBE_SRRCTL_BSIZEHDR_MASK); 1361 } else { 1362 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 1363 1364 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE) 1365 srrctl |= IXGBEVF_RXBUFFER_2048 >> 1366 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 1367 else 1368 srrctl |= rx_ring->rx_buf_len >> 1369 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 1370 } 1371 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl); 1372} 1373 1374/** 1375 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset 1376 * @adapter: board private structure 1377 * 1378 * Configure the Rx unit of the MAC after a reset. 1379 **/ 1380static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter) 1381{ 1382 u64 rdba; 1383 struct ixgbe_hw *hw = &adapter->hw; 1384 struct net_device *netdev = adapter->netdev; 1385 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 1386 int i, j; 1387 u32 rdlen; 1388 int rx_buf_len; 1389 1390 /* Decide whether to use packet split mode or not */ 1391 if (netdev->mtu > ETH_DATA_LEN) { 1392 if (adapter->flags & IXGBE_FLAG_RX_PS_CAPABLE) 1393 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED; 1394 else 1395 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED; 1396 } else { 1397 if (adapter->flags & IXGBE_FLAG_RX_1BUF_CAPABLE) 1398 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED; 1399 else 1400 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED; 1401 } 1402 1403 /* Set the RX buffer length according to the mode */ 1404 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 1405 /* PSRTYPE must be initialized in 82599 */ 1406 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | 1407 IXGBE_PSRTYPE_UDPHDR | 1408 IXGBE_PSRTYPE_IPV4HDR | 1409 IXGBE_PSRTYPE_IPV6HDR | 1410 IXGBE_PSRTYPE_L2HDR; 1411 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype); 1412 rx_buf_len = IXGBEVF_RX_HDR_SIZE; 1413 } else { 1414 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 1415 if (netdev->mtu <= ETH_DATA_LEN) 1416 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE; 1417 else 1418 rx_buf_len = ALIGN(max_frame, 1024); 1419 } 1420 1421 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc); 1422 /* Setup the HW Rx Head and Tail Descriptor Pointers and 1423 * the Base and Length of the Rx Descriptor Ring */ 1424 for (i = 0; i < adapter->num_rx_queues; i++) { 1425 rdba = adapter->rx_ring[i].dma; 1426 j = adapter->rx_ring[i].reg_idx; 1427 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j), 1428 (rdba & DMA_BIT_MASK(32))); 1429 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32)); 1430 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen); 1431 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0); 1432 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0); 1433 adapter->rx_ring[i].head = IXGBE_VFRDH(j); 1434 adapter->rx_ring[i].tail = IXGBE_VFRDT(j); 1435 adapter->rx_ring[i].rx_buf_len = rx_buf_len; 1436 1437 ixgbevf_configure_srrctl(adapter, j); 1438 } 1439} 1440 1441static void ixgbevf_vlan_rx_register(struct net_device *netdev, 1442 struct vlan_group *grp) 1443{ 1444 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 1445 struct ixgbe_hw *hw = &adapter->hw; 1446 int i, j; 1447 u32 ctrl; 1448 1449 adapter->vlgrp = grp; 1450 1451 for (i = 0; i < adapter->num_rx_queues; i++) { 1452 j = adapter->rx_ring[i].reg_idx; 1453 ctrl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)); 1454 ctrl |= IXGBE_RXDCTL_VME; 1455 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), ctrl); 1456 } 1457} 1458 1459static void ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 1460{ 1461 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 1462 struct ixgbe_hw *hw = &adapter->hw; 1463 1464 /* add VID to filter table */ 1465 if (hw->mac.ops.set_vfta) 1466 hw->mac.ops.set_vfta(hw, vid, 0, true); 1467} 1468 1469static void ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 1470{ 1471 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 1472 struct ixgbe_hw *hw = &adapter->hw; 1473 1474 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) 1475 ixgbevf_irq_disable(adapter); 1476 1477 vlan_group_set_device(adapter->vlgrp, vid, NULL); 1478 1479 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) 1480 ixgbevf_irq_enable(adapter, true, true); 1481 1482 /* remove VID from filter table */ 1483 if (hw->mac.ops.set_vfta) 1484 hw->mac.ops.set_vfta(hw, vid, 0, false); 1485} 1486 1487static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter) 1488{ 1489 ixgbevf_vlan_rx_register(adapter->netdev, adapter->vlgrp); 1490 1491 if (adapter->vlgrp) { 1492 u16 vid; 1493 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { 1494 if (!vlan_group_get_device(adapter->vlgrp, vid)) 1495 continue; 1496 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid); 1497 } 1498 } 1499} 1500 1501/** 1502 * ixgbevf_set_rx_mode - Multicast set 1503 * @netdev: network interface device structure 1504 * 1505 * The set_rx_method entry point is called whenever the multicast address 1506 * list or the network interface flags are updated. This routine is 1507 * responsible for configuring the hardware for proper multicast mode. 1508 **/ 1509static void ixgbevf_set_rx_mode(struct net_device *netdev) 1510{ 1511 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 1512 struct ixgbe_hw *hw = &adapter->hw; 1513 1514 /* reprogram multicast list */ 1515 if (hw->mac.ops.update_mc_addr_list) 1516 hw->mac.ops.update_mc_addr_list(hw, netdev); 1517} 1518 1519static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter) 1520{ 1521 int q_idx; 1522 struct ixgbevf_q_vector *q_vector; 1523 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1524 1525 for (q_idx = 0; q_idx < q_vectors; q_idx++) { 1526 struct napi_struct *napi; 1527 q_vector = adapter->q_vector[q_idx]; 1528 if (!q_vector->rxr_count) 1529 continue; 1530 napi = &q_vector->napi; 1531 if (q_vector->rxr_count > 1) 1532 napi->poll = &ixgbevf_clean_rxonly_many; 1533 1534 napi_enable(napi); 1535 } 1536} 1537 1538static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter) 1539{ 1540 int q_idx; 1541 struct ixgbevf_q_vector *q_vector; 1542 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1543 1544 for (q_idx = 0; q_idx < q_vectors; q_idx++) { 1545 q_vector = adapter->q_vector[q_idx]; 1546 if (!q_vector->rxr_count) 1547 continue; 1548 napi_disable(&q_vector->napi); 1549 } 1550} 1551 1552static void ixgbevf_configure(struct ixgbevf_adapter *adapter) 1553{ 1554 struct net_device *netdev = adapter->netdev; 1555 int i; 1556 1557 ixgbevf_set_rx_mode(netdev); 1558 1559 ixgbevf_restore_vlan(adapter); 1560 1561 ixgbevf_configure_tx(adapter); 1562 ixgbevf_configure_rx(adapter); 1563 for (i = 0; i < adapter->num_rx_queues; i++) { 1564 struct ixgbevf_ring *ring = &adapter->rx_ring[i]; 1565 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count); 1566 ring->next_to_use = ring->count - 1; 1567 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail); 1568 } 1569} 1570 1571#define IXGBE_MAX_RX_DESC_POLL 10 1572static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter, 1573 int rxr) 1574{ 1575 struct ixgbe_hw *hw = &adapter->hw; 1576 int j = adapter->rx_ring[rxr].reg_idx; 1577 int k; 1578 1579 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) { 1580 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE) 1581 break; 1582 else 1583 msleep(1); 1584 } 1585 if (k >= IXGBE_MAX_RX_DESC_POLL) { 1586 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d " 1587 "not set within the polling period\n", rxr); 1588 } 1589 1590 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr], 1591 (adapter->rx_ring[rxr].count - 1)); 1592} 1593 1594static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter) 1595{ 1596 /* Only save pre-reset stats if there are some */ 1597 if (adapter->stats.vfgprc || adapter->stats.vfgptc) { 1598 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc - 1599 adapter->stats.base_vfgprc; 1600 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc - 1601 adapter->stats.base_vfgptc; 1602 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc - 1603 adapter->stats.base_vfgorc; 1604 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc - 1605 adapter->stats.base_vfgotc; 1606 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc - 1607 adapter->stats.base_vfmprc; 1608 } 1609} 1610 1611static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter) 1612{ 1613 struct ixgbe_hw *hw = &adapter->hw; 1614 1615 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC); 1616 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB); 1617 adapter->stats.last_vfgorc |= 1618 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32); 1619 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC); 1620 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB); 1621 adapter->stats.last_vfgotc |= 1622 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32); 1623 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC); 1624 1625 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc; 1626 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc; 1627 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc; 1628 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc; 1629 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc; 1630} 1631 1632static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter) 1633{ 1634 struct net_device *netdev = adapter->netdev; 1635 struct ixgbe_hw *hw = &adapter->hw; 1636 int i, j = 0; 1637 int num_rx_rings = adapter->num_rx_queues; 1638 u32 txdctl, rxdctl; 1639 1640 for (i = 0; i < adapter->num_tx_queues; i++) { 1641 j = adapter->tx_ring[i].reg_idx; 1642 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j)); 1643 /* enable WTHRESH=8 descriptors, to encourage burst writeback */ 1644 txdctl |= (8 << 16); 1645 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl); 1646 } 1647 1648 for (i = 0; i < adapter->num_tx_queues; i++) { 1649 j = adapter->tx_ring[i].reg_idx; 1650 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j)); 1651 txdctl |= IXGBE_TXDCTL_ENABLE; 1652 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl); 1653 } 1654 1655 for (i = 0; i < num_rx_rings; i++) { 1656 j = adapter->rx_ring[i].reg_idx; 1657 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)); 1658 rxdctl |= IXGBE_RXDCTL_ENABLE; 1659 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl); 1660 ixgbevf_rx_desc_queue_enable(adapter, i); 1661 } 1662 1663 ixgbevf_configure_msix(adapter); 1664 1665 if (hw->mac.ops.set_rar) { 1666 if (is_valid_ether_addr(hw->mac.addr)) 1667 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0); 1668 else 1669 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0); 1670 } 1671 1672 clear_bit(__IXGBEVF_DOWN, &adapter->state); 1673 ixgbevf_napi_enable_all(adapter); 1674 1675 /* enable transmits */ 1676 netif_tx_start_all_queues(netdev); 1677 1678 ixgbevf_save_reset_stats(adapter); 1679 ixgbevf_init_last_counter_stats(adapter); 1680 1681 /* bring the link up in the watchdog, this could race with our first 1682 * link up interrupt but shouldn't be a problem */ 1683 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; 1684 adapter->link_check_timeout = jiffies; 1685 mod_timer(&adapter->watchdog_timer, jiffies); 1686 return 0; 1687} 1688 1689int ixgbevf_up(struct ixgbevf_adapter *adapter) 1690{ 1691 int err; 1692 struct ixgbe_hw *hw = &adapter->hw; 1693 1694 ixgbevf_configure(adapter); 1695 1696 err = ixgbevf_up_complete(adapter); 1697 1698 /* clear any pending interrupts, may auto mask */ 1699 IXGBE_READ_REG(hw, IXGBE_VTEICR); 1700 1701 ixgbevf_irq_enable(adapter, true, true); 1702 1703 return err; 1704} 1705 1706/** 1707 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue 1708 * @adapter: board private structure 1709 * @rx_ring: ring to free buffers from 1710 **/ 1711static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter, 1712 struct ixgbevf_ring *rx_ring) 1713{ 1714 struct pci_dev *pdev = adapter->pdev; 1715 unsigned long size; 1716 unsigned int i; 1717 1718 if (!rx_ring->rx_buffer_info) 1719 return; 1720 1721 /* Free all the Rx ring sk_buffs */ 1722 for (i = 0; i < rx_ring->count; i++) { 1723 struct ixgbevf_rx_buffer *rx_buffer_info; 1724 1725 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 1726 if (rx_buffer_info->dma) { 1727 dma_unmap_single(&pdev->dev, rx_buffer_info->dma, 1728 rx_ring->rx_buf_len, 1729 DMA_FROM_DEVICE); 1730 rx_buffer_info->dma = 0; 1731 } 1732 if (rx_buffer_info->skb) { 1733 struct sk_buff *skb = rx_buffer_info->skb; 1734 rx_buffer_info->skb = NULL; 1735 do { 1736 struct sk_buff *this = skb; 1737 skb = skb->prev; 1738 dev_kfree_skb(this); 1739 } while (skb); 1740 } 1741 if (!rx_buffer_info->page) 1742 continue; 1743 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma, 1744 PAGE_SIZE / 2, DMA_FROM_DEVICE); 1745 rx_buffer_info->page_dma = 0; 1746 put_page(rx_buffer_info->page); 1747 rx_buffer_info->page = NULL; 1748 rx_buffer_info->page_offset = 0; 1749 } 1750 1751 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count; 1752 memset(rx_ring->rx_buffer_info, 0, size); 1753 1754 /* Zero out the descriptor ring */ 1755 memset(rx_ring->desc, 0, rx_ring->size); 1756 1757 rx_ring->next_to_clean = 0; 1758 rx_ring->next_to_use = 0; 1759 1760 if (rx_ring->head) 1761 writel(0, adapter->hw.hw_addr + rx_ring->head); 1762 if (rx_ring->tail) 1763 writel(0, adapter->hw.hw_addr + rx_ring->tail); 1764} 1765 1766/** 1767 * ixgbevf_clean_tx_ring - Free Tx Buffers 1768 * @adapter: board private structure 1769 * @tx_ring: ring to be cleaned 1770 **/ 1771static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter, 1772 struct ixgbevf_ring *tx_ring) 1773{ 1774 struct ixgbevf_tx_buffer *tx_buffer_info; 1775 unsigned long size; 1776 unsigned int i; 1777 1778 if (!tx_ring->tx_buffer_info) 1779 return; 1780 1781 /* Free all the Tx ring sk_buffs */ 1782 1783 for (i = 0; i < tx_ring->count; i++) { 1784 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 1785 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info); 1786 } 1787 1788 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count; 1789 memset(tx_ring->tx_buffer_info, 0, size); 1790 1791 memset(tx_ring->desc, 0, tx_ring->size); 1792 1793 tx_ring->next_to_use = 0; 1794 tx_ring->next_to_clean = 0; 1795 1796 if (tx_ring->head) 1797 writel(0, adapter->hw.hw_addr + tx_ring->head); 1798 if (tx_ring->tail) 1799 writel(0, adapter->hw.hw_addr + tx_ring->tail); 1800} 1801 1802/** 1803 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues 1804 * @adapter: board private structure 1805 **/ 1806static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter) 1807{ 1808 int i; 1809 1810 for (i = 0; i < adapter->num_rx_queues; i++) 1811 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]); 1812} 1813 1814/** 1815 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues 1816 * @adapter: board private structure 1817 **/ 1818static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter) 1819{ 1820 int i; 1821 1822 for (i = 0; i < adapter->num_tx_queues; i++) 1823 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]); 1824} 1825 1826void ixgbevf_down(struct ixgbevf_adapter *adapter) 1827{ 1828 struct net_device *netdev = adapter->netdev; 1829 struct ixgbe_hw *hw = &adapter->hw; 1830 u32 txdctl; 1831 int i, j; 1832 1833 /* signal that we are down to the interrupt handler */ 1834 set_bit(__IXGBEVF_DOWN, &adapter->state); 1835 /* disable receives */ 1836 1837 netif_tx_disable(netdev); 1838 1839 msleep(10); 1840 1841 netif_tx_stop_all_queues(netdev); 1842 1843 ixgbevf_irq_disable(adapter); 1844 1845 ixgbevf_napi_disable_all(adapter); 1846 1847 del_timer_sync(&adapter->watchdog_timer); 1848 /* can't call flush scheduled work here because it can deadlock 1849 * if linkwatch_event tries to acquire the rtnl_lock which we are 1850 * holding */ 1851 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK) 1852 msleep(1); 1853 1854 /* disable transmits in the hardware now that interrupts are off */ 1855 for (i = 0; i < adapter->num_tx_queues; i++) { 1856 j = adapter->tx_ring[i].reg_idx; 1857 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j)); 1858 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), 1859 (txdctl & ~IXGBE_TXDCTL_ENABLE)); 1860 } 1861 1862 netif_carrier_off(netdev); 1863 1864 if (!pci_channel_offline(adapter->pdev)) 1865 ixgbevf_reset(adapter); 1866 1867 ixgbevf_clean_all_tx_rings(adapter); 1868 ixgbevf_clean_all_rx_rings(adapter); 1869} 1870 1871void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter) 1872{ 1873 struct ixgbe_hw *hw = &adapter->hw; 1874 1875 WARN_ON(in_interrupt()); 1876 1877 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state)) 1878 msleep(1); 1879 1880 /* 1881 * Check if PF is up before re-init. If not then skip until 1882 * later when the PF is up and ready to service requests from 1883 * the VF via mailbox. If the VF is up and running then the 1884 * watchdog task will continue to schedule reset tasks until 1885 * the PF is up and running. 1886 */ 1887 if (!hw->mac.ops.reset_hw(hw)) { 1888 ixgbevf_down(adapter); 1889 ixgbevf_up(adapter); 1890 } 1891 1892 clear_bit(__IXGBEVF_RESETTING, &adapter->state); 1893} 1894 1895void ixgbevf_reset(struct ixgbevf_adapter *adapter) 1896{ 1897 struct ixgbe_hw *hw = &adapter->hw; 1898 struct net_device *netdev = adapter->netdev; 1899 1900 if (hw->mac.ops.reset_hw(hw)) 1901 hw_dbg(hw, "PF still resetting\n"); 1902 else 1903 hw->mac.ops.init_hw(hw); 1904 1905 if (is_valid_ether_addr(adapter->hw.mac.addr)) { 1906 memcpy(netdev->dev_addr, adapter->hw.mac.addr, 1907 netdev->addr_len); 1908 memcpy(netdev->perm_addr, adapter->hw.mac.addr, 1909 netdev->addr_len); 1910 } 1911} 1912 1913static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter, 1914 int vectors) 1915{ 1916 int err, vector_threshold; 1917 1918 /* We'll want at least 3 (vector_threshold): 1919 * 1) TxQ[0] Cleanup 1920 * 2) RxQ[0] Cleanup 1921 * 3) Other (Link Status Change, etc.) 1922 */ 1923 vector_threshold = MIN_MSIX_COUNT; 1924 1925 /* The more we get, the more we will assign to Tx/Rx Cleanup 1926 * for the separate queues...where Rx Cleanup >= Tx Cleanup. 1927 * Right now, we simply care about how many we'll get; we'll 1928 * set them up later while requesting irq's. 1929 */ 1930 while (vectors >= vector_threshold) { 1931 err = pci_enable_msix(adapter->pdev, adapter->msix_entries, 1932 vectors); 1933 if (!err) /* Success in acquiring all requested vectors. */ 1934 break; 1935 else if (err < 0) 1936 vectors = 0; /* Nasty failure, quit now */ 1937 else /* err == number of vectors we should try again with */ 1938 vectors = err; 1939 } 1940 1941 if (vectors < vector_threshold) { 1942 /* Can't allocate enough MSI-X interrupts? Oh well. 1943 * This just means we'll go with either a single MSI 1944 * vector or fall back to legacy interrupts. 1945 */ 1946 hw_dbg(&adapter->hw, 1947 "Unable to allocate MSI-X interrupts\n"); 1948 kfree(adapter->msix_entries); 1949 adapter->msix_entries = NULL; 1950 } else { 1951 /* 1952 * Adjust for only the vectors we'll use, which is minimum 1953 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of 1954 * vectors we were allocated. 1955 */ 1956 adapter->num_msix_vectors = vectors; 1957 } 1958} 1959 1960/* 1961 * ixgbe_set_num_queues: Allocate queues for device, feature dependant 1962 * @adapter: board private structure to initialize 1963 * 1964 * This is the top level queue allocation routine. The order here is very 1965 * important, starting with the "most" number of features turned on at once, 1966 * and ending with the smallest set of features. This way large combinations 1967 * can be allocated if they're turned on, and smaller combinations are the 1968 * fallthrough conditions. 1969 * 1970 **/ 1971static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter) 1972{ 1973 /* Start with base case */ 1974 adapter->num_rx_queues = 1; 1975 adapter->num_tx_queues = 1; 1976 adapter->num_rx_pools = adapter->num_rx_queues; 1977 adapter->num_rx_queues_per_pool = 1; 1978} 1979 1980/** 1981 * ixgbevf_alloc_queues - Allocate memory for all rings 1982 * @adapter: board private structure to initialize 1983 * 1984 * We allocate one ring per queue at run-time since we don't know the 1985 * number of queues at compile-time. The polling_netdev array is 1986 * intended for Multiqueue, but should work fine with a single queue. 1987 **/ 1988static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter) 1989{ 1990 int i; 1991 1992 adapter->tx_ring = kcalloc(adapter->num_tx_queues, 1993 sizeof(struct ixgbevf_ring), GFP_KERNEL); 1994 if (!adapter->tx_ring) 1995 goto err_tx_ring_allocation; 1996 1997 adapter->rx_ring = kcalloc(adapter->num_rx_queues, 1998 sizeof(struct ixgbevf_ring), GFP_KERNEL); 1999 if (!adapter->rx_ring) 2000 goto err_rx_ring_allocation; 2001 2002 for (i = 0; i < adapter->num_tx_queues; i++) { 2003 adapter->tx_ring[i].count = adapter->tx_ring_count; 2004 adapter->tx_ring[i].queue_index = i; 2005 adapter->tx_ring[i].reg_idx = i; 2006 } 2007 2008 for (i = 0; i < adapter->num_rx_queues; i++) { 2009 adapter->rx_ring[i].count = adapter->rx_ring_count; 2010 adapter->rx_ring[i].queue_index = i; 2011 adapter->rx_ring[i].reg_idx = i; 2012 } 2013 2014 return 0; 2015 2016err_rx_ring_allocation: 2017 kfree(adapter->tx_ring); 2018err_tx_ring_allocation: 2019 return -ENOMEM; 2020} 2021 2022/** 2023 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported 2024 * @adapter: board private structure to initialize 2025 * 2026 * Attempt to configure the interrupts using the best available 2027 * capabilities of the hardware and the kernel. 2028 **/ 2029static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter) 2030{ 2031 int err = 0; 2032 int vector, v_budget; 2033 2034 /* 2035 * It's easy to be greedy for MSI-X vectors, but it really 2036 * doesn't do us much good if we have a lot more vectors 2037 * than CPU's. So let's be conservative and only ask for 2038 * (roughly) twice the number of vectors as there are CPU's. 2039 */ 2040 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues, 2041 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS; 2042 2043 /* A failure in MSI-X entry allocation isn't fatal, but it does 2044 * mean we disable MSI-X capabilities of the adapter. */ 2045 adapter->msix_entries = kcalloc(v_budget, 2046 sizeof(struct msix_entry), GFP_KERNEL); 2047 if (!adapter->msix_entries) { 2048 err = -ENOMEM; 2049 goto out; 2050 } 2051 2052 for (vector = 0; vector < v_budget; vector++) 2053 adapter->msix_entries[vector].entry = vector; 2054 2055 ixgbevf_acquire_msix_vectors(adapter, v_budget); 2056 2057out: 2058 return err; 2059} 2060 2061/** 2062 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors 2063 * @adapter: board private structure to initialize 2064 * 2065 * We allocate one q_vector per queue interrupt. If allocation fails we 2066 * return -ENOMEM. 2067 **/ 2068static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter) 2069{ 2070 int q_idx, num_q_vectors; 2071 struct ixgbevf_q_vector *q_vector; 2072 int napi_vectors; 2073 int (*poll)(struct napi_struct *, int); 2074 2075 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 2076 napi_vectors = adapter->num_rx_queues; 2077 poll = &ixgbevf_clean_rxonly; 2078 2079 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) { 2080 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL); 2081 if (!q_vector) 2082 goto err_out; 2083 q_vector->adapter = adapter; 2084 q_vector->v_idx = q_idx; 2085 q_vector->eitr = adapter->eitr_param; 2086 if (q_idx < napi_vectors) 2087 netif_napi_add(adapter->netdev, &q_vector->napi, 2088 (*poll), 64); 2089 adapter->q_vector[q_idx] = q_vector; 2090 } 2091 2092 return 0; 2093 2094err_out: 2095 while (q_idx) { 2096 q_idx--; 2097 q_vector = adapter->q_vector[q_idx]; 2098 netif_napi_del(&q_vector->napi); 2099 kfree(q_vector); 2100 adapter->q_vector[q_idx] = NULL; 2101 } 2102 return -ENOMEM; 2103} 2104 2105/** 2106 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors 2107 * @adapter: board private structure to initialize 2108 * 2109 * This function frees the memory allocated to the q_vectors. In addition if 2110 * NAPI is enabled it will delete any references to the NAPI struct prior 2111 * to freeing the q_vector. 2112 **/ 2113static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter) 2114{ 2115 int q_idx, num_q_vectors; 2116 int napi_vectors; 2117 2118 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 2119 napi_vectors = adapter->num_rx_queues; 2120 2121 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) { 2122 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx]; 2123 2124 adapter->q_vector[q_idx] = NULL; 2125 if (q_idx < napi_vectors) 2126 netif_napi_del(&q_vector->napi); 2127 kfree(q_vector); 2128 } 2129} 2130 2131/** 2132 * ixgbevf_reset_interrupt_capability - Reset MSIX setup 2133 * @adapter: board private structure 2134 * 2135 **/ 2136static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter) 2137{ 2138 pci_disable_msix(adapter->pdev); 2139 kfree(adapter->msix_entries); 2140 adapter->msix_entries = NULL; 2141} 2142 2143/** 2144 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init 2145 * @adapter: board private structure to initialize 2146 * 2147 **/ 2148static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter) 2149{ 2150 int err; 2151 2152 /* Number of supported queues */ 2153 ixgbevf_set_num_queues(adapter); 2154 2155 err = ixgbevf_set_interrupt_capability(adapter); 2156 if (err) { 2157 hw_dbg(&adapter->hw, 2158 "Unable to setup interrupt capabilities\n"); 2159 goto err_set_interrupt; 2160 } 2161 2162 err = ixgbevf_alloc_q_vectors(adapter); 2163 if (err) { 2164 hw_dbg(&adapter->hw, "Unable to allocate memory for queue " 2165 "vectors\n"); 2166 goto err_alloc_q_vectors; 2167 } 2168 2169 err = ixgbevf_alloc_queues(adapter); 2170 if (err) { 2171 printk(KERN_ERR "Unable to allocate memory for queues\n"); 2172 goto err_alloc_queues; 2173 } 2174 2175 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, " 2176 "Tx Queue count = %u\n", 2177 (adapter->num_rx_queues > 1) ? "Enabled" : 2178 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues); 2179 2180 set_bit(__IXGBEVF_DOWN, &adapter->state); 2181 2182 return 0; 2183err_alloc_queues: 2184 ixgbevf_free_q_vectors(adapter); 2185err_alloc_q_vectors: 2186 ixgbevf_reset_interrupt_capability(adapter); 2187err_set_interrupt: 2188 return err; 2189} 2190 2191/** 2192 * ixgbevf_sw_init - Initialize general software structures 2193 * (struct ixgbevf_adapter) 2194 * @adapter: board private structure to initialize 2195 * 2196 * ixgbevf_sw_init initializes the Adapter private data structure. 2197 * Fields are initialized based on PCI device information and 2198 * OS network device settings (MTU size). 2199 **/ 2200static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter) 2201{ 2202 struct ixgbe_hw *hw = &adapter->hw; 2203 struct pci_dev *pdev = adapter->pdev; 2204 int err; 2205 2206 /* PCI config space info */ 2207 2208 hw->vendor_id = pdev->vendor; 2209 hw->device_id = pdev->device; 2210 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); 2211 hw->subsystem_vendor_id = pdev->subsystem_vendor; 2212 hw->subsystem_device_id = pdev->subsystem_device; 2213 2214 hw->mbx.ops.init_params(hw); 2215 hw->mac.max_tx_queues = MAX_TX_QUEUES; 2216 hw->mac.max_rx_queues = MAX_RX_QUEUES; 2217 err = hw->mac.ops.reset_hw(hw); 2218 if (err) { 2219 dev_info(&pdev->dev, 2220 "PF still in reset state, assigning new address\n"); 2221 dev_hw_addr_random(adapter->netdev, hw->mac.addr); 2222 } else { 2223 err = hw->mac.ops.init_hw(hw); 2224 if (err) { 2225 printk(KERN_ERR "init_shared_code failed: %d\n", err); 2226 goto out; 2227 } 2228 } 2229 2230 /* Enable dynamic interrupt throttling rates */ 2231 adapter->eitr_param = 20000; 2232 adapter->itr_setting = 1; 2233 2234 /* set defaults for eitr in MegaBytes */ 2235 adapter->eitr_low = 10; 2236 adapter->eitr_high = 20; 2237 2238 /* set default ring sizes */ 2239 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD; 2240 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD; 2241 2242 /* enable rx csum by default */ 2243 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED; 2244 2245 set_bit(__IXGBEVF_DOWN, &adapter->state); 2246 2247out: 2248 return err; 2249} 2250 2251#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \ 2252 { \ 2253 u32 current_counter = IXGBE_READ_REG(hw, reg); \ 2254 if (current_counter < last_counter) \ 2255 counter += 0x100000000LL; \ 2256 last_counter = current_counter; \ 2257 counter &= 0xFFFFFFFF00000000LL; \ 2258 counter |= current_counter; \ 2259 } 2260 2261#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \ 2262 { \ 2263 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \ 2264 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \ 2265 u64 current_counter = (current_counter_msb << 32) | \ 2266 current_counter_lsb; \ 2267 if (current_counter < last_counter) \ 2268 counter += 0x1000000000LL; \ 2269 last_counter = current_counter; \ 2270 counter &= 0xFFFFFFF000000000LL; \ 2271 counter |= current_counter; \ 2272 } 2273/** 2274 * ixgbevf_update_stats - Update the board statistics counters. 2275 * @adapter: board private structure 2276 **/ 2277void ixgbevf_update_stats(struct ixgbevf_adapter *adapter) 2278{ 2279 struct ixgbe_hw *hw = &adapter->hw; 2280 2281 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc, 2282 adapter->stats.vfgprc); 2283 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc, 2284 adapter->stats.vfgptc); 2285 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB, 2286 adapter->stats.last_vfgorc, 2287 adapter->stats.vfgorc); 2288 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB, 2289 adapter->stats.last_vfgotc, 2290 adapter->stats.vfgotc); 2291 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc, 2292 adapter->stats.vfmprc); 2293 2294 /* Fill out the OS statistics structure */ 2295 adapter->net_stats.multicast = adapter->stats.vfmprc - 2296 adapter->stats.base_vfmprc; 2297} 2298 2299/** 2300 * ixgbevf_watchdog - Timer Call-back 2301 * @data: pointer to adapter cast into an unsigned long 2302 **/ 2303static void ixgbevf_watchdog(unsigned long data) 2304{ 2305 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data; 2306 struct ixgbe_hw *hw = &adapter->hw; 2307 u64 eics = 0; 2308 int i; 2309 2310 /* 2311 * Do the watchdog outside of interrupt context due to the lovely 2312 * delays that some of the newer hardware requires 2313 */ 2314 2315 if (test_bit(__IXGBEVF_DOWN, &adapter->state)) 2316 goto watchdog_short_circuit; 2317 2318 /* get one bit for every active tx/rx interrupt vector */ 2319 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) { 2320 struct ixgbevf_q_vector *qv = adapter->q_vector[i]; 2321 if (qv->rxr_count || qv->txr_count) 2322 eics |= (1 << i); 2323 } 2324 2325 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics); 2326 2327watchdog_short_circuit: 2328 schedule_work(&adapter->watchdog_task); 2329} 2330 2331/** 2332 * ixgbevf_tx_timeout - Respond to a Tx Hang 2333 * @netdev: network interface device structure 2334 **/ 2335static void ixgbevf_tx_timeout(struct net_device *netdev) 2336{ 2337 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2338 2339 /* Do the reset outside of interrupt context */ 2340 schedule_work(&adapter->reset_task); 2341} 2342 2343static void ixgbevf_reset_task(struct work_struct *work) 2344{ 2345 struct ixgbevf_adapter *adapter; 2346 adapter = container_of(work, struct ixgbevf_adapter, reset_task); 2347 2348 /* If we're already down or resetting, just bail */ 2349 if (test_bit(__IXGBEVF_DOWN, &adapter->state) || 2350 test_bit(__IXGBEVF_RESETTING, &adapter->state)) 2351 return; 2352 2353 adapter->tx_timeout_count++; 2354 2355 ixgbevf_reinit_locked(adapter); 2356} 2357 2358/** 2359 * ixgbevf_watchdog_task - worker thread to bring link up 2360 * @work: pointer to work_struct containing our data 2361 **/ 2362static void ixgbevf_watchdog_task(struct work_struct *work) 2363{ 2364 struct ixgbevf_adapter *adapter = container_of(work, 2365 struct ixgbevf_adapter, 2366 watchdog_task); 2367 struct net_device *netdev = adapter->netdev; 2368 struct ixgbe_hw *hw = &adapter->hw; 2369 u32 link_speed = adapter->link_speed; 2370 bool link_up = adapter->link_up; 2371 2372 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK; 2373 2374 /* 2375 * Always check the link on the watchdog because we have 2376 * no LSC interrupt 2377 */ 2378 if (hw->mac.ops.check_link) { 2379 if ((hw->mac.ops.check_link(hw, &link_speed, 2380 &link_up, false)) != 0) { 2381 adapter->link_up = link_up; 2382 adapter->link_speed = link_speed; 2383 netif_carrier_off(netdev); 2384 netif_tx_stop_all_queues(netdev); 2385 schedule_work(&adapter->reset_task); 2386 goto pf_has_reset; 2387 } 2388 } else { 2389 /* always assume link is up, if no check link 2390 * function */ 2391 link_speed = IXGBE_LINK_SPEED_10GB_FULL; 2392 link_up = true; 2393 } 2394 adapter->link_up = link_up; 2395 adapter->link_speed = link_speed; 2396 2397 if (link_up) { 2398 if (!netif_carrier_ok(netdev)) { 2399 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n", 2400 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ? 2401 10 : 1); 2402 netif_carrier_on(netdev); 2403 netif_tx_wake_all_queues(netdev); 2404 } else { 2405 /* Force detection of hung controller */ 2406 adapter->detect_tx_hung = true; 2407 } 2408 } else { 2409 adapter->link_up = false; 2410 adapter->link_speed = 0; 2411 if (netif_carrier_ok(netdev)) { 2412 hw_dbg(&adapter->hw, "NIC Link is Down\n"); 2413 netif_carrier_off(netdev); 2414 netif_tx_stop_all_queues(netdev); 2415 } 2416 } 2417 2418 ixgbevf_update_stats(adapter); 2419 2420pf_has_reset: 2421 /* Force detection of hung controller every watchdog period */ 2422 adapter->detect_tx_hung = true; 2423 2424 /* Reset the timer */ 2425 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) 2426 mod_timer(&adapter->watchdog_timer, 2427 round_jiffies(jiffies + (2 * HZ))); 2428 2429 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK; 2430} 2431 2432/** 2433 * ixgbevf_free_tx_resources - Free Tx Resources per Queue 2434 * @adapter: board private structure 2435 * @tx_ring: Tx descriptor ring for a specific queue 2436 * 2437 * Free all transmit software resources 2438 **/ 2439void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter, 2440 struct ixgbevf_ring *tx_ring) 2441{ 2442 struct pci_dev *pdev = adapter->pdev; 2443 2444 ixgbevf_clean_tx_ring(adapter, tx_ring); 2445 2446 vfree(tx_ring->tx_buffer_info); 2447 tx_ring->tx_buffer_info = NULL; 2448 2449 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, 2450 tx_ring->dma); 2451 2452 tx_ring->desc = NULL; 2453} 2454 2455/** 2456 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues 2457 * @adapter: board private structure 2458 * 2459 * Free all transmit software resources 2460 **/ 2461static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter) 2462{ 2463 int i; 2464 2465 for (i = 0; i < adapter->num_tx_queues; i++) 2466 if (adapter->tx_ring[i].desc) 2467 ixgbevf_free_tx_resources(adapter, 2468 &adapter->tx_ring[i]); 2469 2470} 2471 2472/** 2473 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors) 2474 * @adapter: board private structure 2475 * @tx_ring: tx descriptor ring (for a specific queue) to setup 2476 * 2477 * Return 0 on success, negative on failure 2478 **/ 2479int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter, 2480 struct ixgbevf_ring *tx_ring) 2481{ 2482 struct pci_dev *pdev = adapter->pdev; 2483 int size; 2484 2485 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count; 2486 tx_ring->tx_buffer_info = vmalloc(size); 2487 if (!tx_ring->tx_buffer_info) 2488 goto err; 2489 memset(tx_ring->tx_buffer_info, 0, size); 2490 2491 /* round up to nearest 4K */ 2492 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc); 2493 tx_ring->size = ALIGN(tx_ring->size, 4096); 2494 2495 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size, 2496 &tx_ring->dma, GFP_KERNEL); 2497 if (!tx_ring->desc) 2498 goto err; 2499 2500 tx_ring->next_to_use = 0; 2501 tx_ring->next_to_clean = 0; 2502 tx_ring->work_limit = tx_ring->count; 2503 return 0; 2504 2505err: 2506 vfree(tx_ring->tx_buffer_info); 2507 tx_ring->tx_buffer_info = NULL; 2508 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit " 2509 "descriptor ring\n"); 2510 return -ENOMEM; 2511} 2512 2513/** 2514 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources 2515 * @adapter: board private structure 2516 * 2517 * If this function returns with an error, then it's possible one or 2518 * more of the rings is populated (while the rest are not). It is the 2519 * callers duty to clean those orphaned rings. 2520 * 2521 * Return 0 on success, negative on failure 2522 **/ 2523static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter) 2524{ 2525 int i, err = 0; 2526 2527 for (i = 0; i < adapter->num_tx_queues; i++) { 2528 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]); 2529 if (!err) 2530 continue; 2531 hw_dbg(&adapter->hw, 2532 "Allocation for Tx Queue %u failed\n", i); 2533 break; 2534 } 2535 2536 return err; 2537} 2538 2539/** 2540 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors) 2541 * @adapter: board private structure 2542 * @rx_ring: rx descriptor ring (for a specific queue) to setup 2543 * 2544 * Returns 0 on success, negative on failure 2545 **/ 2546int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter, 2547 struct ixgbevf_ring *rx_ring) 2548{ 2549 struct pci_dev *pdev = adapter->pdev; 2550 int size; 2551 2552 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count; 2553 rx_ring->rx_buffer_info = vmalloc(size); 2554 if (!rx_ring->rx_buffer_info) { 2555 hw_dbg(&adapter->hw, 2556 "Unable to vmalloc buffer memory for " 2557 "the receive descriptor ring\n"); 2558 goto alloc_failed; 2559 } 2560 memset(rx_ring->rx_buffer_info, 0, size); 2561 2562 /* Round up to nearest 4K */ 2563 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc); 2564 rx_ring->size = ALIGN(rx_ring->size, 4096); 2565 2566 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size, 2567 &rx_ring->dma, GFP_KERNEL); 2568 2569 if (!rx_ring->desc) { 2570 hw_dbg(&adapter->hw, 2571 "Unable to allocate memory for " 2572 "the receive descriptor ring\n"); 2573 vfree(rx_ring->rx_buffer_info); 2574 rx_ring->rx_buffer_info = NULL; 2575 goto alloc_failed; 2576 } 2577 2578 rx_ring->next_to_clean = 0; 2579 rx_ring->next_to_use = 0; 2580 2581 return 0; 2582alloc_failed: 2583 return -ENOMEM; 2584} 2585 2586/** 2587 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources 2588 * @adapter: board private structure 2589 * 2590 * If this function returns with an error, then it's possible one or 2591 * more of the rings is populated (while the rest are not). It is the 2592 * callers duty to clean those orphaned rings. 2593 * 2594 * Return 0 on success, negative on failure 2595 **/ 2596static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter) 2597{ 2598 int i, err = 0; 2599 2600 for (i = 0; i < adapter->num_rx_queues; i++) { 2601 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]); 2602 if (!err) 2603 continue; 2604 hw_dbg(&adapter->hw, 2605 "Allocation for Rx Queue %u failed\n", i); 2606 break; 2607 } 2608 return err; 2609} 2610 2611/** 2612 * ixgbevf_free_rx_resources - Free Rx Resources 2613 * @adapter: board private structure 2614 * @rx_ring: ring to clean the resources from 2615 * 2616 * Free all receive software resources 2617 **/ 2618void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter, 2619 struct ixgbevf_ring *rx_ring) 2620{ 2621 struct pci_dev *pdev = adapter->pdev; 2622 2623 ixgbevf_clean_rx_ring(adapter, rx_ring); 2624 2625 vfree(rx_ring->rx_buffer_info); 2626 rx_ring->rx_buffer_info = NULL; 2627 2628 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, 2629 rx_ring->dma); 2630 2631 rx_ring->desc = NULL; 2632} 2633 2634/** 2635 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues 2636 * @adapter: board private structure 2637 * 2638 * Free all receive software resources 2639 **/ 2640static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter) 2641{ 2642 int i; 2643 2644 for (i = 0; i < adapter->num_rx_queues; i++) 2645 if (adapter->rx_ring[i].desc) 2646 ixgbevf_free_rx_resources(adapter, 2647 &adapter->rx_ring[i]); 2648} 2649 2650/** 2651 * ixgbevf_open - Called when a network interface is made active 2652 * @netdev: network interface device structure 2653 * 2654 * Returns 0 on success, negative value on failure 2655 * 2656 * The open entry point is called when a network interface is made 2657 * active by the system (IFF_UP). At this point all resources needed 2658 * for transmit and receive operations are allocated, the interrupt 2659 * handler is registered with the OS, the watchdog timer is started, 2660 * and the stack is notified that the interface is ready. 2661 **/ 2662static int ixgbevf_open(struct net_device *netdev) 2663{ 2664 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2665 struct ixgbe_hw *hw = &adapter->hw; 2666 int err; 2667 2668 /* disallow open during test */ 2669 if (test_bit(__IXGBEVF_TESTING, &adapter->state)) 2670 return -EBUSY; 2671 2672 if (hw->adapter_stopped) { 2673 ixgbevf_reset(adapter); 2674 /* if adapter is still stopped then PF isn't up and 2675 * the vf can't start. */ 2676 if (hw->adapter_stopped) { 2677 err = IXGBE_ERR_MBX; 2678 printk(KERN_ERR "Unable to start - perhaps the PF" 2679 " Driver isn't up yet\n"); 2680 goto err_setup_reset; 2681 } 2682 } 2683 2684 /* allocate transmit descriptors */ 2685 err = ixgbevf_setup_all_tx_resources(adapter); 2686 if (err) 2687 goto err_setup_tx; 2688 2689 /* allocate receive descriptors */ 2690 err = ixgbevf_setup_all_rx_resources(adapter); 2691 if (err) 2692 goto err_setup_rx; 2693 2694 ixgbevf_configure(adapter); 2695 2696 /* 2697 * Map the Tx/Rx rings to the vectors we were allotted. 2698 * if request_irq will be called in this function map_rings 2699 * must be called *before* up_complete 2700 */ 2701 ixgbevf_map_rings_to_vectors(adapter); 2702 2703 err = ixgbevf_up_complete(adapter); 2704 if (err) 2705 goto err_up; 2706 2707 /* clear any pending interrupts, may auto mask */ 2708 IXGBE_READ_REG(hw, IXGBE_VTEICR); 2709 err = ixgbevf_request_irq(adapter); 2710 if (err) 2711 goto err_req_irq; 2712 2713 ixgbevf_irq_enable(adapter, true, true); 2714 2715 return 0; 2716 2717err_req_irq: 2718 ixgbevf_down(adapter); 2719err_up: 2720 ixgbevf_free_irq(adapter); 2721err_setup_rx: 2722 ixgbevf_free_all_rx_resources(adapter); 2723err_setup_tx: 2724 ixgbevf_free_all_tx_resources(adapter); 2725 ixgbevf_reset(adapter); 2726 2727err_setup_reset: 2728 2729 return err; 2730} 2731 2732/** 2733 * ixgbevf_close - Disables a network interface 2734 * @netdev: network interface device structure 2735 * 2736 * Returns 0, this is not allowed to fail 2737 * 2738 * The close entry point is called when an interface is de-activated 2739 * by the OS. The hardware is still under the drivers control, but 2740 * needs to be disabled. A global MAC reset is issued to stop the 2741 * hardware, and all transmit and receive resources are freed. 2742 **/ 2743static int ixgbevf_close(struct net_device *netdev) 2744{ 2745 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2746 2747 ixgbevf_down(adapter); 2748 ixgbevf_free_irq(adapter); 2749 2750 ixgbevf_free_all_tx_resources(adapter); 2751 ixgbevf_free_all_rx_resources(adapter); 2752 2753 return 0; 2754} 2755 2756static int ixgbevf_tso(struct ixgbevf_adapter *adapter, 2757 struct ixgbevf_ring *tx_ring, 2758 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len) 2759{ 2760 struct ixgbe_adv_tx_context_desc *context_desc; 2761 unsigned int i; 2762 int err; 2763 struct ixgbevf_tx_buffer *tx_buffer_info; 2764 u32 vlan_macip_lens = 0, type_tucmd_mlhl; 2765 u32 mss_l4len_idx, l4len; 2766 2767 if (skb_is_gso(skb)) { 2768 if (skb_header_cloned(skb)) { 2769 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 2770 if (err) 2771 return err; 2772 } 2773 l4len = tcp_hdrlen(skb); 2774 *hdr_len += l4len; 2775 2776 if (skb->protocol == htons(ETH_P_IP)) { 2777 struct iphdr *iph = ip_hdr(skb); 2778 iph->tot_len = 0; 2779 iph->check = 0; 2780 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, 2781 iph->daddr, 0, 2782 IPPROTO_TCP, 2783 0); 2784 adapter->hw_tso_ctxt++; 2785 } else if (skb_is_gso_v6(skb)) { 2786 ipv6_hdr(skb)->payload_len = 0; 2787 tcp_hdr(skb)->check = 2788 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 2789 &ipv6_hdr(skb)->daddr, 2790 0, IPPROTO_TCP, 0); 2791 adapter->hw_tso6_ctxt++; 2792 } 2793 2794 i = tx_ring->next_to_use; 2795 2796 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2797 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i); 2798 2799 /* VLAN MACLEN IPLEN */ 2800 if (tx_flags & IXGBE_TX_FLAGS_VLAN) 2801 vlan_macip_lens |= 2802 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK); 2803 vlan_macip_lens |= ((skb_network_offset(skb)) << 2804 IXGBE_ADVTXD_MACLEN_SHIFT); 2805 *hdr_len += skb_network_offset(skb); 2806 vlan_macip_lens |= 2807 (skb_transport_header(skb) - skb_network_header(skb)); 2808 *hdr_len += 2809 (skb_transport_header(skb) - skb_network_header(skb)); 2810 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens); 2811 context_desc->seqnum_seed = 0; 2812 2813 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */ 2814 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT | 2815 IXGBE_ADVTXD_DTYP_CTXT); 2816 2817 if (skb->protocol == htons(ETH_P_IP)) 2818 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4; 2819 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP; 2820 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl); 2821 2822 /* MSS L4LEN IDX */ 2823 mss_l4len_idx = 2824 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT); 2825 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT); 2826 /* use index 1 for TSO */ 2827 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT); 2828 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx); 2829 2830 tx_buffer_info->time_stamp = jiffies; 2831 tx_buffer_info->next_to_watch = i; 2832 2833 i++; 2834 if (i == tx_ring->count) 2835 i = 0; 2836 tx_ring->next_to_use = i; 2837 2838 return true; 2839 } 2840 2841 return false; 2842} 2843 2844static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter, 2845 struct ixgbevf_ring *tx_ring, 2846 struct sk_buff *skb, u32 tx_flags) 2847{ 2848 struct ixgbe_adv_tx_context_desc *context_desc; 2849 unsigned int i; 2850 struct ixgbevf_tx_buffer *tx_buffer_info; 2851 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0; 2852 2853 if (skb->ip_summed == CHECKSUM_PARTIAL || 2854 (tx_flags & IXGBE_TX_FLAGS_VLAN)) { 2855 i = tx_ring->next_to_use; 2856 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2857 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i); 2858 2859 if (tx_flags & IXGBE_TX_FLAGS_VLAN) 2860 vlan_macip_lens |= (tx_flags & 2861 IXGBE_TX_FLAGS_VLAN_MASK); 2862 vlan_macip_lens |= (skb_network_offset(skb) << 2863 IXGBE_ADVTXD_MACLEN_SHIFT); 2864 if (skb->ip_summed == CHECKSUM_PARTIAL) 2865 vlan_macip_lens |= (skb_transport_header(skb) - 2866 skb_network_header(skb)); 2867 2868 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens); 2869 context_desc->seqnum_seed = 0; 2870 2871 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT | 2872 IXGBE_ADVTXD_DTYP_CTXT); 2873 2874 if (skb->ip_summed == CHECKSUM_PARTIAL) { 2875 switch (skb->protocol) { 2876 case __constant_htons(ETH_P_IP): 2877 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4; 2878 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 2879 type_tucmd_mlhl |= 2880 IXGBE_ADVTXD_TUCMD_L4T_TCP; 2881 break; 2882 case __constant_htons(ETH_P_IPV6): 2883 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 2884 type_tucmd_mlhl |= 2885 IXGBE_ADVTXD_TUCMD_L4T_TCP; 2886 break; 2887 default: 2888 if (unlikely(net_ratelimit())) { 2889 printk(KERN_WARNING 2890 "partial checksum but " 2891 "proto=%x!\n", 2892 skb->protocol); 2893 } 2894 break; 2895 } 2896 } 2897 2898 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl); 2899 /* use index zero for tx checksum offload */ 2900 context_desc->mss_l4len_idx = 0; 2901 2902 tx_buffer_info->time_stamp = jiffies; 2903 tx_buffer_info->next_to_watch = i; 2904 2905 adapter->hw_csum_tx_good++; 2906 i++; 2907 if (i == tx_ring->count) 2908 i = 0; 2909 tx_ring->next_to_use = i; 2910 2911 return true; 2912 } 2913 2914 return false; 2915} 2916 2917static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter, 2918 struct ixgbevf_ring *tx_ring, 2919 struct sk_buff *skb, u32 tx_flags, 2920 unsigned int first) 2921{ 2922 struct pci_dev *pdev = adapter->pdev; 2923 struct ixgbevf_tx_buffer *tx_buffer_info; 2924 unsigned int len; 2925 unsigned int total = skb->len; 2926 unsigned int offset = 0, size; 2927 int count = 0; 2928 unsigned int nr_frags = skb_shinfo(skb)->nr_frags; 2929 unsigned int f; 2930 int i; 2931 2932 i = tx_ring->next_to_use; 2933 2934 len = min(skb_headlen(skb), total); 2935 while (len) { 2936 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2937 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD); 2938 2939 tx_buffer_info->length = size; 2940 tx_buffer_info->mapped_as_page = false; 2941 tx_buffer_info->dma = dma_map_single(&adapter->pdev->dev, 2942 skb->data + offset, 2943 size, DMA_TO_DEVICE); 2944 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma)) 2945 goto dma_error; 2946 tx_buffer_info->time_stamp = jiffies; 2947 tx_buffer_info->next_to_watch = i; 2948 2949 len -= size; 2950 total -= size; 2951 offset += size; 2952 count++; 2953 i++; 2954 if (i == tx_ring->count) 2955 i = 0; 2956 } 2957 2958 for (f = 0; f < nr_frags; f++) { 2959 struct skb_frag_struct *frag; 2960 2961 frag = &skb_shinfo(skb)->frags[f]; 2962 len = min((unsigned int)frag->size, total); 2963 offset = frag->page_offset; 2964 2965 while (len) { 2966 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2967 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD); 2968 2969 tx_buffer_info->length = size; 2970 tx_buffer_info->dma = dma_map_page(&adapter->pdev->dev, 2971 frag->page, 2972 offset, 2973 size, 2974 DMA_TO_DEVICE); 2975 tx_buffer_info->mapped_as_page = true; 2976 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma)) 2977 goto dma_error; 2978 tx_buffer_info->time_stamp = jiffies; 2979 tx_buffer_info->next_to_watch = i; 2980 2981 len -= size; 2982 total -= size; 2983 offset += size; 2984 count++; 2985 i++; 2986 if (i == tx_ring->count) 2987 i = 0; 2988 } 2989 if (total == 0) 2990 break; 2991 } 2992 2993 if (i == 0) 2994 i = tx_ring->count - 1; 2995 else 2996 i = i - 1; 2997 tx_ring->tx_buffer_info[i].skb = skb; 2998 tx_ring->tx_buffer_info[first].next_to_watch = i; 2999 3000 return count; 3001 3002dma_error: 3003 dev_err(&pdev->dev, "TX DMA map failed\n"); 3004 3005 /* clear timestamp and dma mappings for failed tx_buffer_info map */ 3006 tx_buffer_info->dma = 0; 3007 tx_buffer_info->time_stamp = 0; 3008 tx_buffer_info->next_to_watch = 0; 3009 count--; 3010 3011 /* clear timestamp and dma mappings for remaining portion of packet */ 3012 while (count >= 0) { 3013 count--; 3014 i--; 3015 if (i < 0) 3016 i += tx_ring->count; 3017 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 3018 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info); 3019 } 3020 3021 return count; 3022} 3023 3024static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter, 3025 struct ixgbevf_ring *tx_ring, int tx_flags, 3026 int count, u32 paylen, u8 hdr_len) 3027{ 3028 union ixgbe_adv_tx_desc *tx_desc = NULL; 3029 struct ixgbevf_tx_buffer *tx_buffer_info; 3030 u32 olinfo_status = 0, cmd_type_len = 0; 3031 unsigned int i; 3032 3033 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS; 3034 3035 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA; 3036 3037 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT; 3038 3039 if (tx_flags & IXGBE_TX_FLAGS_VLAN) 3040 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE; 3041 3042 if (tx_flags & IXGBE_TX_FLAGS_TSO) { 3043 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE; 3044 3045 olinfo_status |= IXGBE_TXD_POPTS_TXSM << 3046 IXGBE_ADVTXD_POPTS_SHIFT; 3047 3048 /* use index 1 context for tso */ 3049 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT); 3050 if (tx_flags & IXGBE_TX_FLAGS_IPV4) 3051 olinfo_status |= IXGBE_TXD_POPTS_IXSM << 3052 IXGBE_ADVTXD_POPTS_SHIFT; 3053 3054 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM) 3055 olinfo_status |= IXGBE_TXD_POPTS_TXSM << 3056 IXGBE_ADVTXD_POPTS_SHIFT; 3057 3058 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT); 3059 3060 i = tx_ring->next_to_use; 3061 while (count--) { 3062 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 3063 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i); 3064 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma); 3065 tx_desc->read.cmd_type_len = 3066 cpu_to_le32(cmd_type_len | tx_buffer_info->length); 3067 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status); 3068 i++; 3069 if (i == tx_ring->count) 3070 i = 0; 3071 } 3072 3073 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd); 3074 3075 /* 3076 * Force memory writes to complete before letting h/w 3077 * know there are new descriptors to fetch. (Only 3078 * applicable for weak-ordered memory model archs, 3079 * such as IA-64). 3080 */ 3081 wmb(); 3082 3083 tx_ring->next_to_use = i; 3084 writel(i, adapter->hw.hw_addr + tx_ring->tail); 3085} 3086 3087static int __ixgbevf_maybe_stop_tx(struct net_device *netdev, 3088 struct ixgbevf_ring *tx_ring, int size) 3089{ 3090 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3091 3092 netif_stop_subqueue(netdev, tx_ring->queue_index); 3093 /* Herbert's original patch had: 3094 * smp_mb__after_netif_stop_queue(); 3095 * but since that doesn't exist yet, just open code it. */ 3096 smp_mb(); 3097 3098 /* We need to check again in a case another CPU has just 3099 * made room available. */ 3100 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size)) 3101 return -EBUSY; 3102 3103 /* A reprieve! - use start_queue because it doesn't call schedule */ 3104 netif_start_subqueue(netdev, tx_ring->queue_index); 3105 ++adapter->restart_queue; 3106 return 0; 3107} 3108 3109static int ixgbevf_maybe_stop_tx(struct net_device *netdev, 3110 struct ixgbevf_ring *tx_ring, int size) 3111{ 3112 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size)) 3113 return 0; 3114 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size); 3115} 3116 3117static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 3118{ 3119 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3120 struct ixgbevf_ring *tx_ring; 3121 unsigned int first; 3122 unsigned int tx_flags = 0; 3123 u8 hdr_len = 0; 3124 int r_idx = 0, tso; 3125 int count = 0; 3126 3127 unsigned int f; 3128 3129 tx_ring = &adapter->tx_ring[r_idx]; 3130 3131 if (adapter->vlgrp && vlan_tx_tag_present(skb)) { 3132 tx_flags |= vlan_tx_tag_get(skb); 3133 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT; 3134 tx_flags |= IXGBE_TX_FLAGS_VLAN; 3135 } 3136 3137 /* four things can cause us to need a context descriptor */ 3138 if (skb_is_gso(skb) || 3139 (skb->ip_summed == CHECKSUM_PARTIAL) || 3140 (tx_flags & IXGBE_TX_FLAGS_VLAN)) 3141 count++; 3142 3143 count += TXD_USE_COUNT(skb_headlen(skb)); 3144 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) 3145 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size); 3146 3147 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) { 3148 adapter->tx_busy++; 3149 return NETDEV_TX_BUSY; 3150 } 3151 3152 first = tx_ring->next_to_use; 3153 3154 if (skb->protocol == htons(ETH_P_IP)) 3155 tx_flags |= IXGBE_TX_FLAGS_IPV4; 3156 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len); 3157 if (tso < 0) { 3158 dev_kfree_skb_any(skb); 3159 return NETDEV_TX_OK; 3160 } 3161 3162 if (tso) 3163 tx_flags |= IXGBE_TX_FLAGS_TSO; 3164 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) && 3165 (skb->ip_summed == CHECKSUM_PARTIAL)) 3166 tx_flags |= IXGBE_TX_FLAGS_CSUM; 3167 3168 ixgbevf_tx_queue(adapter, tx_ring, tx_flags, 3169 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first), 3170 skb->len, hdr_len); 3171 3172 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED); 3173 3174 return NETDEV_TX_OK; 3175} 3176 3177/** 3178 * ixgbevf_get_stats - Get System Network Statistics 3179 * @netdev: network interface device structure 3180 * 3181 * Returns the address of the device statistics structure. 3182 * The statistics are actually updated from the timer callback. 3183 **/ 3184static struct net_device_stats *ixgbevf_get_stats(struct net_device *netdev) 3185{ 3186 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3187 3188 /* only return the current stats */ 3189 return &adapter->net_stats; 3190} 3191 3192/** 3193 * ixgbevf_set_mac - Change the Ethernet Address of the NIC 3194 * @netdev: network interface device structure 3195 * @p: pointer to an address structure 3196 * 3197 * Returns 0 on success, negative on failure 3198 **/ 3199static int ixgbevf_set_mac(struct net_device *netdev, void *p) 3200{ 3201 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3202 struct ixgbe_hw *hw = &adapter->hw; 3203 struct sockaddr *addr = p; 3204 3205 if (!is_valid_ether_addr(addr->sa_data)) 3206 return -EADDRNOTAVAIL; 3207 3208 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 3209 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len); 3210 3211 if (hw->mac.ops.set_rar) 3212 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0); 3213 3214 return 0; 3215} 3216 3217/** 3218 * ixgbevf_change_mtu - Change the Maximum Transfer Unit 3219 * @netdev: network interface device structure 3220 * @new_mtu: new value for maximum frame size 3221 * 3222 * Returns 0 on success, negative on failure 3223 **/ 3224static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu) 3225{ 3226 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3227 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 3228 3229 /* MTU < 68 is an error and causes problems on some kernels */ 3230 if ((new_mtu < 68) || (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE)) 3231 return -EINVAL; 3232 3233 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n", 3234 netdev->mtu, new_mtu); 3235 /* must set new MTU before calling down or up */ 3236 netdev->mtu = new_mtu; 3237 3238 if (netif_running(netdev)) 3239 ixgbevf_reinit_locked(adapter); 3240 3241 return 0; 3242} 3243 3244static void ixgbevf_shutdown(struct pci_dev *pdev) 3245{ 3246 struct net_device *netdev = pci_get_drvdata(pdev); 3247 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3248 3249 netif_device_detach(netdev); 3250 3251 if (netif_running(netdev)) { 3252 ixgbevf_down(adapter); 3253 ixgbevf_free_irq(adapter); 3254 ixgbevf_free_all_tx_resources(adapter); 3255 ixgbevf_free_all_rx_resources(adapter); 3256 } 3257 3258#ifdef CONFIG_PM 3259 pci_save_state(pdev); 3260#endif 3261 3262 pci_disable_device(pdev); 3263} 3264 3265static const struct net_device_ops ixgbe_netdev_ops = { 3266 .ndo_open = &ixgbevf_open, 3267 .ndo_stop = &ixgbevf_close, 3268 .ndo_start_xmit = &ixgbevf_xmit_frame, 3269 .ndo_get_stats = &ixgbevf_get_stats, 3270 .ndo_set_rx_mode = &ixgbevf_set_rx_mode, 3271 .ndo_set_multicast_list = &ixgbevf_set_rx_mode, 3272 .ndo_validate_addr = eth_validate_addr, 3273 .ndo_set_mac_address = &ixgbevf_set_mac, 3274 .ndo_change_mtu = &ixgbevf_change_mtu, 3275 .ndo_tx_timeout = &ixgbevf_tx_timeout, 3276 .ndo_vlan_rx_register = &ixgbevf_vlan_rx_register, 3277 .ndo_vlan_rx_add_vid = &ixgbevf_vlan_rx_add_vid, 3278 .ndo_vlan_rx_kill_vid = &ixgbevf_vlan_rx_kill_vid, 3279}; 3280 3281static void ixgbevf_assign_netdev_ops(struct net_device *dev) 3282{ 3283 struct ixgbevf_adapter *adapter; 3284 adapter = netdev_priv(dev); 3285 dev->netdev_ops = &ixgbe_netdev_ops; 3286 ixgbevf_set_ethtool_ops(dev); 3287 dev->watchdog_timeo = 5 * HZ; 3288} 3289 3290/** 3291 * ixgbevf_probe - Device Initialization Routine 3292 * @pdev: PCI device information struct 3293 * @ent: entry in ixgbevf_pci_tbl 3294 * 3295 * Returns 0 on success, negative on failure 3296 * 3297 * ixgbevf_probe initializes an adapter identified by a pci_dev structure. 3298 * The OS initialization, configuring of the adapter private structure, 3299 * and a hardware reset occur. 3300 **/ 3301static int __devinit ixgbevf_probe(struct pci_dev *pdev, 3302 const struct pci_device_id *ent) 3303{ 3304 struct net_device *netdev; 3305 struct ixgbevf_adapter *adapter = NULL; 3306 struct ixgbe_hw *hw = NULL; 3307 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data]; 3308 static int cards_found; 3309 int err, pci_using_dac; 3310 3311 err = pci_enable_device(pdev); 3312 if (err) 3313 return err; 3314 3315 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) && 3316 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) { 3317 pci_using_dac = 1; 3318 } else { 3319 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 3320 if (err) { 3321 err = dma_set_coherent_mask(&pdev->dev, 3322 DMA_BIT_MASK(32)); 3323 if (err) { 3324 dev_err(&pdev->dev, "No usable DMA " 3325 "configuration, aborting\n"); 3326 goto err_dma; 3327 } 3328 } 3329 pci_using_dac = 0; 3330 } 3331 3332 err = pci_request_regions(pdev, ixgbevf_driver_name); 3333 if (err) { 3334 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err); 3335 goto err_pci_reg; 3336 } 3337 3338 pci_set_master(pdev); 3339 3340#ifdef HAVE_TX_MQ 3341 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter), 3342 MAX_TX_QUEUES); 3343#else 3344 netdev = alloc_etherdev(sizeof(struct ixgbevf_adapter)); 3345#endif 3346 if (!netdev) { 3347 err = -ENOMEM; 3348 goto err_alloc_etherdev; 3349 } 3350 3351 SET_NETDEV_DEV(netdev, &pdev->dev); 3352 3353 pci_set_drvdata(pdev, netdev); 3354 adapter = netdev_priv(netdev); 3355 3356 adapter->netdev = netdev; 3357 adapter->pdev = pdev; 3358 hw = &adapter->hw; 3359 hw->back = adapter; 3360 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1; 3361 3362 /* 3363 * call save state here in standalone driver because it relies on 3364 * adapter struct to exist, and needs to call netdev_priv 3365 */ 3366 pci_save_state(pdev); 3367 3368 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), 3369 pci_resource_len(pdev, 0)); 3370 if (!hw->hw_addr) { 3371 err = -EIO; 3372 goto err_ioremap; 3373 } 3374 3375 ixgbevf_assign_netdev_ops(netdev); 3376 3377 adapter->bd_number = cards_found; 3378 3379 /* Setup hw api */ 3380 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops)); 3381 hw->mac.type = ii->mac; 3382 3383 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops, 3384 sizeof(struct ixgbe_mac_operations)); 3385 3386 adapter->flags &= ~IXGBE_FLAG_RX_PS_CAPABLE; 3387 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED; 3388 adapter->flags |= IXGBE_FLAG_RX_1BUF_CAPABLE; 3389 3390 /* setup the private structure */ 3391 err = ixgbevf_sw_init(adapter); 3392 3393 netdev->features = NETIF_F_SG | 3394 NETIF_F_IP_CSUM | 3395 NETIF_F_HW_VLAN_TX | 3396 NETIF_F_HW_VLAN_RX | 3397 NETIF_F_HW_VLAN_FILTER; 3398 3399 netdev->features |= NETIF_F_IPV6_CSUM; 3400 netdev->features |= NETIF_F_TSO; 3401 netdev->features |= NETIF_F_TSO6; 3402 netdev->features |= NETIF_F_GRO; 3403 netdev->vlan_features |= NETIF_F_TSO; 3404 netdev->vlan_features |= NETIF_F_TSO6; 3405 netdev->vlan_features |= NETIF_F_IP_CSUM; 3406 netdev->vlan_features |= NETIF_F_IPV6_CSUM; 3407 netdev->vlan_features |= NETIF_F_SG; 3408 3409 if (pci_using_dac) 3410 netdev->features |= NETIF_F_HIGHDMA; 3411 3412 /* The HW MAC address was set and/or determined in sw_init */ 3413 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len); 3414 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len); 3415 3416 if (!is_valid_ether_addr(netdev->dev_addr)) { 3417 printk(KERN_ERR "invalid MAC address\n"); 3418 err = -EIO; 3419 goto err_sw_init; 3420 } 3421 3422 init_timer(&adapter->watchdog_timer); 3423 adapter->watchdog_timer.function = &ixgbevf_watchdog; 3424 adapter->watchdog_timer.data = (unsigned long)adapter; 3425 3426 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task); 3427 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task); 3428 3429 err = ixgbevf_init_interrupt_scheme(adapter); 3430 if (err) 3431 goto err_sw_init; 3432 3433 /* pick up the PCI bus settings for reporting later */ 3434 if (hw->mac.ops.get_bus_info) 3435 hw->mac.ops.get_bus_info(hw); 3436 3437 3438 netif_carrier_off(netdev); 3439 netif_tx_stop_all_queues(netdev); 3440 3441 strcpy(netdev->name, "eth%d"); 3442 3443 err = register_netdev(netdev); 3444 if (err) 3445 goto err_register; 3446 3447 adapter->netdev_registered = true; 3448 3449 ixgbevf_init_last_counter_stats(adapter); 3450 3451 /* print the MAC address */ 3452 hw_dbg(hw, "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n", 3453 netdev->dev_addr[0], 3454 netdev->dev_addr[1], 3455 netdev->dev_addr[2], 3456 netdev->dev_addr[3], 3457 netdev->dev_addr[4], 3458 netdev->dev_addr[5]); 3459 3460 hw_dbg(hw, "MAC: %d\n", hw->mac.type); 3461 3462 hw_dbg(hw, "LRO is disabled\n"); 3463 3464 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n"); 3465 cards_found++; 3466 return 0; 3467 3468err_register: 3469err_sw_init: 3470 ixgbevf_reset_interrupt_capability(adapter); 3471 iounmap(hw->hw_addr); 3472err_ioremap: 3473 free_netdev(netdev); 3474err_alloc_etherdev: 3475 pci_release_regions(pdev); 3476err_pci_reg: 3477err_dma: 3478 pci_disable_device(pdev); 3479 return err; 3480} 3481 3482/** 3483 * ixgbevf_remove - Device Removal Routine 3484 * @pdev: PCI device information struct 3485 * 3486 * ixgbevf_remove is called by the PCI subsystem to alert the driver 3487 * that it should release a PCI device. The could be caused by a 3488 * Hot-Plug event, or because the driver is going to be removed from 3489 * memory. 3490 **/ 3491static void __devexit ixgbevf_remove(struct pci_dev *pdev) 3492{ 3493 struct net_device *netdev = pci_get_drvdata(pdev); 3494 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3495 3496 set_bit(__IXGBEVF_DOWN, &adapter->state); 3497 3498 del_timer_sync(&adapter->watchdog_timer); 3499 3500 cancel_work_sync(&adapter->watchdog_task); 3501 3502 flush_scheduled_work(); 3503 3504 if (adapter->netdev_registered) { 3505 unregister_netdev(netdev); 3506 adapter->netdev_registered = false; 3507 } 3508 3509 ixgbevf_reset_interrupt_capability(adapter); 3510 3511 iounmap(adapter->hw.hw_addr); 3512 pci_release_regions(pdev); 3513 3514 hw_dbg(&adapter->hw, "Remove complete\n"); 3515 3516 kfree(adapter->tx_ring); 3517 kfree(adapter->rx_ring); 3518 3519 free_netdev(netdev); 3520 3521 pci_disable_device(pdev); 3522} 3523 3524static struct pci_driver ixgbevf_driver = { 3525 .name = ixgbevf_driver_name, 3526 .id_table = ixgbevf_pci_tbl, 3527 .probe = ixgbevf_probe, 3528 .remove = __devexit_p(ixgbevf_remove), 3529 .shutdown = ixgbevf_shutdown, 3530}; 3531 3532/** 3533 * ixgbe_init_module - Driver Registration Routine 3534 * 3535 * ixgbe_init_module is the first routine called when the driver is 3536 * loaded. All it does is register with the PCI subsystem. 3537 **/ 3538static int __init ixgbevf_init_module(void) 3539{ 3540 int ret; 3541 printk(KERN_INFO "ixgbevf: %s - version %s\n", ixgbevf_driver_string, 3542 ixgbevf_driver_version); 3543 3544 printk(KERN_INFO "%s\n", ixgbevf_copyright); 3545 3546 ret = pci_register_driver(&ixgbevf_driver); 3547 return ret; 3548} 3549 3550module_init(ixgbevf_init_module); 3551 3552/** 3553 * ixgbe_exit_module - Driver Exit Cleanup Routine 3554 * 3555 * ixgbe_exit_module is called just before the driver is removed 3556 * from memory. 3557 **/ 3558static void __exit ixgbevf_exit_module(void) 3559{ 3560 pci_unregister_driver(&ixgbevf_driver); 3561} 3562 3563#ifdef DEBUG 3564/** 3565 * ixgbe_get_hw_dev_name - return device name string 3566 * used by hardware layer to print debugging information 3567 **/ 3568char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw) 3569{ 3570 struct ixgbevf_adapter *adapter = hw->back; 3571 return adapter->netdev->name; 3572} 3573 3574#endif 3575module_exit(ixgbevf_exit_module); 3576 3577/* ixgbevf_main.c */ 3578