1/*****************************************************************************/ 2 3/* 4 * baycom_epp.c -- baycom epp radio modem driver. 5 * 6 * Copyright (C) 1998-2000 7 * Thomas Sailer (sailer@ife.ee.ethz.ch) 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 23 * Please note that the GPL allows you to use the driver, NOT the radio. 24 * In order to use the radio, you need a license from the communications 25 * authority of your country. 26 * 27 * 28 * History: 29 * 0.1 xx.xx.1998 Initial version by Matthias Welwarsky (dg2fef) 30 * 0.2 21.04.1998 Massive rework by Thomas Sailer 31 * Integrated FPGA EPP modem configuration routines 32 * 0.3 11.05.1998 Took FPGA config out and moved it into a separate program 33 * 0.4 26.07.1999 Adapted to new lowlevel parport driver interface 34 * 0.5 03.08.1999 adapt to Linus' new __setup/__initcall 35 * removed some pre-2.2 kernel compatibility cruft 36 * 0.6 10.08.1999 Check if parport can do SPP and is safe to access during interrupt contexts 37 * 0.7 12.02.2000 adapted to softnet driver interface 38 * 39 */ 40 41/*****************************************************************************/ 42 43#include <linux/crc-ccitt.h> 44#include <linux/module.h> 45#include <linux/kernel.h> 46#include <linux/init.h> 47#include <linux/sched.h> 48#include <linux/string.h> 49#include <linux/workqueue.h> 50#include <linux/fs.h> 51#include <linux/parport.h> 52#include <linux/if_arp.h> 53#include <linux/hdlcdrv.h> 54#include <linux/baycom.h> 55#include <linux/jiffies.h> 56#include <linux/random.h> 57#include <net/ax25.h> 58#include <asm/uaccess.h> 59 60/* --------------------------------------------------------------------- */ 61 62#define BAYCOM_DEBUG 63#define BAYCOM_MAGIC 19730510 64 65/* --------------------------------------------------------------------- */ 66 67static const char paranoia_str[] = KERN_ERR 68 "baycom_epp: bad magic number for hdlcdrv_state struct in routine %s\n"; 69 70static const char bc_drvname[] = "baycom_epp"; 71static const char bc_drvinfo[] = KERN_INFO "baycom_epp: (C) 1998-2000 Thomas Sailer, HB9JNX/AE4WA\n" 72"baycom_epp: version 0.7 compiled " __TIME__ " " __DATE__ "\n"; 73 74/* --------------------------------------------------------------------- */ 75 76#define NR_PORTS 4 77 78static struct net_device *baycom_device[NR_PORTS]; 79 80/* --------------------------------------------------------------------- */ 81 82/* EPP status register */ 83#define EPP_DCDBIT 0x80 84#define EPP_PTTBIT 0x08 85#define EPP_NREF 0x01 86#define EPP_NRAEF 0x02 87#define EPP_NRHF 0x04 88#define EPP_NTHF 0x20 89#define EPP_NTAEF 0x10 90#define EPP_NTEF EPP_PTTBIT 91 92/* EPP control register */ 93#define EPP_TX_FIFO_ENABLE 0x10 94#define EPP_RX_FIFO_ENABLE 0x08 95#define EPP_MODEM_ENABLE 0x20 96#define EPP_LEDS 0xC0 97#define EPP_IRQ_ENABLE 0x10 98 99/* LPT registers */ 100#define LPTREG_ECONTROL 0x402 101#define LPTREG_CONFIGB 0x401 102#define LPTREG_CONFIGA 0x400 103#define LPTREG_EPPDATA 0x004 104#define LPTREG_EPPADDR 0x003 105#define LPTREG_CONTROL 0x002 106#define LPTREG_STATUS 0x001 107#define LPTREG_DATA 0x000 108 109/* LPT control register */ 110#define LPTCTRL_PROGRAM 0x04 /* 0 to reprogram */ 111#define LPTCTRL_WRITE 0x01 112#define LPTCTRL_ADDRSTB 0x08 113#define LPTCTRL_DATASTB 0x02 114#define LPTCTRL_INTEN 0x10 115 116/* LPT status register */ 117#define LPTSTAT_SHIFT_NINTR 6 118#define LPTSTAT_WAIT 0x80 119#define LPTSTAT_NINTR (1<<LPTSTAT_SHIFT_NINTR) 120#define LPTSTAT_PE 0x20 121#define LPTSTAT_DONE 0x10 122#define LPTSTAT_NERROR 0x08 123#define LPTSTAT_EPPTIMEOUT 0x01 124 125/* LPT data register */ 126#define LPTDATA_SHIFT_TDI 0 127#define LPTDATA_SHIFT_TMS 2 128#define LPTDATA_TDI (1<<LPTDATA_SHIFT_TDI) 129#define LPTDATA_TCK 0x02 130#define LPTDATA_TMS (1<<LPTDATA_SHIFT_TMS) 131#define LPTDATA_INITBIAS 0x80 132 133 134/* EPP modem config/status bits */ 135#define EPP_DCDBIT 0x80 136#define EPP_PTTBIT 0x08 137#define EPP_RXEBIT 0x01 138#define EPP_RXAEBIT 0x02 139#define EPP_RXHFULL 0x04 140 141#define EPP_NTHF 0x20 142#define EPP_NTAEF 0x10 143#define EPP_NTEF EPP_PTTBIT 144 145#define EPP_TX_FIFO_ENABLE 0x10 146#define EPP_RX_FIFO_ENABLE 0x08 147#define EPP_MODEM_ENABLE 0x20 148#define EPP_LEDS 0xC0 149#define EPP_IRQ_ENABLE 0x10 150 151/* Xilinx 4k JTAG instructions */ 152#define XC4K_IRLENGTH 3 153#define XC4K_EXTEST 0 154#define XC4K_PRELOAD 1 155#define XC4K_CONFIGURE 5 156#define XC4K_BYPASS 7 157 158#define EPP_CONVENTIONAL 0 159#define EPP_FPGA 1 160#define EPP_FPGAEXTSTATUS 2 161 162#define TXBUFFER_SIZE ((HDLCDRV_MAXFLEN*6/5)+8) 163 164/* ---------------------------------------------------------------------- */ 165/* 166 * Information that need to be kept for each board. 167 */ 168 169struct baycom_state { 170 int magic; 171 172 struct pardevice *pdev; 173 struct net_device *dev; 174 unsigned int work_running; 175 struct delayed_work run_work; 176 unsigned int modem; 177 unsigned int bitrate; 178 unsigned char stat; 179 180 struct { 181 unsigned int intclk; 182 unsigned int fclk; 183 unsigned int bps; 184 unsigned int extmodem; 185 unsigned int loopback; 186 } cfg; 187 188 struct hdlcdrv_channel_params ch_params; 189 190 struct { 191 unsigned int bitbuf, bitstream, numbits, state; 192 unsigned char *bufptr; 193 int bufcnt; 194 unsigned char buf[TXBUFFER_SIZE]; 195 } hdlcrx; 196 197 struct { 198 int calibrate; 199 int slotcnt; 200 int flags; 201 enum { tx_idle = 0, tx_keyup, tx_data, tx_tail } state; 202 unsigned char *bufptr; 203 int bufcnt; 204 unsigned char buf[TXBUFFER_SIZE]; 205 } hdlctx; 206 207 unsigned int ptt_keyed; 208 struct sk_buff *skb; /* next transmit packet */ 209 210#ifdef BAYCOM_DEBUG 211 struct debug_vals { 212 unsigned long last_jiffies; 213 unsigned cur_intcnt; 214 unsigned last_intcnt; 215 int cur_pllcorr; 216 int last_pllcorr; 217 unsigned int mod_cycles; 218 unsigned int demod_cycles; 219 } debug_vals; 220#endif /* BAYCOM_DEBUG */ 221}; 222 223/* --------------------------------------------------------------------- */ 224 225#define KISS_VERBOSE 226 227/* --------------------------------------------------------------------- */ 228 229#define PARAM_TXDELAY 1 230#define PARAM_PERSIST 2 231#define PARAM_SLOTTIME 3 232#define PARAM_TXTAIL 4 233#define PARAM_FULLDUP 5 234#define PARAM_HARDWARE 6 235#define PARAM_RETURN 255 236 237/* --------------------------------------------------------------------- */ 238/* 239 * the CRC routines are stolen from WAMPES 240 * by Dieter Deyke 241 */ 242 243 244/*---------------------------------------------------------------------------*/ 245 246 247/*---------------------------------------------------------------------------*/ 248 249static inline int check_crc_ccitt(const unsigned char *buf, int cnt) 250{ 251 return (crc_ccitt(0xffff, buf, cnt) & 0xffff) == 0xf0b8; 252} 253 254/*---------------------------------------------------------------------------*/ 255 256static inline int calc_crc_ccitt(const unsigned char *buf, int cnt) 257{ 258 return (crc_ccitt(0xffff, buf, cnt) ^ 0xffff) & 0xffff; 259} 260 261/* ---------------------------------------------------------------------- */ 262 263#define tenms_to_flags(bc,tenms) ((tenms * bc->bitrate) / 800) 264 265/* --------------------------------------------------------------------- */ 266 267static inline void baycom_int_freq(struct baycom_state *bc) 268{ 269#ifdef BAYCOM_DEBUG 270 unsigned long cur_jiffies = jiffies; 271 /* 272 * measure the interrupt frequency 273 */ 274 bc->debug_vals.cur_intcnt++; 275 if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) { 276 bc->debug_vals.last_jiffies = cur_jiffies; 277 bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt; 278 bc->debug_vals.cur_intcnt = 0; 279 bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr; 280 bc->debug_vals.cur_pllcorr = 0; 281 } 282#endif /* BAYCOM_DEBUG */ 283} 284 285/* ---------------------------------------------------------------------- */ 286/* 287 * eppconfig_path should be setable via /proc/sys. 288 */ 289 290static char eppconfig_path[256] = "/usr/sbin/eppfpga"; 291 292static char *envp[] = { "HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL }; 293 294/* eppconfig: called during ifconfig up to configure the modem */ 295static int eppconfig(struct baycom_state *bc) 296{ 297 char modearg[256]; 298 char portarg[16]; 299 char *argv[] = { eppconfig_path, "-s", "-p", portarg, "-m", modearg, 300 NULL }; 301 302 /* set up arguments */ 303 sprintf(modearg, "%sclk,%smodem,fclk=%d,bps=%d,divider=%d%s,extstat", 304 bc->cfg.intclk ? "int" : "ext", 305 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps, 306 (bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps), 307 bc->cfg.loopback ? ",loopback" : ""); 308 sprintf(portarg, "%ld", bc->pdev->port->base); 309 printk(KERN_DEBUG "%s: %s -s -p %s -m %s\n", bc_drvname, eppconfig_path, portarg, modearg); 310 311 return call_usermodehelper(eppconfig_path, argv, envp, UMH_WAIT_PROC); 312} 313 314/* ---------------------------------------------------------------------- */ 315 316static inline void do_kiss_params(struct baycom_state *bc, 317 unsigned char *data, unsigned long len) 318{ 319 320#ifdef KISS_VERBOSE 321#define PKP(a,b) printk(KERN_INFO "baycomm_epp: channel params: " a "\n", b) 322#else /* KISS_VERBOSE */ 323#define PKP(a,b) 324#endif /* KISS_VERBOSE */ 325 326 if (len < 2) 327 return; 328 switch(data[0]) { 329 case PARAM_TXDELAY: 330 bc->ch_params.tx_delay = data[1]; 331 PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay); 332 break; 333 case PARAM_PERSIST: 334 bc->ch_params.ppersist = data[1]; 335 PKP("p persistence = %u", bc->ch_params.ppersist); 336 break; 337 case PARAM_SLOTTIME: 338 bc->ch_params.slottime = data[1]; 339 PKP("slot time = %ums", bc->ch_params.slottime); 340 break; 341 case PARAM_TXTAIL: 342 bc->ch_params.tx_tail = data[1]; 343 PKP("TX tail = %ums", bc->ch_params.tx_tail); 344 break; 345 case PARAM_FULLDUP: 346 bc->ch_params.fulldup = !!data[1]; 347 PKP("%s duplex", bc->ch_params.fulldup ? "full" : "half"); 348 break; 349 default: 350 break; 351 } 352#undef PKP 353} 354 355/* --------------------------------------------------------------------- */ 356 357static void encode_hdlc(struct baycom_state *bc) 358{ 359 struct sk_buff *skb; 360 unsigned char *wp, *bp; 361 int pkt_len; 362 unsigned bitstream, notbitstream, bitbuf, numbit, crc; 363 unsigned char crcarr[2]; 364 int j; 365 366 if (bc->hdlctx.bufcnt > 0) 367 return; 368 skb = bc->skb; 369 if (!skb) 370 return; 371 bc->skb = NULL; 372 pkt_len = skb->len-1; /* strip KISS byte */ 373 wp = bc->hdlctx.buf; 374 bp = skb->data+1; 375 crc = calc_crc_ccitt(bp, pkt_len); 376 crcarr[0] = crc; 377 crcarr[1] = crc >> 8; 378 *wp++ = 0x7e; 379 bitstream = bitbuf = numbit = 0; 380 while (pkt_len > -2) { 381 bitstream >>= 8; 382 bitstream |= ((unsigned int)*bp) << 8; 383 bitbuf |= ((unsigned int)*bp) << numbit; 384 notbitstream = ~bitstream; 385 bp++; 386 pkt_len--; 387 if (!pkt_len) 388 bp = crcarr; 389 for (j = 0; j < 8; j++) 390 if (unlikely(!(notbitstream & (0x1f0 << j)))) { 391 bitstream &= ~(0x100 << j); 392 bitbuf = (bitbuf & (((2 << j) << numbit) - 1)) | 393 ((bitbuf & ~(((2 << j) << numbit) - 1)) << 1); 394 numbit++; 395 notbitstream = ~bitstream; 396 } 397 numbit += 8; 398 while (numbit >= 8) { 399 *wp++ = bitbuf; 400 bitbuf >>= 8; 401 numbit -= 8; 402 } 403 } 404 bitbuf |= 0x7e7e << numbit; 405 numbit += 16; 406 while (numbit >= 8) { 407 *wp++ = bitbuf; 408 bitbuf >>= 8; 409 numbit -= 8; 410 } 411 bc->hdlctx.bufptr = bc->hdlctx.buf; 412 bc->hdlctx.bufcnt = wp - bc->hdlctx.buf; 413 dev_kfree_skb(skb); 414 bc->dev->stats.tx_packets++; 415} 416 417/* ---------------------------------------------------------------------- */ 418 419static int transmit(struct baycom_state *bc, int cnt, unsigned char stat) 420{ 421 struct parport *pp = bc->pdev->port; 422 unsigned char tmp[128]; 423 int i, j; 424 425 if (bc->hdlctx.state == tx_tail && !(stat & EPP_PTTBIT)) 426 bc->hdlctx.state = tx_idle; 427 if (bc->hdlctx.state == tx_idle && bc->hdlctx.calibrate <= 0) { 428 if (bc->hdlctx.bufcnt <= 0) 429 encode_hdlc(bc); 430 if (bc->hdlctx.bufcnt <= 0) 431 return 0; 432 if (!bc->ch_params.fulldup) { 433 if (!(stat & EPP_DCDBIT)) { 434 bc->hdlctx.slotcnt = bc->ch_params.slottime; 435 return 0; 436 } 437 if ((--bc->hdlctx.slotcnt) > 0) 438 return 0; 439 bc->hdlctx.slotcnt = bc->ch_params.slottime; 440 if ((random32() % 256) > bc->ch_params.ppersist) 441 return 0; 442 } 443 } 444 if (bc->hdlctx.state == tx_idle && bc->hdlctx.bufcnt > 0) { 445 bc->hdlctx.state = tx_keyup; 446 bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay); 447 bc->ptt_keyed++; 448 } 449 while (cnt > 0) { 450 switch (bc->hdlctx.state) { 451 case tx_keyup: 452 i = min_t(int, cnt, bc->hdlctx.flags); 453 cnt -= i; 454 bc->hdlctx.flags -= i; 455 if (bc->hdlctx.flags <= 0) 456 bc->hdlctx.state = tx_data; 457 memset(tmp, 0x7e, sizeof(tmp)); 458 while (i > 0) { 459 j = (i > sizeof(tmp)) ? sizeof(tmp) : i; 460 if (j != pp->ops->epp_write_data(pp, tmp, j, 0)) 461 return -1; 462 i -= j; 463 } 464 break; 465 466 case tx_data: 467 if (bc->hdlctx.bufcnt <= 0) { 468 encode_hdlc(bc); 469 if (bc->hdlctx.bufcnt <= 0) { 470 bc->hdlctx.state = tx_tail; 471 bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_tail); 472 break; 473 } 474 } 475 i = min_t(int, cnt, bc->hdlctx.bufcnt); 476 bc->hdlctx.bufcnt -= i; 477 cnt -= i; 478 if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0)) 479 return -1; 480 bc->hdlctx.bufptr += i; 481 break; 482 483 case tx_tail: 484 encode_hdlc(bc); 485 if (bc->hdlctx.bufcnt > 0) { 486 bc->hdlctx.state = tx_data; 487 break; 488 } 489 i = min_t(int, cnt, bc->hdlctx.flags); 490 if (i) { 491 cnt -= i; 492 bc->hdlctx.flags -= i; 493 memset(tmp, 0x7e, sizeof(tmp)); 494 while (i > 0) { 495 j = (i > sizeof(tmp)) ? sizeof(tmp) : i; 496 if (j != pp->ops->epp_write_data(pp, tmp, j, 0)) 497 return -1; 498 i -= j; 499 } 500 break; 501 } 502 503 default: /* fall through */ 504 if (bc->hdlctx.calibrate <= 0) 505 return 0; 506 i = min_t(int, cnt, bc->hdlctx.calibrate); 507 cnt -= i; 508 bc->hdlctx.calibrate -= i; 509 memset(tmp, 0, sizeof(tmp)); 510 while (i > 0) { 511 j = (i > sizeof(tmp)) ? sizeof(tmp) : i; 512 if (j != pp->ops->epp_write_data(pp, tmp, j, 0)) 513 return -1; 514 i -= j; 515 } 516 break; 517 } 518 } 519 return 0; 520} 521 522/* ---------------------------------------------------------------------- */ 523 524static void do_rxpacket(struct net_device *dev) 525{ 526 struct baycom_state *bc = netdev_priv(dev); 527 struct sk_buff *skb; 528 unsigned char *cp; 529 unsigned pktlen; 530 531 if (bc->hdlcrx.bufcnt < 4) 532 return; 533 if (!check_crc_ccitt(bc->hdlcrx.buf, bc->hdlcrx.bufcnt)) 534 return; 535 pktlen = bc->hdlcrx.bufcnt-2+1; /* KISS kludge */ 536 if (!(skb = dev_alloc_skb(pktlen))) { 537 printk("%s: memory squeeze, dropping packet\n", dev->name); 538 dev->stats.rx_dropped++; 539 return; 540 } 541 cp = skb_put(skb, pktlen); 542 *cp++ = 0; /* KISS kludge */ 543 memcpy(cp, bc->hdlcrx.buf, pktlen - 1); 544 skb->protocol = ax25_type_trans(skb, dev); 545 netif_rx(skb); 546 dev->stats.rx_packets++; 547} 548 549static int receive(struct net_device *dev, int cnt) 550{ 551 struct baycom_state *bc = netdev_priv(dev); 552 struct parport *pp = bc->pdev->port; 553 unsigned int bitbuf, notbitstream, bitstream, numbits, state; 554 unsigned char tmp[128]; 555 unsigned char *cp; 556 int cnt2, ret = 0; 557 int j; 558 559 numbits = bc->hdlcrx.numbits; 560 state = bc->hdlcrx.state; 561 bitstream = bc->hdlcrx.bitstream; 562 bitbuf = bc->hdlcrx.bitbuf; 563 while (cnt > 0) { 564 cnt2 = (cnt > sizeof(tmp)) ? sizeof(tmp) : cnt; 565 cnt -= cnt2; 566 if (cnt2 != pp->ops->epp_read_data(pp, tmp, cnt2, 0)) { 567 ret = -1; 568 break; 569 } 570 cp = tmp; 571 for (; cnt2 > 0; cnt2--, cp++) { 572 bitstream >>= 8; 573 bitstream |= (*cp) << 8; 574 bitbuf >>= 8; 575 bitbuf |= (*cp) << 8; 576 numbits += 8; 577 notbitstream = ~bitstream; 578 for (j = 0; j < 8; j++) { 579 580 /* flag or abort */ 581 if (unlikely(!(notbitstream & (0x0fc << j)))) { 582 583 /* abort received */ 584 if (!(notbitstream & (0x1fc << j))) 585 state = 0; 586 587 /* flag received */ 588 else if ((bitstream & (0x1fe << j)) == (0x0fc << j)) { 589 if (state) 590 do_rxpacket(dev); 591 bc->hdlcrx.bufcnt = 0; 592 bc->hdlcrx.bufptr = bc->hdlcrx.buf; 593 state = 1; 594 numbits = 7-j; 595 } 596 } 597 598 /* stuffed bit */ 599 else if (unlikely((bitstream & (0x1f8 << j)) == (0xf8 << j))) { 600 numbits--; 601 bitbuf = (bitbuf & ((~0xff) << j)) | ((bitbuf & ~((~0xff) << j)) << 1); 602 } 603 } 604 while (state && numbits >= 8) { 605 if (bc->hdlcrx.bufcnt >= TXBUFFER_SIZE) { 606 state = 0; 607 } else { 608 *(bc->hdlcrx.bufptr)++ = bitbuf >> (16-numbits); 609 bc->hdlcrx.bufcnt++; 610 numbits -= 8; 611 } 612 } 613 } 614 } 615 bc->hdlcrx.numbits = numbits; 616 bc->hdlcrx.state = state; 617 bc->hdlcrx.bitstream = bitstream; 618 bc->hdlcrx.bitbuf = bitbuf; 619 return ret; 620} 621 622/* --------------------------------------------------------------------- */ 623 624#ifdef __i386__ 625#include <asm/msr.h> 626#define GETTICK(x) \ 627({ \ 628 if (cpu_has_tsc) \ 629 rdtscl(x); \ 630}) 631#else /* __i386__ */ 632#define GETTICK(x) 633#endif /* __i386__ */ 634 635static void epp_bh(struct work_struct *work) 636{ 637 struct net_device *dev; 638 struct baycom_state *bc; 639 struct parport *pp; 640 unsigned char stat; 641 unsigned char tmp[2]; 642 unsigned int time1 = 0, time2 = 0, time3 = 0; 643 int cnt, cnt2; 644 645 bc = container_of(work, struct baycom_state, run_work.work); 646 dev = bc->dev; 647 if (!bc->work_running) 648 return; 649 baycom_int_freq(bc); 650 pp = bc->pdev->port; 651 /* update status */ 652 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 653 goto epptimeout; 654 bc->stat = stat; 655 bc->debug_vals.last_pllcorr = stat; 656 GETTICK(time1); 657 if (bc->modem == EPP_FPGAEXTSTATUS) { 658 /* get input count */ 659 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|1; 660 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1) 661 goto epptimeout; 662 if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2) 663 goto epptimeout; 664 cnt = tmp[0] | (tmp[1] << 8); 665 cnt &= 0x7fff; 666 /* get output count */ 667 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|2; 668 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1) 669 goto epptimeout; 670 if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2) 671 goto epptimeout; 672 cnt2 = tmp[0] | (tmp[1] << 8); 673 cnt2 = 16384 - (cnt2 & 0x7fff); 674 /* return to normal */ 675 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE; 676 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1) 677 goto epptimeout; 678 if (transmit(bc, cnt2, stat)) 679 goto epptimeout; 680 GETTICK(time2); 681 if (receive(dev, cnt)) 682 goto epptimeout; 683 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 684 goto epptimeout; 685 bc->stat = stat; 686 } else { 687 /* try to tx */ 688 switch (stat & (EPP_NTAEF|EPP_NTHF)) { 689 case EPP_NTHF: 690 cnt = 2048 - 256; 691 break; 692 693 case EPP_NTAEF: 694 cnt = 2048 - 1793; 695 break; 696 697 case 0: 698 cnt = 0; 699 break; 700 701 default: 702 cnt = 2048 - 1025; 703 break; 704 } 705 if (transmit(bc, cnt, stat)) 706 goto epptimeout; 707 GETTICK(time2); 708 /* do receiver */ 709 while ((stat & (EPP_NRAEF|EPP_NRHF)) != EPP_NRHF) { 710 switch (stat & (EPP_NRAEF|EPP_NRHF)) { 711 case EPP_NRAEF: 712 cnt = 1025; 713 break; 714 715 case 0: 716 cnt = 1793; 717 break; 718 719 default: 720 cnt = 256; 721 break; 722 } 723 if (receive(dev, cnt)) 724 goto epptimeout; 725 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 726 goto epptimeout; 727 } 728 cnt = 0; 729 if (bc->bitrate < 50000) 730 cnt = 256; 731 else if (bc->bitrate < 100000) 732 cnt = 128; 733 while (cnt > 0 && stat & EPP_NREF) { 734 if (receive(dev, 1)) 735 goto epptimeout; 736 cnt--; 737 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 738 goto epptimeout; 739 } 740 } 741 GETTICK(time3); 742#ifdef BAYCOM_DEBUG 743 bc->debug_vals.mod_cycles = time2 - time1; 744 bc->debug_vals.demod_cycles = time3 - time2; 745#endif /* BAYCOM_DEBUG */ 746 schedule_delayed_work(&bc->run_work, 1); 747 if (!bc->skb) 748 netif_wake_queue(dev); 749 return; 750 epptimeout: 751 printk(KERN_ERR "%s: EPP timeout!\n", bc_drvname); 752} 753 754/* ---------------------------------------------------------------------- */ 755/* 756 * ===================== network driver interface ========================= 757 */ 758 759static int baycom_send_packet(struct sk_buff *skb, struct net_device *dev) 760{ 761 struct baycom_state *bc = netdev_priv(dev); 762 763 if (skb->data[0] != 0) { 764 do_kiss_params(bc, skb->data, skb->len); 765 dev_kfree_skb(skb); 766 return NETDEV_TX_OK; 767 } 768 if (bc->skb) 769 return NETDEV_TX_LOCKED; 770 /* strip KISS byte */ 771 if (skb->len >= HDLCDRV_MAXFLEN+1 || skb->len < 3) { 772 dev_kfree_skb(skb); 773 return NETDEV_TX_OK; 774 } 775 netif_stop_queue(dev); 776 bc->skb = skb; 777 return NETDEV_TX_OK; 778} 779 780/* --------------------------------------------------------------------- */ 781 782static int baycom_set_mac_address(struct net_device *dev, void *addr) 783{ 784 struct sockaddr *sa = (struct sockaddr *)addr; 785 786 /* addr is an AX.25 shifted ASCII mac address */ 787 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len); 788 return 0; 789} 790 791/* --------------------------------------------------------------------- */ 792 793static void epp_wakeup(void *handle) 794{ 795 struct net_device *dev = (struct net_device *)handle; 796 struct baycom_state *bc = netdev_priv(dev); 797 798 printk(KERN_DEBUG "baycom_epp: %s: why am I being woken up?\n", dev->name); 799 if (!parport_claim(bc->pdev)) 800 printk(KERN_DEBUG "baycom_epp: %s: I'm broken.\n", dev->name); 801} 802 803/* --------------------------------------------------------------------- */ 804 805/* 806 * Open/initialize the board. This is called (in the current kernel) 807 * sometime after booting when the 'ifconfig' program is run. 808 * 809 * This routine should set everything up anew at each open, even 810 * registers that "should" only need to be set once at boot, so that 811 * there is non-reboot way to recover if something goes wrong. 812 */ 813 814static int epp_open(struct net_device *dev) 815{ 816 struct baycom_state *bc = netdev_priv(dev); 817 struct parport *pp = parport_find_base(dev->base_addr); 818 unsigned int i, j; 819 unsigned char tmp[128]; 820 unsigned char stat; 821 unsigned long tstart; 822 823 if (!pp) { 824 printk(KERN_ERR "%s: parport at 0x%lx unknown\n", bc_drvname, dev->base_addr); 825 return -ENXIO; 826 } 827 if ((~pp->modes) & (PARPORT_MODE_TRISTATE | PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT)) { 828 printk(KERN_ERR "%s: parport at 0x%lx cannot be used\n", 829 bc_drvname, pp->base); 830 parport_put_port(pp); 831 return -EIO; 832 } 833 memset(&bc->modem, 0, sizeof(bc->modem)); 834 bc->pdev = parport_register_device(pp, dev->name, NULL, epp_wakeup, 835 NULL, PARPORT_DEV_EXCL, dev); 836 parport_put_port(pp); 837 if (!bc->pdev) { 838 printk(KERN_ERR "%s: cannot register parport at 0x%lx\n", bc_drvname, pp->base); 839 return -ENXIO; 840 } 841 if (parport_claim(bc->pdev)) { 842 printk(KERN_ERR "%s: parport at 0x%lx busy\n", bc_drvname, pp->base); 843 parport_unregister_device(bc->pdev); 844 return -EBUSY; 845 } 846 dev->irq = /*pp->irq*/ 0; 847 INIT_DELAYED_WORK(&bc->run_work, epp_bh); 848 bc->work_running = 1; 849 bc->modem = EPP_CONVENTIONAL; 850 if (eppconfig(bc)) 851 printk(KERN_INFO "%s: no FPGA detected, assuming conventional EPP modem\n", bc_drvname); 852 else 853 bc->modem = /*EPP_FPGA*/ EPP_FPGAEXTSTATUS; 854 parport_write_control(pp, LPTCTRL_PROGRAM); /* prepare EPP mode; we aren't using interrupts */ 855 /* reset the modem */ 856 tmp[0] = 0; 857 tmp[1] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE; 858 if (pp->ops->epp_write_addr(pp, tmp, 2, 0) != 2) 859 goto epptimeout; 860 /* autoprobe baud rate */ 861 tstart = jiffies; 862 i = 0; 863 while (time_before(jiffies, tstart + HZ/3)) { 864 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 865 goto epptimeout; 866 if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) { 867 schedule(); 868 continue; 869 } 870 if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128) 871 goto epptimeout; 872 if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128) 873 goto epptimeout; 874 i += 256; 875 } 876 for (j = 0; j < 256; j++) { 877 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 878 goto epptimeout; 879 if (!(stat & EPP_NREF)) 880 break; 881 if (pp->ops->epp_read_data(pp, tmp, 1, 0) != 1) 882 goto epptimeout; 883 i++; 884 } 885 tstart = jiffies - tstart; 886 bc->bitrate = i * (8 * HZ) / tstart; 887 j = 1; 888 i = bc->bitrate >> 3; 889 while (j < 7 && i > 150) { 890 j++; 891 i >>= 1; 892 } 893 printk(KERN_INFO "%s: autoprobed bitrate: %d int divider: %d int rate: %d\n", 894 bc_drvname, bc->bitrate, j, bc->bitrate >> (j+2)); 895 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE/*|j*/; 896 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1) 897 goto epptimeout; 898 /* 899 * initialise hdlc variables 900 */ 901 bc->hdlcrx.state = 0; 902 bc->hdlcrx.numbits = 0; 903 bc->hdlctx.state = tx_idle; 904 bc->hdlctx.bufcnt = 0; 905 bc->hdlctx.slotcnt = bc->ch_params.slottime; 906 bc->hdlctx.calibrate = 0; 907 /* start the bottom half stuff */ 908 schedule_delayed_work(&bc->run_work, 1); 909 netif_start_queue(dev); 910 return 0; 911 912 epptimeout: 913 printk(KERN_ERR "%s: epp timeout during bitrate probe\n", bc_drvname); 914 parport_write_control(pp, 0); /* reset the adapter */ 915 parport_release(bc->pdev); 916 parport_unregister_device(bc->pdev); 917 return -EIO; 918} 919 920/* --------------------------------------------------------------------- */ 921 922static int epp_close(struct net_device *dev) 923{ 924 struct baycom_state *bc = netdev_priv(dev); 925 struct parport *pp = bc->pdev->port; 926 unsigned char tmp[1]; 927 928 bc->work_running = 0; 929 cancel_delayed_work_sync(&bc->run_work); 930 bc->stat = EPP_DCDBIT; 931 tmp[0] = 0; 932 pp->ops->epp_write_addr(pp, tmp, 1, 0); 933 parport_write_control(pp, 0); /* reset the adapter */ 934 parport_release(bc->pdev); 935 parport_unregister_device(bc->pdev); 936 if (bc->skb) 937 dev_kfree_skb(bc->skb); 938 bc->skb = NULL; 939 printk(KERN_INFO "%s: close epp at iobase 0x%lx irq %u\n", 940 bc_drvname, dev->base_addr, dev->irq); 941 return 0; 942} 943 944/* --------------------------------------------------------------------- */ 945 946static int baycom_setmode(struct baycom_state *bc, const char *modestr) 947{ 948 const char *cp; 949 950 if (strstr(modestr,"intclk")) 951 bc->cfg.intclk = 1; 952 if (strstr(modestr,"extclk")) 953 bc->cfg.intclk = 0; 954 if (strstr(modestr,"intmodem")) 955 bc->cfg.extmodem = 0; 956 if (strstr(modestr,"extmodem")) 957 bc->cfg.extmodem = 1; 958 if (strstr(modestr,"noloopback")) 959 bc->cfg.loopback = 0; 960 if (strstr(modestr,"loopback")) 961 bc->cfg.loopback = 1; 962 if ((cp = strstr(modestr,"fclk="))) { 963 bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0); 964 if (bc->cfg.fclk < 1000000) 965 bc->cfg.fclk = 1000000; 966 if (bc->cfg.fclk > 25000000) 967 bc->cfg.fclk = 25000000; 968 } 969 if ((cp = strstr(modestr,"bps="))) { 970 bc->cfg.bps = simple_strtoul(cp+4, NULL, 0); 971 if (bc->cfg.bps < 1000) 972 bc->cfg.bps = 1000; 973 if (bc->cfg.bps > 1500000) 974 bc->cfg.bps = 1500000; 975 } 976 return 0; 977} 978 979/* --------------------------------------------------------------------- */ 980 981static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 982{ 983 struct baycom_state *bc = netdev_priv(dev); 984 struct hdlcdrv_ioctl hi; 985 986 if (cmd != SIOCDEVPRIVATE) 987 return -ENOIOCTLCMD; 988 989 if (copy_from_user(&hi, ifr->ifr_data, sizeof(hi))) 990 return -EFAULT; 991 switch (hi.cmd) { 992 default: 993 return -ENOIOCTLCMD; 994 995 case HDLCDRVCTL_GETCHANNELPAR: 996 hi.data.cp.tx_delay = bc->ch_params.tx_delay; 997 hi.data.cp.tx_tail = bc->ch_params.tx_tail; 998 hi.data.cp.slottime = bc->ch_params.slottime; 999 hi.data.cp.ppersist = bc->ch_params.ppersist; 1000 hi.data.cp.fulldup = bc->ch_params.fulldup; 1001 break; 1002 1003 case HDLCDRVCTL_SETCHANNELPAR: 1004 if (!capable(CAP_NET_ADMIN)) 1005 return -EACCES; 1006 bc->ch_params.tx_delay = hi.data.cp.tx_delay; 1007 bc->ch_params.tx_tail = hi.data.cp.tx_tail; 1008 bc->ch_params.slottime = hi.data.cp.slottime; 1009 bc->ch_params.ppersist = hi.data.cp.ppersist; 1010 bc->ch_params.fulldup = hi.data.cp.fulldup; 1011 bc->hdlctx.slotcnt = 1; 1012 return 0; 1013 1014 case HDLCDRVCTL_GETMODEMPAR: 1015 hi.data.mp.iobase = dev->base_addr; 1016 hi.data.mp.irq = dev->irq; 1017 hi.data.mp.dma = dev->dma; 1018 hi.data.mp.dma2 = 0; 1019 hi.data.mp.seriobase = 0; 1020 hi.data.mp.pariobase = 0; 1021 hi.data.mp.midiiobase = 0; 1022 break; 1023 1024 case HDLCDRVCTL_SETMODEMPAR: 1025 if ((!capable(CAP_SYS_RAWIO)) || netif_running(dev)) 1026 return -EACCES; 1027 dev->base_addr = hi.data.mp.iobase; 1028 dev->irq = /*hi.data.mp.irq*/0; 1029 dev->dma = /*hi.data.mp.dma*/0; 1030 return 0; 1031 1032 case HDLCDRVCTL_GETSTAT: 1033 hi.data.cs.ptt = !!(bc->stat & EPP_PTTBIT); 1034 hi.data.cs.dcd = !(bc->stat & EPP_DCDBIT); 1035 hi.data.cs.ptt_keyed = bc->ptt_keyed; 1036 hi.data.cs.tx_packets = dev->stats.tx_packets; 1037 hi.data.cs.tx_errors = dev->stats.tx_errors; 1038 hi.data.cs.rx_packets = dev->stats.rx_packets; 1039 hi.data.cs.rx_errors = dev->stats.rx_errors; 1040 break; 1041 1042 case HDLCDRVCTL_OLDGETSTAT: 1043 hi.data.ocs.ptt = !!(bc->stat & EPP_PTTBIT); 1044 hi.data.ocs.dcd = !(bc->stat & EPP_DCDBIT); 1045 hi.data.ocs.ptt_keyed = bc->ptt_keyed; 1046 break; 1047 1048 case HDLCDRVCTL_CALIBRATE: 1049 if (!capable(CAP_SYS_RAWIO)) 1050 return -EACCES; 1051 bc->hdlctx.calibrate = hi.data.calibrate * bc->bitrate / 8; 1052 return 0; 1053 1054 case HDLCDRVCTL_DRIVERNAME: 1055 strncpy(hi.data.drivername, "baycom_epp", sizeof(hi.data.drivername)); 1056 break; 1057 1058 case HDLCDRVCTL_GETMODE: 1059 sprintf(hi.data.modename, "%sclk,%smodem,fclk=%d,bps=%d%s", 1060 bc->cfg.intclk ? "int" : "ext", 1061 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps, 1062 bc->cfg.loopback ? ",loopback" : ""); 1063 break; 1064 1065 case HDLCDRVCTL_SETMODE: 1066 if (!capable(CAP_NET_ADMIN) || netif_running(dev)) 1067 return -EACCES; 1068 hi.data.modename[sizeof(hi.data.modename)-1] = '\0'; 1069 return baycom_setmode(bc, hi.data.modename); 1070 1071 case HDLCDRVCTL_MODELIST: 1072 strncpy(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x", 1073 sizeof(hi.data.modename)); 1074 break; 1075 1076 case HDLCDRVCTL_MODEMPARMASK: 1077 return HDLCDRV_PARMASK_IOBASE; 1078 1079 } 1080 if (copy_to_user(ifr->ifr_data, &hi, sizeof(hi))) 1081 return -EFAULT; 1082 return 0; 1083} 1084 1085/* --------------------------------------------------------------------- */ 1086 1087static const struct net_device_ops baycom_netdev_ops = { 1088 .ndo_open = epp_open, 1089 .ndo_stop = epp_close, 1090 .ndo_do_ioctl = baycom_ioctl, 1091 .ndo_start_xmit = baycom_send_packet, 1092 .ndo_set_mac_address = baycom_set_mac_address, 1093}; 1094 1095/* 1096 * Check for a network adaptor of this type, and return '0' if one exists. 1097 * If dev->base_addr == 0, probe all likely locations. 1098 * If dev->base_addr == 1, always return failure. 1099 * If dev->base_addr == 2, allocate space for the device and return success 1100 * (detachable devices only). 1101 */ 1102static void baycom_probe(struct net_device *dev) 1103{ 1104 const struct hdlcdrv_channel_params dflt_ch_params = { 1105 20, 2, 10, 40, 0 1106 }; 1107 struct baycom_state *bc; 1108 1109 /* 1110 * not a real probe! only initialize data structures 1111 */ 1112 bc = netdev_priv(dev); 1113 /* 1114 * initialize the baycom_state struct 1115 */ 1116 bc->ch_params = dflt_ch_params; 1117 bc->ptt_keyed = 0; 1118 1119 /* 1120 * initialize the device struct 1121 */ 1122 1123 /* Fill in the fields of the device structure */ 1124 bc->skb = NULL; 1125 1126 dev->netdev_ops = &baycom_netdev_ops; 1127 dev->header_ops = &ax25_header_ops; 1128 1129 dev->type = ARPHRD_AX25; /* AF_AX25 device */ 1130 dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN; 1131 dev->mtu = AX25_DEF_PACLEN; /* eth_mtu is the default */ 1132 dev->addr_len = AX25_ADDR_LEN; /* sizeof an ax.25 address */ 1133 memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN); 1134 memcpy(dev->dev_addr, &null_ax25_address, AX25_ADDR_LEN); 1135 dev->tx_queue_len = 16; 1136 1137 /* New style flags */ 1138 dev->flags = 0; 1139} 1140 1141/* --------------------------------------------------------------------- */ 1142 1143/* 1144 * command line settable parameters 1145 */ 1146static const char *mode[NR_PORTS] = { "", }; 1147static int iobase[NR_PORTS] = { 0x378, }; 1148 1149module_param_array(mode, charp, NULL, 0); 1150MODULE_PARM_DESC(mode, "baycom operating mode"); 1151module_param_array(iobase, int, NULL, 0); 1152MODULE_PARM_DESC(iobase, "baycom io base address"); 1153 1154MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu"); 1155MODULE_DESCRIPTION("Baycom epp amateur radio modem driver"); 1156MODULE_LICENSE("GPL"); 1157 1158/* --------------------------------------------------------------------- */ 1159 1160static void __init baycom_epp_dev_setup(struct net_device *dev) 1161{ 1162 struct baycom_state *bc = netdev_priv(dev); 1163 1164 /* 1165 * initialize part of the baycom_state struct 1166 */ 1167 bc->dev = dev; 1168 bc->magic = BAYCOM_MAGIC; 1169 bc->cfg.fclk = 19666600; 1170 bc->cfg.bps = 9600; 1171 /* 1172 * initialize part of the device struct 1173 */ 1174 baycom_probe(dev); 1175} 1176 1177static int __init init_baycomepp(void) 1178{ 1179 int i, found = 0; 1180 char set_hw = 1; 1181 1182 printk(bc_drvinfo); 1183 /* 1184 * register net devices 1185 */ 1186 for (i = 0; i < NR_PORTS; i++) { 1187 struct net_device *dev; 1188 1189 dev = alloc_netdev(sizeof(struct baycom_state), "bce%d", 1190 baycom_epp_dev_setup); 1191 1192 if (!dev) { 1193 printk(KERN_WARNING "bce%d : out of memory\n", i); 1194 return found ? 0 : -ENOMEM; 1195 } 1196 1197 sprintf(dev->name, "bce%d", i); 1198 dev->base_addr = iobase[i]; 1199 1200 if (!mode[i]) 1201 set_hw = 0; 1202 if (!set_hw) 1203 iobase[i] = 0; 1204 1205 if (register_netdev(dev)) { 1206 printk(KERN_WARNING "%s: cannot register net device %s\n", bc_drvname, dev->name); 1207 free_netdev(dev); 1208 break; 1209 } 1210 if (set_hw && baycom_setmode(netdev_priv(dev), mode[i])) 1211 set_hw = 0; 1212 baycom_device[i] = dev; 1213 found++; 1214 } 1215 1216 return found ? 0 : -ENXIO; 1217} 1218 1219static void __exit cleanup_baycomepp(void) 1220{ 1221 int i; 1222 1223 for(i = 0; i < NR_PORTS; i++) { 1224 struct net_device *dev = baycom_device[i]; 1225 1226 if (dev) { 1227 struct baycom_state *bc = netdev_priv(dev); 1228 if (bc->magic == BAYCOM_MAGIC) { 1229 unregister_netdev(dev); 1230 free_netdev(dev); 1231 } else 1232 printk(paranoia_str, "cleanup_module"); 1233 } 1234 } 1235} 1236 1237module_init(init_baycomepp); 1238module_exit(cleanup_baycomepp); 1239 1240/* --------------------------------------------------------------------- */ 1241 1242#ifndef MODULE 1243 1244/* 1245 * format: baycom_epp=io,mode 1246 * mode: fpga config options 1247 */ 1248 1249static int __init baycom_epp_setup(char *str) 1250{ 1251 static unsigned __initdata nr_dev = 0; 1252 int ints[2]; 1253 1254 if (nr_dev >= NR_PORTS) 1255 return 0; 1256 str = get_options(str, 2, ints); 1257 if (ints[0] < 1) 1258 return 0; 1259 mode[nr_dev] = str; 1260 iobase[nr_dev] = ints[1]; 1261 nr_dev++; 1262 return 1; 1263} 1264 1265__setup("baycom_epp=", baycom_epp_setup); 1266 1267#endif /* MODULE */ 1268/* --------------------------------------------------------------------- */ 1269