1/* 2 * tw9910 Video Driver 3 * 4 * Copyright (C) 2008 Renesas Solutions Corp. 5 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 6 * 7 * Based on ov772x driver, 8 * 9 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com> 10 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> 11 * Copyright (C) 2008 Magnus Damm 12 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License version 2 as 16 * published by the Free Software Foundation. 17 */ 18 19#include <linux/init.h> 20#include <linux/module.h> 21#include <linux/i2c.h> 22#include <linux/slab.h> 23#include <linux/kernel.h> 24#include <linux/delay.h> 25#include <linux/videodev2.h> 26#include <media/v4l2-chip-ident.h> 27#include <media/v4l2-subdev.h> 28#include <media/soc_camera.h> 29#include <media/tw9910.h> 30 31#define GET_ID(val) ((val & 0xF8) >> 3) 32#define GET_REV(val) (val & 0x07) 33 34/* 35 * register offset 36 */ 37#define ID 0x00 /* Product ID Code Register */ 38#define STATUS1 0x01 /* Chip Status Register I */ 39#define INFORM 0x02 /* Input Format */ 40#define OPFORM 0x03 /* Output Format Control Register */ 41#define DLYCTR 0x04 /* Hysteresis and HSYNC Delay Control */ 42#define OUTCTR1 0x05 /* Output Control I */ 43#define ACNTL1 0x06 /* Analog Control Register 1 */ 44#define CROP_HI 0x07 /* Cropping Register, High */ 45#define VDELAY_LO 0x08 /* Vertical Delay Register, Low */ 46#define VACTIVE_LO 0x09 /* Vertical Active Register, Low */ 47#define HDELAY_LO 0x0A /* Horizontal Delay Register, Low */ 48#define HACTIVE_LO 0x0B /* Horizontal Active Register, Low */ 49#define CNTRL1 0x0C /* Control Register I */ 50#define VSCALE_LO 0x0D /* Vertical Scaling Register, Low */ 51#define SCALE_HI 0x0E /* Scaling Register, High */ 52#define HSCALE_LO 0x0F /* Horizontal Scaling Register, Low */ 53#define BRIGHT 0x10 /* BRIGHTNESS Control Register */ 54#define CONTRAST 0x11 /* CONTRAST Control Register */ 55#define SHARPNESS 0x12 /* SHARPNESS Control Register I */ 56#define SAT_U 0x13 /* Chroma (U) Gain Register */ 57#define SAT_V 0x14 /* Chroma (V) Gain Register */ 58#define HUE 0x15 /* Hue Control Register */ 59#define CORING1 0x17 60#define CORING2 0x18 /* Coring and IF compensation */ 61#define VBICNTL 0x19 /* VBI Control Register */ 62#define ACNTL2 0x1A /* Analog Control 2 */ 63#define OUTCTR2 0x1B /* Output Control 2 */ 64#define SDT 0x1C /* Standard Selection */ 65#define SDTR 0x1D /* Standard Recognition */ 66#define TEST 0x1F /* Test Control Register */ 67#define CLMPG 0x20 /* Clamping Gain */ 68#define IAGC 0x21 /* Individual AGC Gain */ 69#define AGCGAIN 0x22 /* AGC Gain */ 70#define PEAKWT 0x23 /* White Peak Threshold */ 71#define CLMPL 0x24 /* Clamp level */ 72#define SYNCT 0x25 /* Sync Amplitude */ 73#define MISSCNT 0x26 /* Sync Miss Count Register */ 74#define PCLAMP 0x27 /* Clamp Position Register */ 75#define VCNTL1 0x28 /* Vertical Control I */ 76#define VCNTL2 0x29 /* Vertical Control II */ 77#define CKILL 0x2A /* Color Killer Level Control */ 78#define COMB 0x2B /* Comb Filter Control */ 79#define LDLY 0x2C /* Luma Delay and H Filter Control */ 80#define MISC1 0x2D /* Miscellaneous Control I */ 81#define LOOP 0x2E /* LOOP Control Register */ 82#define MISC2 0x2F /* Miscellaneous Control II */ 83#define MVSN 0x30 /* Macrovision Detection */ 84#define STATUS2 0x31 /* Chip STATUS II */ 85#define HFREF 0x32 /* H monitor */ 86#define CLMD 0x33 /* CLAMP MODE */ 87#define IDCNTL 0x34 /* ID Detection Control */ 88#define CLCNTL1 0x35 /* Clamp Control I */ 89#define ANAPLLCTL 0x4C 90#define VBIMIN 0x4D 91#define HSLOWCTL 0x4E 92#define WSS3 0x4F 93#define FILLDATA 0x50 94#define SDID 0x51 95#define DID 0x52 96#define WSS1 0x53 97#define WSS2 0x54 98#define VVBI 0x55 99#define LCTL6 0x56 100#define LCTL7 0x57 101#define LCTL8 0x58 102#define LCTL9 0x59 103#define LCTL10 0x5A 104#define LCTL11 0x5B 105#define LCTL12 0x5C 106#define LCTL13 0x5D 107#define LCTL14 0x5E 108#define LCTL15 0x5F 109#define LCTL16 0x60 110#define LCTL17 0x61 111#define LCTL18 0x62 112#define LCTL19 0x63 113#define LCTL20 0x64 114#define LCTL21 0x65 115#define LCTL22 0x66 116#define LCTL23 0x67 117#define LCTL24 0x68 118#define LCTL25 0x69 119#define LCTL26 0x6A 120#define HSBEGIN 0x6B 121#define HSEND 0x6C 122#define OVSDLY 0x6D 123#define OVSEND 0x6E 124#define VBIDELAY 0x6F 125 126/* 127 * register detail 128 */ 129 130/* INFORM */ 131#define FC27_ON 0x40 /* 1 : Input crystal clock frequency is 27MHz */ 132#define FC27_FF 0x00 /* 0 : Square pixel mode. */ 133 /* Must use 24.54MHz for 60Hz field rate */ 134 /* source or 29.5MHz for 50Hz field rate */ 135#define IFSEL_S 0x10 /* 01 : S-video decoding */ 136#define IFSEL_C 0x00 /* 00 : Composite video decoding */ 137 /* Y input video selection */ 138#define YSEL_M0 0x00 /* 00 : Mux0 selected */ 139#define YSEL_M1 0x04 /* 01 : Mux1 selected */ 140#define YSEL_M2 0x08 /* 10 : Mux2 selected */ 141#define YSEL_M3 0x10 /* 11 : Mux3 selected */ 142 143/* OPFORM */ 144#define MODE 0x80 /* 0 : CCIR601 compatible YCrCb 4:2:2 format */ 145 /* 1 : ITU-R-656 compatible data sequence format */ 146#define LEN 0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */ 147 /* 1 : 16-bit YCrCb 4:2:2 output format.*/ 148#define LLCMODE 0x20 /* 1 : LLC output mode. */ 149 /* 0 : free-run output mode */ 150#define AINC 0x10 /* Serial interface auto-indexing control */ 151 /* 0 : auto-increment */ 152 /* 1 : non-auto */ 153#define VSCTL 0x08 /* 1 : Vertical out ctrl by DVALID */ 154 /* 0 : Vertical out ctrl by HACTIVE and DVALID */ 155#define OEN_TRI_SEL_MASK 0x07 156#define OEN_TRI_SEL_ALL_ON 0x00 /* Enable output for Rev0/Rev1 */ 157#define OEN_TRI_SEL_ALL_OFF_r0 0x06 /* All tri-stated for Rev0 */ 158#define OEN_TRI_SEL_ALL_OFF_r1 0x07 /* All tri-stated for Rev1 */ 159 160/* OUTCTR1 */ 161#define VSP_LO 0x00 /* 0 : VS pin output polarity is active low */ 162#define VSP_HI 0x80 /* 1 : VS pin output polarity is active high. */ 163 /* VS pin output control */ 164#define VSSL_VSYNC 0x00 /* 0 : VSYNC */ 165#define VSSL_VACT 0x10 /* 1 : VACT */ 166#define VSSL_FIELD 0x20 /* 2 : FIELD */ 167#define VSSL_VVALID 0x30 /* 3 : VVALID */ 168#define VSSL_ZERO 0x70 /* 7 : 0 */ 169#define HSP_LOW 0x00 /* 0 : HS pin output polarity is active low */ 170#define HSP_HI 0x08 /* 1 : HS pin output polarity is active high.*/ 171 /* HS pin output control */ 172#define HSSL_HACT 0x00 /* 0 : HACT */ 173#define HSSL_HSYNC 0x01 /* 1 : HSYNC */ 174#define HSSL_DVALID 0x02 /* 2 : DVALID */ 175#define HSSL_HLOCK 0x03 /* 3 : HLOCK */ 176#define HSSL_ASYNCW 0x04 /* 4 : ASYNCW */ 177#define HSSL_ZERO 0x07 /* 7 : 0 */ 178 179/* ACNTL1 */ 180#define SRESET 0x80 /* resets the device to its default state 181 * but all register content remain unchanged. 182 * This bit is self-resetting. 183 */ 184#define ACNTL1_PDN_MASK 0x0e 185#define CLK_PDN 0x08 /* system clock power down */ 186#define Y_PDN 0x04 /* Luma ADC power down */ 187#define C_PDN 0x02 /* Chroma ADC power down */ 188 189/* ACNTL2 */ 190#define ACNTL2_PDN_MASK 0x40 191#define PLL_PDN 0x40 /* PLL power down */ 192 193/* VBICNTL */ 194 195/* RTSEL : control the real time signal output from the MPOUT pin */ 196#define RTSEL_MASK 0x07 197#define RTSEL_VLOSS 0x00 /* 0000 = Video loss */ 198#define RTSEL_HLOCK 0x01 /* 0001 = H-lock */ 199#define RTSEL_SLOCK 0x02 /* 0010 = S-lock */ 200#define RTSEL_VLOCK 0x03 /* 0011 = V-lock */ 201#define RTSEL_MONO 0x04 /* 0100 = MONO */ 202#define RTSEL_DET50 0x05 /* 0101 = DET50 */ 203#define RTSEL_FIELD 0x06 /* 0110 = FIELD */ 204#define RTSEL_RTCO 0x07 /* 0111 = RTCO ( Real Time Control ) */ 205 206/* 207 * structure 208 */ 209 210struct regval_list { 211 unsigned char reg_num; 212 unsigned char value; 213}; 214 215struct tw9910_scale_ctrl { 216 char *name; 217 unsigned short width; 218 unsigned short height; 219 u16 hscale; 220 u16 vscale; 221}; 222 223struct tw9910_cropping_ctrl { 224 u16 vdelay; 225 u16 vactive; 226 u16 hdelay; 227 u16 hactive; 228}; 229 230struct tw9910_hsync_ctrl { 231 u16 start; 232 u16 end; 233}; 234 235struct tw9910_priv { 236 struct v4l2_subdev subdev; 237 struct tw9910_video_info *info; 238 const struct tw9910_scale_ctrl *scale; 239 u32 revision; 240}; 241 242static const struct tw9910_scale_ctrl tw9910_ntsc_scales[] = { 243 { 244 .name = "NTSC SQ", 245 .width = 640, 246 .height = 480, 247 .hscale = 0x0100, 248 .vscale = 0x0100, 249 }, 250 { 251 .name = "NTSC CCIR601", 252 .width = 720, 253 .height = 480, 254 .hscale = 0x0100, 255 .vscale = 0x0100, 256 }, 257 { 258 .name = "NTSC SQ (CIF)", 259 .width = 320, 260 .height = 240, 261 .hscale = 0x0200, 262 .vscale = 0x0200, 263 }, 264 { 265 .name = "NTSC CCIR601 (CIF)", 266 .width = 360, 267 .height = 240, 268 .hscale = 0x0200, 269 .vscale = 0x0200, 270 }, 271 { 272 .name = "NTSC SQ (QCIF)", 273 .width = 160, 274 .height = 120, 275 .hscale = 0x0400, 276 .vscale = 0x0400, 277 }, 278 { 279 .name = "NTSC CCIR601 (QCIF)", 280 .width = 180, 281 .height = 120, 282 .hscale = 0x0400, 283 .vscale = 0x0400, 284 }, 285}; 286 287static const struct tw9910_scale_ctrl tw9910_pal_scales[] = { 288 { 289 .name = "PAL SQ", 290 .width = 768, 291 .height = 576, 292 .hscale = 0x0100, 293 .vscale = 0x0100, 294 }, 295 { 296 .name = "PAL CCIR601", 297 .width = 720, 298 .height = 576, 299 .hscale = 0x0100, 300 .vscale = 0x0100, 301 }, 302 { 303 .name = "PAL SQ (CIF)", 304 .width = 384, 305 .height = 288, 306 .hscale = 0x0200, 307 .vscale = 0x0200, 308 }, 309 { 310 .name = "PAL CCIR601 (CIF)", 311 .width = 360, 312 .height = 288, 313 .hscale = 0x0200, 314 .vscale = 0x0200, 315 }, 316 { 317 .name = "PAL SQ (QCIF)", 318 .width = 192, 319 .height = 144, 320 .hscale = 0x0400, 321 .vscale = 0x0400, 322 }, 323 { 324 .name = "PAL CCIR601 (QCIF)", 325 .width = 180, 326 .height = 144, 327 .hscale = 0x0400, 328 .vscale = 0x0400, 329 }, 330}; 331 332static const struct tw9910_hsync_ctrl tw9910_hsync_ctrl = { 333 .start = 0x0260, 334 .end = 0x0300, 335}; 336 337/* 338 * general function 339 */ 340static struct tw9910_priv *to_tw9910(const struct i2c_client *client) 341{ 342 return container_of(i2c_get_clientdata(client), struct tw9910_priv, 343 subdev); 344} 345 346static int tw9910_mask_set(struct i2c_client *client, u8 command, 347 u8 mask, u8 set) 348{ 349 s32 val = i2c_smbus_read_byte_data(client, command); 350 if (val < 0) 351 return val; 352 353 val &= ~mask; 354 val |= set & mask; 355 356 return i2c_smbus_write_byte_data(client, command, val); 357} 358 359static int tw9910_set_scale(struct i2c_client *client, 360 const struct tw9910_scale_ctrl *scale) 361{ 362 int ret; 363 364 ret = i2c_smbus_write_byte_data(client, SCALE_HI, 365 (scale->vscale & 0x0F00) >> 4 | 366 (scale->hscale & 0x0F00) >> 8); 367 if (ret < 0) 368 return ret; 369 370 ret = i2c_smbus_write_byte_data(client, HSCALE_LO, 371 scale->hscale & 0x00FF); 372 if (ret < 0) 373 return ret; 374 375 ret = i2c_smbus_write_byte_data(client, VSCALE_LO, 376 scale->vscale & 0x00FF); 377 378 return ret; 379} 380 381static int tw9910_set_hsync(struct i2c_client *client, 382 const struct tw9910_hsync_ctrl *hsync) 383{ 384 struct tw9910_priv *priv = to_tw9910(client); 385 int ret; 386 387 /* bit 10 - 3 */ 388 ret = i2c_smbus_write_byte_data(client, HSBEGIN, 389 (hsync->start & 0x07F8) >> 3); 390 if (ret < 0) 391 return ret; 392 393 /* bit 10 - 3 */ 394 ret = i2c_smbus_write_byte_data(client, HSEND, 395 (hsync->end & 0x07F8) >> 3); 396 if (ret < 0) 397 return ret; 398 399 /* So far only revisions 0 and 1 have been seen */ 400 /* bit 2 - 0 */ 401 if (1 == priv->revision) 402 ret = tw9910_mask_set(client, HSLOWCTL, 0x77, 403 (hsync->start & 0x0007) << 4 | 404 (hsync->end & 0x0007)); 405 406 return ret; 407} 408 409static void tw9910_reset(struct i2c_client *client) 410{ 411 tw9910_mask_set(client, ACNTL1, SRESET, SRESET); 412 msleep(1); 413} 414 415static int tw9910_power(struct i2c_client *client, int enable) 416{ 417 int ret; 418 u8 acntl1; 419 u8 acntl2; 420 421 if (enable) { 422 acntl1 = 0; 423 acntl2 = 0; 424 } else { 425 acntl1 = CLK_PDN | Y_PDN | C_PDN; 426 acntl2 = PLL_PDN; 427 } 428 429 ret = tw9910_mask_set(client, ACNTL1, ACNTL1_PDN_MASK, acntl1); 430 if (ret < 0) 431 return ret; 432 433 return tw9910_mask_set(client, ACNTL2, ACNTL2_PDN_MASK, acntl2); 434} 435 436static const struct tw9910_scale_ctrl* 437tw9910_select_norm(struct soc_camera_device *icd, u32 width, u32 height) 438{ 439 const struct tw9910_scale_ctrl *scale; 440 const struct tw9910_scale_ctrl *ret = NULL; 441 v4l2_std_id norm = icd->vdev->current_norm; 442 __u32 diff = 0xffffffff, tmp; 443 int size, i; 444 445 if (norm & V4L2_STD_NTSC) { 446 scale = tw9910_ntsc_scales; 447 size = ARRAY_SIZE(tw9910_ntsc_scales); 448 } else if (norm & V4L2_STD_PAL) { 449 scale = tw9910_pal_scales; 450 size = ARRAY_SIZE(tw9910_pal_scales); 451 } else { 452 return NULL; 453 } 454 455 for (i = 0; i < size; i++) { 456 tmp = abs(width - scale[i].width) + 457 abs(height - scale[i].height); 458 if (tmp < diff) { 459 diff = tmp; 460 ret = scale + i; 461 } 462 } 463 464 return ret; 465} 466 467/* 468 * soc_camera_ops function 469 */ 470static int tw9910_s_stream(struct v4l2_subdev *sd, int enable) 471{ 472 struct i2c_client *client = sd->priv; 473 struct tw9910_priv *priv = to_tw9910(client); 474 u8 val; 475 int ret; 476 477 if (!enable) { 478 switch (priv->revision) { 479 case 0: 480 val = OEN_TRI_SEL_ALL_OFF_r0; 481 break; 482 case 1: 483 val = OEN_TRI_SEL_ALL_OFF_r1; 484 break; 485 default: 486 dev_err(&client->dev, "un-supported revision\n"); 487 return -EINVAL; 488 } 489 } else { 490 val = OEN_TRI_SEL_ALL_ON; 491 492 if (!priv->scale) { 493 dev_err(&client->dev, "norm select error\n"); 494 return -EPERM; 495 } 496 497 dev_dbg(&client->dev, "%s %dx%d\n", 498 priv->scale->name, 499 priv->scale->width, 500 priv->scale->height); 501 } 502 503 ret = tw9910_mask_set(client, OPFORM, OEN_TRI_SEL_MASK, val); 504 if (ret < 0) 505 return ret; 506 507 return tw9910_power(client, enable); 508} 509 510static int tw9910_set_bus_param(struct soc_camera_device *icd, 511 unsigned long flags) 512{ 513 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 514 struct i2c_client *client = sd->priv; 515 u8 val = VSSL_VVALID | HSSL_DVALID; 516 517 /* 518 * set OUTCTR1 519 * 520 * We use VVALID and DVALID signals to control VSYNC and HSYNC 521 * outputs, in this mode their polarity is inverted. 522 */ 523 if (flags & SOCAM_HSYNC_ACTIVE_LOW) 524 val |= HSP_HI; 525 526 if (flags & SOCAM_VSYNC_ACTIVE_LOW) 527 val |= VSP_HI; 528 529 return i2c_smbus_write_byte_data(client, OUTCTR1, val); 530} 531 532static unsigned long tw9910_query_bus_param(struct soc_camera_device *icd) 533{ 534 struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd)); 535 struct tw9910_priv *priv = to_tw9910(client); 536 struct soc_camera_link *icl = to_soc_camera_link(icd); 537 unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER | 538 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH | 539 SOCAM_VSYNC_ACTIVE_LOW | SOCAM_HSYNC_ACTIVE_LOW | 540 SOCAM_DATA_ACTIVE_HIGH | priv->info->buswidth; 541 542 return soc_camera_apply_sensor_flags(icl, flags); 543} 544 545static int tw9910_s_std(struct v4l2_subdev *sd, v4l2_std_id norm) 546{ 547 int ret = -EINVAL; 548 549 if (norm & (V4L2_STD_NTSC | V4L2_STD_PAL)) 550 ret = 0; 551 552 return ret; 553} 554 555static int tw9910_enum_input(struct soc_camera_device *icd, 556 struct v4l2_input *inp) 557{ 558 inp->type = V4L2_INPUT_TYPE_TUNER; 559 inp->std = V4L2_STD_UNKNOWN; 560 strcpy(inp->name, "Video"); 561 562 return 0; 563} 564 565static int tw9910_g_chip_ident(struct v4l2_subdev *sd, 566 struct v4l2_dbg_chip_ident *id) 567{ 568 struct i2c_client *client = sd->priv; 569 struct tw9910_priv *priv = to_tw9910(client); 570 571 id->ident = V4L2_IDENT_TW9910; 572 id->revision = priv->revision; 573 574 return 0; 575} 576 577#ifdef CONFIG_VIDEO_ADV_DEBUG 578static int tw9910_g_register(struct v4l2_subdev *sd, 579 struct v4l2_dbg_register *reg) 580{ 581 struct i2c_client *client = sd->priv; 582 int ret; 583 584 if (reg->reg > 0xff) 585 return -EINVAL; 586 587 ret = i2c_smbus_read_byte_data(client, reg->reg); 588 if (ret < 0) 589 return ret; 590 591 /* 592 * ret = int 593 * reg->val = __u64 594 */ 595 reg->val = (__u64)ret; 596 597 return 0; 598} 599 600static int tw9910_s_register(struct v4l2_subdev *sd, 601 struct v4l2_dbg_register *reg) 602{ 603 struct i2c_client *client = sd->priv; 604 605 if (reg->reg > 0xff || 606 reg->val > 0xff) 607 return -EINVAL; 608 609 return i2c_smbus_write_byte_data(client, reg->reg, reg->val); 610} 611#endif 612 613static int tw9910_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) 614{ 615 struct v4l2_rect *rect = &a->c; 616 struct i2c_client *client = sd->priv; 617 struct tw9910_priv *priv = to_tw9910(client); 618 struct soc_camera_device *icd = client->dev.platform_data; 619 int ret = -EINVAL; 620 u8 val; 621 622 /* 623 * select suitable norm 624 */ 625 priv->scale = tw9910_select_norm(icd, rect->width, rect->height); 626 if (!priv->scale) 627 goto tw9910_set_fmt_error; 628 629 /* 630 * reset hardware 631 */ 632 tw9910_reset(client); 633 634 /* 635 * set bus width 636 */ 637 val = 0x00; 638 if (SOCAM_DATAWIDTH_16 == priv->info->buswidth) 639 val = LEN; 640 641 ret = tw9910_mask_set(client, OPFORM, LEN, val); 642 if (ret < 0) 643 goto tw9910_set_fmt_error; 644 645 /* 646 * select MPOUT behavior 647 */ 648 switch (priv->info->mpout) { 649 case TW9910_MPO_VLOSS: 650 val = RTSEL_VLOSS; break; 651 case TW9910_MPO_HLOCK: 652 val = RTSEL_HLOCK; break; 653 case TW9910_MPO_SLOCK: 654 val = RTSEL_SLOCK; break; 655 case TW9910_MPO_VLOCK: 656 val = RTSEL_VLOCK; break; 657 case TW9910_MPO_MONO: 658 val = RTSEL_MONO; break; 659 case TW9910_MPO_DET50: 660 val = RTSEL_DET50; break; 661 case TW9910_MPO_FIELD: 662 val = RTSEL_FIELD; break; 663 case TW9910_MPO_RTCO: 664 val = RTSEL_RTCO; break; 665 default: 666 val = 0; 667 } 668 669 ret = tw9910_mask_set(client, VBICNTL, RTSEL_MASK, val); 670 if (ret < 0) 671 goto tw9910_set_fmt_error; 672 673 /* 674 * set scale 675 */ 676 ret = tw9910_set_scale(client, priv->scale); 677 if (ret < 0) 678 goto tw9910_set_fmt_error; 679 680 /* 681 * set hsync 682 */ 683 ret = tw9910_set_hsync(client, &tw9910_hsync_ctrl); 684 if (ret < 0) 685 goto tw9910_set_fmt_error; 686 687 rect->width = priv->scale->width; 688 rect->height = priv->scale->height; 689 rect->left = 0; 690 rect->top = 0; 691 692 return ret; 693 694tw9910_set_fmt_error: 695 696 tw9910_reset(client); 697 priv->scale = NULL; 698 699 return ret; 700} 701 702static int tw9910_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) 703{ 704 struct i2c_client *client = sd->priv; 705 struct tw9910_priv *priv = to_tw9910(client); 706 707 if (!priv->scale) { 708 int ret; 709 struct v4l2_crop crop = { 710 .c = { 711 .left = 0, 712 .top = 0, 713 .width = 640, 714 .height = 480, 715 }, 716 }; 717 ret = tw9910_s_crop(sd, &crop); 718 if (ret < 0) 719 return ret; 720 } 721 722 a->c.left = 0; 723 a->c.top = 0; 724 a->c.width = priv->scale->width; 725 a->c.height = priv->scale->height; 726 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 727 728 return 0; 729} 730 731static int tw9910_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) 732{ 733 a->bounds.left = 0; 734 a->bounds.top = 0; 735 a->bounds.width = 768; 736 a->bounds.height = 576; 737 a->defrect.left = 0; 738 a->defrect.top = 0; 739 a->defrect.width = 640; 740 a->defrect.height = 480; 741 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 742 a->pixelaspect.numerator = 1; 743 a->pixelaspect.denominator = 1; 744 745 return 0; 746} 747 748static int tw9910_g_fmt(struct v4l2_subdev *sd, 749 struct v4l2_mbus_framefmt *mf) 750{ 751 struct i2c_client *client = sd->priv; 752 struct tw9910_priv *priv = to_tw9910(client); 753 754 if (!priv->scale) { 755 int ret; 756 struct v4l2_crop crop = { 757 .c = { 758 .left = 0, 759 .top = 0, 760 .width = 640, 761 .height = 480, 762 }, 763 }; 764 ret = tw9910_s_crop(sd, &crop); 765 if (ret < 0) 766 return ret; 767 } 768 769 mf->width = priv->scale->width; 770 mf->height = priv->scale->height; 771 mf->code = V4L2_MBUS_FMT_UYVY8_2X8; 772 mf->colorspace = V4L2_COLORSPACE_JPEG; 773 mf->field = V4L2_FIELD_INTERLACED_BT; 774 775 return 0; 776} 777 778static int tw9910_s_fmt(struct v4l2_subdev *sd, 779 struct v4l2_mbus_framefmt *mf) 780{ 781 struct i2c_client *client = sd->priv; 782 struct tw9910_priv *priv = to_tw9910(client); 783 /* See tw9910_s_crop() - no proper cropping support */ 784 struct v4l2_crop a = { 785 .c = { 786 .left = 0, 787 .top = 0, 788 .width = mf->width, 789 .height = mf->height, 790 }, 791 }; 792 int ret; 793 794 WARN_ON(mf->field != V4L2_FIELD_ANY && 795 mf->field != V4L2_FIELD_INTERLACED_BT); 796 797 /* 798 * check color format 799 */ 800 if (mf->code != V4L2_MBUS_FMT_UYVY8_2X8) 801 return -EINVAL; 802 803 mf->colorspace = V4L2_COLORSPACE_JPEG; 804 805 ret = tw9910_s_crop(sd, &a); 806 if (!ret) { 807 mf->width = priv->scale->width; 808 mf->height = priv->scale->height; 809 } 810 return ret; 811} 812 813static int tw9910_try_fmt(struct v4l2_subdev *sd, 814 struct v4l2_mbus_framefmt *mf) 815{ 816 struct i2c_client *client = sd->priv; 817 struct soc_camera_device *icd = client->dev.platform_data; 818 const struct tw9910_scale_ctrl *scale; 819 820 if (V4L2_FIELD_ANY == mf->field) { 821 mf->field = V4L2_FIELD_INTERLACED_BT; 822 } else if (V4L2_FIELD_INTERLACED_BT != mf->field) { 823 dev_err(&client->dev, "Field type %d invalid.\n", mf->field); 824 return -EINVAL; 825 } 826 827 mf->code = V4L2_MBUS_FMT_UYVY8_2X8; 828 mf->colorspace = V4L2_COLORSPACE_JPEG; 829 830 /* 831 * select suitable norm 832 */ 833 scale = tw9910_select_norm(icd, mf->width, mf->height); 834 if (!scale) 835 return -EINVAL; 836 837 mf->width = scale->width; 838 mf->height = scale->height; 839 840 return 0; 841} 842 843static int tw9910_video_probe(struct soc_camera_device *icd, 844 struct i2c_client *client) 845{ 846 struct tw9910_priv *priv = to_tw9910(client); 847 s32 id; 848 849 /* 850 * We must have a parent by now. And it cannot be a wrong one. 851 * So this entire test is completely redundant. 852 */ 853 if (!icd->dev.parent || 854 to_soc_camera_host(icd->dev.parent)->nr != icd->iface) 855 return -ENODEV; 856 857 /* 858 * tw9910 only use 8 or 16 bit bus width 859 */ 860 if (SOCAM_DATAWIDTH_16 != priv->info->buswidth && 861 SOCAM_DATAWIDTH_8 != priv->info->buswidth) { 862 dev_err(&client->dev, "bus width error\n"); 863 return -ENODEV; 864 } 865 866 /* 867 * check and show Product ID 868 * So far only revisions 0 and 1 have been seen 869 */ 870 id = i2c_smbus_read_byte_data(client, ID); 871 priv->revision = GET_REV(id); 872 id = GET_ID(id); 873 874 if (0x0B != id || 875 0x01 < priv->revision) { 876 dev_err(&client->dev, 877 "Product ID error %x:%x\n", 878 id, priv->revision); 879 return -ENODEV; 880 } 881 882 dev_info(&client->dev, 883 "tw9910 Product ID %0x:%0x\n", id, priv->revision); 884 885 icd->vdev->tvnorms = V4L2_STD_NTSC | V4L2_STD_PAL; 886 icd->vdev->current_norm = V4L2_STD_NTSC; 887 888 return 0; 889} 890 891static struct soc_camera_ops tw9910_ops = { 892 .set_bus_param = tw9910_set_bus_param, 893 .query_bus_param = tw9910_query_bus_param, 894 .enum_input = tw9910_enum_input, 895}; 896 897static struct v4l2_subdev_core_ops tw9910_subdev_core_ops = { 898 .g_chip_ident = tw9910_g_chip_ident, 899 .s_std = tw9910_s_std, 900#ifdef CONFIG_VIDEO_ADV_DEBUG 901 .g_register = tw9910_g_register, 902 .s_register = tw9910_s_register, 903#endif 904}; 905 906static int tw9910_enum_fmt(struct v4l2_subdev *sd, unsigned int index, 907 enum v4l2_mbus_pixelcode *code) 908{ 909 if (index) 910 return -EINVAL; 911 912 *code = V4L2_MBUS_FMT_UYVY8_2X8; 913 return 0; 914} 915 916static struct v4l2_subdev_video_ops tw9910_subdev_video_ops = { 917 .s_stream = tw9910_s_stream, 918 .g_mbus_fmt = tw9910_g_fmt, 919 .s_mbus_fmt = tw9910_s_fmt, 920 .try_mbus_fmt = tw9910_try_fmt, 921 .cropcap = tw9910_cropcap, 922 .g_crop = tw9910_g_crop, 923 .s_crop = tw9910_s_crop, 924 .enum_mbus_fmt = tw9910_enum_fmt, 925}; 926 927static struct v4l2_subdev_ops tw9910_subdev_ops = { 928 .core = &tw9910_subdev_core_ops, 929 .video = &tw9910_subdev_video_ops, 930}; 931 932/* 933 * i2c_driver function 934 */ 935 936static int tw9910_probe(struct i2c_client *client, 937 const struct i2c_device_id *did) 938 939{ 940 struct tw9910_priv *priv; 941 struct tw9910_video_info *info; 942 struct soc_camera_device *icd = client->dev.platform_data; 943 struct i2c_adapter *adapter = 944 to_i2c_adapter(client->dev.parent); 945 struct soc_camera_link *icl; 946 int ret; 947 948 if (!icd) { 949 dev_err(&client->dev, "TW9910: missing soc-camera data!\n"); 950 return -EINVAL; 951 } 952 953 icl = to_soc_camera_link(icd); 954 if (!icl || !icl->priv) 955 return -EINVAL; 956 957 info = icl->priv; 958 959 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { 960 dev_err(&client->dev, 961 "I2C-Adapter doesn't support " 962 "I2C_FUNC_SMBUS_BYTE_DATA\n"); 963 return -EIO; 964 } 965 966 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 967 if (!priv) 968 return -ENOMEM; 969 970 priv->info = info; 971 972 v4l2_i2c_subdev_init(&priv->subdev, client, &tw9910_subdev_ops); 973 974 icd->ops = &tw9910_ops; 975 icd->iface = icl->bus_id; 976 977 ret = tw9910_video_probe(icd, client); 978 if (ret) { 979 icd->ops = NULL; 980 kfree(priv); 981 } 982 983 return ret; 984} 985 986static int tw9910_remove(struct i2c_client *client) 987{ 988 struct tw9910_priv *priv = to_tw9910(client); 989 struct soc_camera_device *icd = client->dev.platform_data; 990 991 icd->ops = NULL; 992 kfree(priv); 993 return 0; 994} 995 996static const struct i2c_device_id tw9910_id[] = { 997 { "tw9910", 0 }, 998 { } 999}; 1000MODULE_DEVICE_TABLE(i2c, tw9910_id); 1001 1002static struct i2c_driver tw9910_i2c_driver = { 1003 .driver = { 1004 .name = "tw9910", 1005 }, 1006 .probe = tw9910_probe, 1007 .remove = tw9910_remove, 1008 .id_table = tw9910_id, 1009}; 1010 1011/* 1012 * module function 1013 */ 1014static int __init tw9910_module_init(void) 1015{ 1016 return i2c_add_driver(&tw9910_i2c_driver); 1017} 1018 1019static void __exit tw9910_module_exit(void) 1020{ 1021 i2c_del_driver(&tw9910_i2c_driver); 1022} 1023 1024module_init(tw9910_module_init); 1025module_exit(tw9910_module_exit); 1026 1027MODULE_DESCRIPTION("SoC Camera driver for tw9910"); 1028MODULE_AUTHOR("Kuninori Morimoto"); 1029MODULE_LICENSE("GPL v2"); 1030