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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/media/video/
1/*
2 * Driver for simple i2c audio chips.
3 *
4 * Copyright (c) 2000 Gerd Knorr
5 * based on code by:
6 *   Eric Sandeen (eric_sandeen@bigfoot.com)
7 *   Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 *   Greg Alexander (galexand@acm.org)
9 *
10 * Copyright(c) 2005-2008 Mauro Carvalho Chehab
11 *	- Some cleanups, code fixes, etc
12 *	- Convert it to V4L2 API
13 *
14 * This code is placed under the terms of the GNU General Public License
15 *
16 * OPTIONS:
17 *   debug - set to 1 if you'd like to see debug messages
18 *
19 */
20
21#include <linux/module.h>
22#include <linux/kernel.h>
23#include <linux/sched.h>
24#include <linux/string.h>
25#include <linux/timer.h>
26#include <linux/delay.h>
27#include <linux/errno.h>
28#include <linux/slab.h>
29#include <linux/videodev2.h>
30#include <linux/i2c.h>
31#include <linux/init.h>
32#include <linux/kthread.h>
33#include <linux/freezer.h>
34
35#include <media/tvaudio.h>
36#include <media/v4l2-device.h>
37#include <media/v4l2-chip-ident.h>
38#include <media/v4l2-i2c-drv.h>
39
40#include <media/i2c-addr.h>
41
42/* ---------------------------------------------------------------------- */
43/* insmod args                                                            */
44
45static int debug;	/* insmod parameter */
46module_param(debug, int, 0644);
47
48MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
49MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
50MODULE_LICENSE("GPL");
51
52#define UNSET    (-1U)
53
54/* ---------------------------------------------------------------------- */
55/* our structs                                                            */
56
57#define MAXREGS 256
58
59struct CHIPSTATE;
60typedef int  (*getvalue)(int);
61typedef int  (*checkit)(struct CHIPSTATE*);
62typedef int  (*initialize)(struct CHIPSTATE*);
63typedef int  (*getmode)(struct CHIPSTATE*);
64typedef void (*setmode)(struct CHIPSTATE*, int mode);
65
66/* i2c command */
67typedef struct AUDIOCMD {
68	int             count;             /* # of bytes to send */
69	unsigned char   bytes[MAXREGS+1];  /* addr, data, data, ... */
70} audiocmd;
71
72/* chip description */
73struct CHIPDESC {
74	char       *name;             /* chip name         */
75	int        addr_lo, addr_hi;  /* i2c address range */
76	int        registers;         /* # of registers    */
77
78	int        *insmodopt;
79	checkit    checkit;
80	initialize initialize;
81	int        flags;
82#define CHIP_HAS_VOLUME      1
83#define CHIP_HAS_BASSTREBLE  2
84#define CHIP_HAS_INPUTSEL    4
85#define CHIP_NEED_CHECKMODE  8
86
87	/* various i2c command sequences */
88	audiocmd   init;
89
90	/* which register has which value */
91	int    leftreg,rightreg,treblereg,bassreg;
92
93	/* initialize with (defaults to 65535/65535/32768/32768 */
94	int    leftinit,rightinit,trebleinit,bassinit;
95
96	/* functions to convert the values (v4l -> chip) */
97	getvalue volfunc,treblefunc,bassfunc;
98
99	/* get/set mode */
100	getmode  getmode;
101	setmode  setmode;
102
103	/* input switch register + values for v4l inputs */
104	int  inputreg;
105	int  inputmap[4];
106	int  inputmute;
107	int  inputmask;
108};
109
110/* current state of the chip */
111struct CHIPSTATE {
112	struct v4l2_subdev sd;
113
114	/* chip-specific description - should point to
115	   an entry at CHIPDESC table */
116	struct CHIPDESC *desc;
117
118	/* shadow register set */
119	audiocmd   shadow;
120
121	/* current settings */
122	__u16 left,right,treble,bass,muted,mode;
123	int prevmode;
124	int radio;
125	int input;
126
127	/* thread */
128	struct task_struct   *thread;
129	struct timer_list    wt;
130	int                  watch_stereo;
131	int 		     audmode;
132};
133
134static inline struct CHIPSTATE *to_state(struct v4l2_subdev *sd)
135{
136	return container_of(sd, struct CHIPSTATE, sd);
137}
138
139
140/* ---------------------------------------------------------------------- */
141/* i2c I/O functions                                                      */
142
143static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
144{
145	struct v4l2_subdev *sd = &chip->sd;
146	struct i2c_client *c = v4l2_get_subdevdata(sd);
147	unsigned char buffer[2];
148
149	if (subaddr < 0) {
150		v4l2_dbg(1, debug, sd, "chip_write: 0x%x\n", val);
151		chip->shadow.bytes[1] = val;
152		buffer[0] = val;
153		if (1 != i2c_master_send(c, buffer, 1)) {
154			v4l2_warn(sd, "I/O error (write 0x%x)\n", val);
155			return -1;
156		}
157	} else {
158		if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
159			v4l2_info(sd,
160				"Tried to access a non-existent register: %d\n",
161				subaddr);
162			return -EINVAL;
163		}
164
165		v4l2_dbg(1, debug, sd, "chip_write: reg%d=0x%x\n",
166			subaddr, val);
167		chip->shadow.bytes[subaddr+1] = val;
168		buffer[0] = subaddr;
169		buffer[1] = val;
170		if (2 != i2c_master_send(c, buffer, 2)) {
171			v4l2_warn(sd, "I/O error (write reg%d=0x%x)\n",
172				subaddr, val);
173			return -1;
174		}
175	}
176	return 0;
177}
178
179static int chip_write_masked(struct CHIPSTATE *chip,
180			     int subaddr, int val, int mask)
181{
182	struct v4l2_subdev *sd = &chip->sd;
183
184	if (mask != 0) {
185		if (subaddr < 0) {
186			val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
187		} else {
188			if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
189				v4l2_info(sd,
190					"Tried to access a non-existent register: %d\n",
191					subaddr);
192				return -EINVAL;
193			}
194
195			val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
196		}
197	}
198	return chip_write(chip, subaddr, val);
199}
200
201static int chip_read(struct CHIPSTATE *chip)
202{
203	struct v4l2_subdev *sd = &chip->sd;
204	struct i2c_client *c = v4l2_get_subdevdata(sd);
205	unsigned char buffer;
206
207	if (1 != i2c_master_recv(c, &buffer, 1)) {
208		v4l2_warn(sd, "I/O error (read)\n");
209		return -1;
210	}
211	v4l2_dbg(1, debug, sd, "chip_read: 0x%x\n", buffer);
212	return buffer;
213}
214
215static int chip_read2(struct CHIPSTATE *chip, int subaddr)
216{
217	struct v4l2_subdev *sd = &chip->sd;
218	struct i2c_client *c = v4l2_get_subdevdata(sd);
219	unsigned char write[1];
220	unsigned char read[1];
221	struct i2c_msg msgs[2] = {
222		{ c->addr, 0,        1, write },
223		{ c->addr, I2C_M_RD, 1, read  }
224	};
225
226	write[0] = subaddr;
227
228	if (2 != i2c_transfer(c->adapter, msgs, 2)) {
229		v4l2_warn(sd, "I/O error (read2)\n");
230		return -1;
231	}
232	v4l2_dbg(1, debug, sd, "chip_read2: reg%d=0x%x\n",
233		subaddr, read[0]);
234	return read[0];
235}
236
237static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
238{
239	struct v4l2_subdev *sd = &chip->sd;
240	struct i2c_client *c = v4l2_get_subdevdata(sd);
241	int i;
242
243	if (0 == cmd->count)
244		return 0;
245
246	if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
247		v4l2_info(sd,
248			 "Tried to access a non-existent register range: %d to %d\n",
249			 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1);
250		return -EINVAL;
251	}
252
253
254	/* update our shadow register set; print bytes if (debug > 0) */
255	v4l2_dbg(1, debug, sd, "chip_cmd(%s): reg=%d, data:",
256		name, cmd->bytes[0]);
257	for (i = 1; i < cmd->count; i++) {
258		if (debug)
259			printk(KERN_CONT " 0x%x", cmd->bytes[i]);
260		chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
261	}
262	if (debug)
263		printk(KERN_CONT "\n");
264
265	/* send data to the chip */
266	if (cmd->count != i2c_master_send(c, cmd->bytes, cmd->count)) {
267		v4l2_warn(sd, "I/O error (%s)\n", name);
268		return -1;
269	}
270	return 0;
271}
272
273/* ---------------------------------------------------------------------- */
274/* kernel thread for doing i2c stuff asyncronly
275 *   right now it is used only to check the audio mode (mono/stereo/whatever)
276 *   some time after switching to another TV channel, then turn on stereo
277 *   if available, ...
278 */
279
280static void chip_thread_wake(unsigned long data)
281{
282	struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
283	wake_up_process(chip->thread);
284}
285
286static int chip_thread(void *data)
287{
288	struct CHIPSTATE *chip = data;
289	struct CHIPDESC  *desc = chip->desc;
290	struct v4l2_subdev *sd = &chip->sd;
291	int mode;
292
293	v4l2_dbg(1, debug, sd, "thread started\n");
294	set_freezable();
295	for (;;) {
296		set_current_state(TASK_INTERRUPTIBLE);
297		if (!kthread_should_stop())
298			schedule();
299		set_current_state(TASK_RUNNING);
300		try_to_freeze();
301		if (kthread_should_stop())
302			break;
303		v4l2_dbg(1, debug, sd, "thread wakeup\n");
304
305		/* don't do anything for radio or if mode != auto */
306		if (chip->radio || chip->mode != 0)
307			continue;
308
309		/* have a look what's going on */
310		mode = desc->getmode(chip);
311		if (mode == chip->prevmode)
312			continue;
313
314		/* chip detected a new audio mode - set it */
315		v4l2_dbg(1, debug, sd, "thread checkmode\n");
316
317		chip->prevmode = mode;
318
319		if (mode & V4L2_TUNER_MODE_STEREO)
320			desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
321		if (mode & V4L2_TUNER_MODE_LANG1_LANG2)
322			desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
323		else if (mode & V4L2_TUNER_MODE_LANG1)
324			desc->setmode(chip, V4L2_TUNER_MODE_LANG1);
325		else if (mode & V4L2_TUNER_MODE_LANG2)
326			desc->setmode(chip, V4L2_TUNER_MODE_LANG2);
327		else
328			desc->setmode(chip, V4L2_TUNER_MODE_MONO);
329
330		/* schedule next check */
331		mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
332	}
333
334	v4l2_dbg(1, debug, sd, "thread exiting\n");
335	return 0;
336}
337
338/* ---------------------------------------------------------------------- */
339/* audio chip descriptions - defines+functions for tda9840                */
340
341#define TDA9840_SW         0x00
342#define TDA9840_LVADJ      0x02
343#define TDA9840_STADJ      0x03
344#define TDA9840_TEST       0x04
345
346#define TDA9840_MONO       0x10
347#define TDA9840_STEREO     0x2a
348#define TDA9840_DUALA      0x12
349#define TDA9840_DUALB      0x1e
350#define TDA9840_DUALAB     0x1a
351#define TDA9840_DUALBA     0x16
352#define TDA9840_EXTERNAL   0x7a
353
354#define TDA9840_DS_DUAL    0x20 /* Dual sound identified          */
355#define TDA9840_ST_STEREO  0x40 /* Stereo sound identified        */
356#define TDA9840_PONRES     0x80 /* Power-on reset detected if = 1 */
357
358#define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
359#define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
360
361static int tda9840_getmode(struct CHIPSTATE *chip)
362{
363	struct v4l2_subdev *sd = &chip->sd;
364	int val, mode;
365
366	val = chip_read(chip);
367	mode = V4L2_TUNER_MODE_MONO;
368	if (val & TDA9840_DS_DUAL)
369		mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
370	if (val & TDA9840_ST_STEREO)
371		mode |= V4L2_TUNER_MODE_STEREO;
372
373	v4l2_dbg(1, debug, sd, "tda9840_getmode(): raw chip read: %d, return: %d\n",
374		val, mode);
375	return mode;
376}
377
378static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
379{
380	int update = 1;
381	int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
382
383	switch (mode) {
384	case V4L2_TUNER_MODE_MONO:
385		t |= TDA9840_MONO;
386		break;
387	case V4L2_TUNER_MODE_STEREO:
388		t |= TDA9840_STEREO;
389		break;
390	case V4L2_TUNER_MODE_LANG1:
391		t |= TDA9840_DUALA;
392		break;
393	case V4L2_TUNER_MODE_LANG2:
394		t |= TDA9840_DUALB;
395		break;
396	default:
397		update = 0;
398	}
399
400	if (update)
401		chip_write(chip, TDA9840_SW, t);
402}
403
404static int tda9840_checkit(struct CHIPSTATE *chip)
405{
406	int rc;
407	rc = chip_read(chip);
408	/* lower 5 bits should be 0 */
409	return ((rc & 0x1f) == 0) ? 1 : 0;
410}
411
412/* ---------------------------------------------------------------------- */
413/* audio chip descriptions - defines+functions for tda985x                */
414
415/* subaddresses for TDA9855 */
416#define TDA9855_VR	0x00 /* Volume, right */
417#define TDA9855_VL	0x01 /* Volume, left */
418#define TDA9855_BA	0x02 /* Bass */
419#define TDA9855_TR	0x03 /* Treble */
420#define TDA9855_SW	0x04 /* Subwoofer - not connected on DTV2000 */
421
422/* subaddresses for TDA9850 */
423#define TDA9850_C4	0x04 /* Control 1 for TDA9850 */
424
425/* subaddesses for both chips */
426#define TDA985x_C5	0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
427#define TDA985x_C6	0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
428#define TDA985x_C7	0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
429#define TDA985x_A1	0x08 /* Alignment 1 for both chips */
430#define TDA985x_A2	0x09 /* Alignment 2 for both chips */
431#define TDA985x_A3	0x0a /* Alignment 3 for both chips */
432
433/* Masks for bits in TDA9855 subaddresses */
434/* 0x00 - VR in TDA9855 */
435/* 0x01 - VL in TDA9855 */
436/* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
437 * in 1dB steps - mute is 0x27 */
438
439
440/* 0x02 - BA in TDA9855 */
441/* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
442 * in .5dB steps - 0 is 0x0E */
443
444
445/* 0x03 - TR in TDA9855 */
446/* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
447 * in 3dB steps - 0 is 0x7 */
448
449/* Masks for bits in both chips' subaddresses */
450/* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
451/* Unique to TDA9855: */
452/* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
453 * in 3dB steps - mute is 0x0 */
454
455/* Unique to TDA9850: */
456/* lower 4 bits control stereo noise threshold, over which stereo turns off
457 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
458
459
460/* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
461/* Unique to TDA9855: */
462#define TDA9855_MUTE	1<<7 /* GMU, Mute at outputs */
463#define TDA9855_AVL	1<<6 /* AVL, Automatic Volume Level */
464#define TDA9855_LOUD	1<<5 /* Loudness, 1==off */
465#define TDA9855_SUR	1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
466			     /* Bits 0 to 3 select various combinations
467			      * of line in and line out, only the
468			      * interesting ones are defined */
469#define TDA9855_EXT	1<<2 /* Selects inputs LIR and LIL.  Pins 41 & 12 */
470#define TDA9855_INT	0    /* Selects inputs LOR and LOL.  (internal) */
471
472/* Unique to TDA9850:  */
473/* lower 4 bits contol SAP noise threshold, over which SAP turns off
474 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
475
476
477/* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
478/* Common to TDA9855 and TDA9850: */
479#define TDA985x_SAP	3<<6 /* Selects SAP output, mute if not received */
480#define TDA985x_STEREO	1<<6 /* Selects Stereo ouput, mono if not received */
481#define TDA985x_MONO	0    /* Forces Mono output */
482#define TDA985x_LMU	1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
483
484/* Unique to TDA9855: */
485#define TDA9855_TZCM	1<<5 /* If set, don't mute till zero crossing */
486#define TDA9855_VZCM	1<<4 /* If set, don't change volume till zero crossing*/
487#define TDA9855_LINEAR	0    /* Linear Stereo */
488#define TDA9855_PSEUDO	1    /* Pseudo Stereo */
489#define TDA9855_SPAT_30	2    /* Spatial Stereo, 30% anti-phase crosstalk */
490#define TDA9855_SPAT_50	3    /* Spatial Stereo, 52% anti-phase crosstalk */
491#define TDA9855_E_MONO	7    /* Forced mono - mono select elseware, so useless*/
492
493/* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
494/* Common to both TDA9855 and TDA9850: */
495/* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
496 * in .5dB steps -  0dB is 0x7 */
497
498/* 0x08, 0x09 - A1 and A2 (read/write) */
499/* Common to both TDA9855 and TDA9850: */
500/* lower 5 bites are wideband and spectral expander alignment
501 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
502#define TDA985x_STP	1<<5 /* Stereo Pilot/detect (read-only) */
503#define TDA985x_SAPP	1<<6 /* SAP Pilot/detect (read-only) */
504#define TDA985x_STS	1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
505
506/* 0x0a - A3 */
507/* Common to both TDA9855 and TDA9850: */
508/* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
509 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
510#define TDA985x_ADJ	1<<7 /* Stereo adjust on/off (wideband and spectral */
511
512static int tda9855_volume(int val) { return val/0x2e8+0x27; }
513static int tda9855_bass(int val)   { return val/0xccc+0x06; }
514static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
515
516static int  tda985x_getmode(struct CHIPSTATE *chip)
517{
518	int mode;
519
520	mode = ((TDA985x_STP | TDA985x_SAPP) &
521		chip_read(chip)) >> 4;
522	/* Add mono mode regardless of SAP and stereo */
523	/* Allows forced mono */
524	return mode | V4L2_TUNER_MODE_MONO;
525}
526
527static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
528{
529	int update = 1;
530	int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
531
532	switch (mode) {
533	case V4L2_TUNER_MODE_MONO:
534		c6 |= TDA985x_MONO;
535		break;
536	case V4L2_TUNER_MODE_STEREO:
537		c6 |= TDA985x_STEREO;
538		break;
539	case V4L2_TUNER_MODE_LANG1:
540		c6 |= TDA985x_SAP;
541		break;
542	default:
543		update = 0;
544	}
545	if (update)
546		chip_write(chip,TDA985x_C6,c6);
547}
548
549
550/* ---------------------------------------------------------------------- */
551/* audio chip descriptions - defines+functions for tda9873h               */
552
553/* Subaddresses for TDA9873H */
554
555#define TDA9873_SW	0x00 /* Switching                    */
556#define TDA9873_AD	0x01 /* Adjust                       */
557#define TDA9873_PT	0x02 /* Port                         */
558
559/* Subaddress 0x00: Switching Data
560 * B7..B0:
561 *
562 * B1, B0: Input source selection
563 *  0,  0  internal
564 *  1,  0  external stereo
565 *  0,  1  external mono
566 */
567#define TDA9873_INP_MASK    3
568#define TDA9873_INTERNAL    0
569#define TDA9873_EXT_STEREO  2
570#define TDA9873_EXT_MONO    1
571
572/*    B3, B2: output signal select
573 * B4    : transmission mode
574 *  0, 0, 1   Mono
575 *  1, 0, 0   Stereo
576 *  1, 1, 1   Stereo (reversed channel)
577 *  0, 0, 0   Dual AB
578 *  0, 0, 1   Dual AA
579 *  0, 1, 0   Dual BB
580 *  0, 1, 1   Dual BA
581 */
582
583#define TDA9873_TR_MASK     (7 << 2)
584#define TDA9873_TR_MONO     4
585#define TDA9873_TR_STEREO   1 << 4
586#define TDA9873_TR_REVERSE  (1 << 3) & (1 << 2)
587#define TDA9873_TR_DUALA    1 << 2
588#define TDA9873_TR_DUALB    1 << 3
589
590/* output level controls
591 * B5:  output level switch (0 = reduced gain, 1 = normal gain)
592 * B6:  mute                (1 = muted)
593 * B7:  auto-mute           (1 = auto-mute enabled)
594 */
595
596#define TDA9873_GAIN_NORMAL 1 << 5
597#define TDA9873_MUTE        1 << 6
598#define TDA9873_AUTOMUTE    1 << 7
599
600/* Subaddress 0x01:  Adjust/standard */
601
602/* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
603 * Recommended value is +0 dB
604 */
605
606#define	TDA9873_STEREO_ADJ	0x06 /* 0dB gain */
607
608/* Bits C6..C4 control FM stantard
609 * C6, C5, C4
610 *  0,  0,  0   B/G (PAL FM)
611 *  0,  0,  1   M
612 *  0,  1,  0   D/K(1)
613 *  0,  1,  1   D/K(2)
614 *  1,  0,  0   D/K(3)
615 *  1,  0,  1   I
616 */
617#define TDA9873_BG		0
618#define TDA9873_M       1
619#define TDA9873_DK1     2
620#define TDA9873_DK2     3
621#define TDA9873_DK3     4
622#define TDA9873_I       5
623
624/* C7 controls identification response time (1=fast/0=normal)
625 */
626#define TDA9873_IDR_NORM 0
627#define TDA9873_IDR_FAST 1 << 7
628
629
630/* Subaddress 0x02: Port data */
631
632/* E1, E0   free programmable ports P1/P2
633    0,  0   both ports low
634    0,  1   P1 high
635    1,  0   P2 high
636    1,  1   both ports high
637*/
638
639#define TDA9873_PORTS    3
640
641/* E2: test port */
642#define TDA9873_TST_PORT 1 << 2
643
644/* E5..E3 control mono output channel (together with transmission mode bit B4)
645 *
646 * E5 E4 E3 B4     OUTM
647 *  0  0  0  0     mono
648 *  0  0  1  0     DUAL B
649 *  0  1  0  1     mono (from stereo decoder)
650 */
651#define TDA9873_MOUT_MONO   0
652#define TDA9873_MOUT_FMONO  0
653#define TDA9873_MOUT_DUALA  0
654#define TDA9873_MOUT_DUALB  1 << 3
655#define TDA9873_MOUT_ST     1 << 4
656#define TDA9873_MOUT_EXTM   (1 << 4 ) & (1 << 3)
657#define TDA9873_MOUT_EXTL   1 << 5
658#define TDA9873_MOUT_EXTR   (1 << 5 ) & (1 << 3)
659#define TDA9873_MOUT_EXTLR  (1 << 5 ) & (1 << 4)
660#define TDA9873_MOUT_MUTE   (1 << 5 ) & (1 << 4) & (1 << 3)
661
662/* Status bits: (chip read) */
663#define TDA9873_PONR        0 /* Power-on reset detected if = 1 */
664#define TDA9873_STEREO      2 /* Stereo sound is identified     */
665#define TDA9873_DUAL        4 /* Dual sound is identified       */
666
667static int tda9873_getmode(struct CHIPSTATE *chip)
668{
669	struct v4l2_subdev *sd = &chip->sd;
670	int val,mode;
671
672	val = chip_read(chip);
673	mode = V4L2_TUNER_MODE_MONO;
674	if (val & TDA9873_STEREO)
675		mode |= V4L2_TUNER_MODE_STEREO;
676	if (val & TDA9873_DUAL)
677		mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
678	v4l2_dbg(1, debug, sd, "tda9873_getmode(): raw chip read: %d, return: %d\n",
679		val, mode);
680	return mode;
681}
682
683static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
684{
685	struct v4l2_subdev *sd = &chip->sd;
686	int sw_data  = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
687	/*	int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
688
689	if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
690		v4l2_dbg(1, debug, sd, "tda9873_setmode(): external input\n");
691		return;
692	}
693
694	v4l2_dbg(1, debug, sd, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
695	v4l2_dbg(1, debug, sd, "tda9873_setmode(): sw_data  = %d\n", sw_data);
696
697	switch (mode) {
698	case V4L2_TUNER_MODE_MONO:
699		sw_data |= TDA9873_TR_MONO;
700		break;
701	case V4L2_TUNER_MODE_STEREO:
702		sw_data |= TDA9873_TR_STEREO;
703		break;
704	case V4L2_TUNER_MODE_LANG1:
705		sw_data |= TDA9873_TR_DUALA;
706		break;
707	case V4L2_TUNER_MODE_LANG2:
708		sw_data |= TDA9873_TR_DUALB;
709		break;
710	default:
711		chip->mode = 0;
712		return;
713	}
714
715	chip_write(chip, TDA9873_SW, sw_data);
716	v4l2_dbg(1, debug, sd, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
717		mode, sw_data);
718}
719
720static int tda9873_checkit(struct CHIPSTATE *chip)
721{
722	int rc;
723
724	if (-1 == (rc = chip_read2(chip,254)))
725		return 0;
726	return (rc & ~0x1f) == 0x80;
727}
728
729
730/* ---------------------------------------------------------------------- */
731/* audio chip description - defines+functions for tda9874h and tda9874a   */
732/* Dariusz Kowalewski <darekk@automex.pl>                                 */
733
734/* Subaddresses for TDA9874H and TDA9874A (slave rx) */
735#define TDA9874A_AGCGR		0x00	/* AGC gain */
736#define TDA9874A_GCONR		0x01	/* general config */
737#define TDA9874A_MSR		0x02	/* monitor select */
738#define TDA9874A_C1FRA		0x03	/* carrier 1 freq. */
739#define TDA9874A_C1FRB		0x04	/* carrier 1 freq. */
740#define TDA9874A_C1FRC		0x05	/* carrier 1 freq. */
741#define TDA9874A_C2FRA		0x06	/* carrier 2 freq. */
742#define TDA9874A_C2FRB		0x07	/* carrier 2 freq. */
743#define TDA9874A_C2FRC		0x08	/* carrier 2 freq. */
744#define TDA9874A_DCR		0x09	/* demodulator config */
745#define TDA9874A_FMER		0x0a	/* FM de-emphasis */
746#define TDA9874A_FMMR		0x0b	/* FM dematrix */
747#define TDA9874A_C1OLAR		0x0c	/* ch.1 output level adj. */
748#define TDA9874A_C2OLAR		0x0d	/* ch.2 output level adj. */
749#define TDA9874A_NCONR		0x0e	/* NICAM config */
750#define TDA9874A_NOLAR		0x0f	/* NICAM output level adj. */
751#define TDA9874A_NLELR		0x10	/* NICAM lower error limit */
752#define TDA9874A_NUELR		0x11	/* NICAM upper error limit */
753#define TDA9874A_AMCONR		0x12	/* audio mute control */
754#define TDA9874A_SDACOSR	0x13	/* stereo DAC output select */
755#define TDA9874A_AOSR		0x14	/* analog output select */
756#define TDA9874A_DAICONR	0x15	/* digital audio interface config */
757#define TDA9874A_I2SOSR		0x16	/* I2S-bus output select */
758#define TDA9874A_I2SOLAR	0x17	/* I2S-bus output level adj. */
759#define TDA9874A_MDACOSR	0x18	/* mono DAC output select (tda9874a) */
760#define TDA9874A_ESP		0xFF	/* easy standard progr. (tda9874a) */
761
762/* Subaddresses for TDA9874H and TDA9874A (slave tx) */
763#define TDA9874A_DSR		0x00	/* device status */
764#define TDA9874A_NSR		0x01	/* NICAM status */
765#define TDA9874A_NECR		0x02	/* NICAM error count */
766#define TDA9874A_DR1		0x03	/* add. data LSB */
767#define TDA9874A_DR2		0x04	/* add. data MSB */
768#define TDA9874A_LLRA		0x05	/* monitor level read-out LSB */
769#define TDA9874A_LLRB		0x06	/* monitor level read-out MSB */
770#define TDA9874A_SIFLR		0x07	/* SIF level */
771#define TDA9874A_TR2		252	/* test reg. 2 */
772#define TDA9874A_TR1		253	/* test reg. 1 */
773#define TDA9874A_DIC		254	/* device id. code */
774#define TDA9874A_SIC		255	/* software id. code */
775
776
777static int tda9874a_mode = 1;		/* 0: A2, 1: NICAM */
778static int tda9874a_GCONR = 0xc0;	/* default config. input pin: SIFSEL=0 */
779static int tda9874a_NCONR = 0x01;	/* default NICAM config.: AMSEL=0,AMUTE=1 */
780static int tda9874a_ESP = 0x07;		/* default standard: NICAM D/K */
781static int tda9874a_dic = -1;		/* device id. code */
782
783/* insmod options for tda9874a */
784static unsigned int tda9874a_SIF   = UNSET;
785static unsigned int tda9874a_AMSEL = UNSET;
786static unsigned int tda9874a_STD   = UNSET;
787module_param(tda9874a_SIF, int, 0444);
788module_param(tda9874a_AMSEL, int, 0444);
789module_param(tda9874a_STD, int, 0444);
790
791/*
792 * initialization table for tda9874 decoder:
793 *  - carrier 1 freq. registers (3 bytes)
794 *  - carrier 2 freq. registers (3 bytes)
795 *  - demudulator config register
796 *  - FM de-emphasis register (slow identification mode)
797 * Note: frequency registers must be written in single i2c transfer.
798 */
799static struct tda9874a_MODES {
800	char *name;
801	audiocmd cmd;
802} tda9874a_modelist[9] = {
803  {	"A2, B/G", /* default */
804	{ 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
805  {	"A2, M (Korea)",
806	{ 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
807  {	"A2, D/K (1)",
808	{ 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
809  {	"A2, D/K (2)",
810	{ 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
811  {	"A2, D/K (3)",
812	{ 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
813  {	"NICAM, I",
814	{ 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
815  {	"NICAM, B/G",
816	{ 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
817  {	"NICAM, D/K",
818	{ 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
819  {	"NICAM, L",
820	{ 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
821};
822
823static int tda9874a_setup(struct CHIPSTATE *chip)
824{
825	struct v4l2_subdev *sd = &chip->sd;
826
827	chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
828	chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
829	chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
830	if(tda9874a_dic == 0x11) {
831		chip_write(chip, TDA9874A_FMMR, 0x80);
832	} else { /* dic == 0x07 */
833		chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
834		chip_write(chip, TDA9874A_FMMR, 0x00);
835	}
836	chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
837	chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
838	chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
839	chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
840	/* Note: If signal quality is poor you may want to change NICAM */
841	/* error limit registers (NLELR and NUELR) to some greater values. */
842	/* Then the sound would remain stereo, but won't be so clear. */
843	chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
844	chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
845
846	if(tda9874a_dic == 0x11) {
847		chip_write(chip, TDA9874A_AMCONR, 0xf9);
848		chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
849		chip_write(chip, TDA9874A_AOSR, 0x80);
850		chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
851		chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
852	} else { /* dic == 0x07 */
853		chip_write(chip, TDA9874A_AMCONR, 0xfb);
854		chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
855		chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
856	}
857	v4l2_dbg(1, debug, sd, "tda9874a_setup(): %s [0x%02X].\n",
858		tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
859	return 1;
860}
861
862static int tda9874a_getmode(struct CHIPSTATE *chip)
863{
864	struct v4l2_subdev *sd = &chip->sd;
865	int dsr,nsr,mode;
866	int necr; /* just for debugging */
867
868	mode = V4L2_TUNER_MODE_MONO;
869
870	if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
871		return mode;
872	if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
873		return mode;
874	if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
875		return mode;
876
877	/* need to store dsr/nsr somewhere */
878	chip->shadow.bytes[MAXREGS-2] = dsr;
879	chip->shadow.bytes[MAXREGS-1] = nsr;
880
881	if(tda9874a_mode) {
882		/* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
883		 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
884		 * that sound has (temporarily) switched from NICAM to
885		 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
886		 * error count. So in fact there is no stereo in this case :-(
887		 * But changing the mode to V4L2_TUNER_MODE_MONO would switch
888		 * external 4052 multiplexer in audio_hook().
889		 */
890		if(nsr & 0x02) /* NSR.S/MB=1 */
891			mode |= V4L2_TUNER_MODE_STEREO;
892		if(nsr & 0x01) /* NSR.D/SB=1 */
893			mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
894	} else {
895		if(dsr & 0x02) /* DSR.IDSTE=1 */
896			mode |= V4L2_TUNER_MODE_STEREO;
897		if(dsr & 0x04) /* DSR.IDDUA=1 */
898			mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
899	}
900
901	v4l2_dbg(1, debug, sd, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
902		 dsr, nsr, necr, mode);
903	return mode;
904}
905
906static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
907{
908	struct v4l2_subdev *sd = &chip->sd;
909
910	/* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
911	/* If auto-muting is disabled, we can hear a signal of degrading quality. */
912	if (tda9874a_mode) {
913		if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
914			tda9874a_NCONR &= 0xfe; /* enable */
915		else
916			tda9874a_NCONR |= 0x01; /* disable */
917		chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
918	}
919
920	/* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
921	 * and has auto-select function for audio output (AOSR register).
922	 * Old TDA9874H doesn't support these features.
923	 * TDA9874A also has additional mono output pin (OUTM), which
924	 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
925	 */
926	if(tda9874a_dic == 0x11) {
927		int aosr = 0x80;
928		int mdacosr = (tda9874a_mode) ? 0x82:0x80;
929
930		switch(mode) {
931		case V4L2_TUNER_MODE_MONO:
932		case V4L2_TUNER_MODE_STEREO:
933			break;
934		case V4L2_TUNER_MODE_LANG1:
935			aosr = 0x80; /* auto-select, dual A/A */
936			mdacosr = (tda9874a_mode) ? 0x82:0x80;
937			break;
938		case V4L2_TUNER_MODE_LANG2:
939			aosr = 0xa0; /* auto-select, dual B/B */
940			mdacosr = (tda9874a_mode) ? 0x83:0x81;
941			break;
942		default:
943			chip->mode = 0;
944			return;
945		}
946		chip_write(chip, TDA9874A_AOSR, aosr);
947		chip_write(chip, TDA9874A_MDACOSR, mdacosr);
948
949		v4l2_dbg(1, debug, sd, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
950			mode, aosr, mdacosr);
951
952	} else { /* dic == 0x07 */
953		int fmmr,aosr;
954
955		switch(mode) {
956		case V4L2_TUNER_MODE_MONO:
957			fmmr = 0x00; /* mono */
958			aosr = 0x10; /* A/A */
959			break;
960		case V4L2_TUNER_MODE_STEREO:
961			if(tda9874a_mode) {
962				fmmr = 0x00;
963				aosr = 0x00; /* handled by NICAM auto-mute */
964			} else {
965				fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
966				aosr = 0x00;
967			}
968			break;
969		case V4L2_TUNER_MODE_LANG1:
970			fmmr = 0x02; /* dual */
971			aosr = 0x10; /* dual A/A */
972			break;
973		case V4L2_TUNER_MODE_LANG2:
974			fmmr = 0x02; /* dual */
975			aosr = 0x20; /* dual B/B */
976			break;
977		default:
978			chip->mode = 0;
979			return;
980		}
981		chip_write(chip, TDA9874A_FMMR, fmmr);
982		chip_write(chip, TDA9874A_AOSR, aosr);
983
984		v4l2_dbg(1, debug, sd, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
985			mode, fmmr, aosr);
986	}
987}
988
989static int tda9874a_checkit(struct CHIPSTATE *chip)
990{
991	struct v4l2_subdev *sd = &chip->sd;
992	int dic,sic;	/* device id. and software id. codes */
993
994	if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
995		return 0;
996	if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
997		return 0;
998
999	v4l2_dbg(1, debug, sd, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1000
1001	if((dic == 0x11)||(dic == 0x07)) {
1002		v4l2_info(sd, "found tda9874%s.\n", (dic == 0x11) ? "a" : "h");
1003		tda9874a_dic = dic;	/* remember device id. */
1004		return 1;
1005	}
1006	return 0;	/* not found */
1007}
1008
1009static int tda9874a_initialize(struct CHIPSTATE *chip)
1010{
1011	if (tda9874a_SIF > 2)
1012		tda9874a_SIF = 1;
1013	if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
1014		tda9874a_STD = 0;
1015	if(tda9874a_AMSEL > 1)
1016		tda9874a_AMSEL = 0;
1017
1018	if(tda9874a_SIF == 1)
1019		tda9874a_GCONR = 0xc0;	/* sound IF input 1 */
1020	else
1021		tda9874a_GCONR = 0xc1;	/* sound IF input 2 */
1022
1023	tda9874a_ESP = tda9874a_STD;
1024	tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1025
1026	if(tda9874a_AMSEL == 0)
1027		tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1028	else
1029		tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1030
1031	tda9874a_setup(chip);
1032	return 0;
1033}
1034
1035/* ---------------------------------------------------------------------- */
1036/* audio chip description - defines+functions for tda9875                 */
1037/* The TDA9875 is made by Philips Semiconductor
1038 * http://www.semiconductors.philips.com
1039 * TDA9875: I2C-bus controlled DSP audio processor, FM demodulator
1040 *
1041 */
1042
1043/* subaddresses for TDA9875 */
1044#define TDA9875_MUT         0x12  /*General mute  (value --> 0b11001100*/
1045#define TDA9875_CFG         0x01  /* Config register (value --> 0b00000000 */
1046#define TDA9875_DACOS       0x13  /*DAC i/o select (ADC) 0b0000100*/
1047#define TDA9875_LOSR        0x16  /*Line output select regirter 0b0100 0001*/
1048
1049#define TDA9875_CH1V        0x0c  /*Channel 1 volume (mute)*/
1050#define TDA9875_CH2V        0x0d  /*Channel 2 volume (mute)*/
1051#define TDA9875_SC1         0x14  /*SCART 1 in (mono)*/
1052#define TDA9875_SC2         0x15  /*SCART 2 in (mono)*/
1053
1054#define TDA9875_ADCIS       0x17  /*ADC input select (mono) 0b0110 000*/
1055#define TDA9875_AER         0x19  /*Audio effect (AVL+Pseudo) 0b0000 0110*/
1056#define TDA9875_MCS         0x18  /*Main channel select (DAC) 0b0000100*/
1057#define TDA9875_MVL         0x1a  /* Main volume gauche */
1058#define TDA9875_MVR         0x1b  /* Main volume droite */
1059#define TDA9875_MBA         0x1d  /* Main Basse */
1060#define TDA9875_MTR         0x1e  /* Main treble */
1061#define TDA9875_ACS         0x1f  /* Auxilary channel select (FM) 0b0000000*/
1062#define TDA9875_AVL         0x20  /* Auxilary volume gauche */
1063#define TDA9875_AVR         0x21  /* Auxilary volume droite */
1064#define TDA9875_ABA         0x22  /* Auxilary Basse */
1065#define TDA9875_ATR         0x23  /* Auxilary treble */
1066
1067#define TDA9875_MSR         0x02  /* Monitor select register */
1068#define TDA9875_C1MSB       0x03  /* Carrier 1 (FM) frequency register MSB */
1069#define TDA9875_C1MIB       0x04  /* Carrier 1 (FM) frequency register (16-8]b */
1070#define TDA9875_C1LSB       0x05  /* Carrier 1 (FM) frequency register LSB */
1071#define TDA9875_C2MSB       0x06  /* Carrier 2 (nicam) frequency register MSB */
1072#define TDA9875_C2MIB       0x07  /* Carrier 2 (nicam) frequency register (16-8]b */
1073#define TDA9875_C2LSB       0x08  /* Carrier 2 (nicam) frequency register LSB */
1074#define TDA9875_DCR         0x09  /* Demodulateur configuration regirter*/
1075#define TDA9875_DEEM        0x0a  /* FM de-emphasis regirter*/
1076#define TDA9875_FMAT        0x0b  /* FM Matrix regirter*/
1077
1078/* values */
1079#define TDA9875_MUTE_ON	    0xff /* general mute */
1080#define TDA9875_MUTE_OFF    0xcc /* general no mute */
1081
1082static int tda9875_initialize(struct CHIPSTATE *chip)
1083{
1084	chip_write(chip, TDA9875_CFG, 0xd0); /*reg de config 0 (reset)*/
1085	chip_write(chip, TDA9875_MSR, 0x03);    /* Monitor 0b00000XXX*/
1086	chip_write(chip, TDA9875_C1MSB, 0x00);  /*Car1(FM) MSB XMHz*/
1087	chip_write(chip, TDA9875_C1MIB, 0x00);  /*Car1(FM) MIB XMHz*/
1088	chip_write(chip, TDA9875_C1LSB, 0x00);  /*Car1(FM) LSB XMHz*/
1089	chip_write(chip, TDA9875_C2MSB, 0x00);  /*Car2(NICAM) MSB XMHz*/
1090	chip_write(chip, TDA9875_C2MIB, 0x00);  /*Car2(NICAM) MIB XMHz*/
1091	chip_write(chip, TDA9875_C2LSB, 0x00);  /*Car2(NICAM) LSB XMHz*/
1092	chip_write(chip, TDA9875_DCR, 0x00);    /*Demod config 0x00*/
1093	chip_write(chip, TDA9875_DEEM, 0x44);   /*DE-Emph 0b0100 0100*/
1094	chip_write(chip, TDA9875_FMAT, 0x00);   /*FM Matrix reg 0x00*/
1095	chip_write(chip, TDA9875_SC1, 0x00);    /* SCART 1 (SC1)*/
1096	chip_write(chip, TDA9875_SC2, 0x01);    /* SCART 2 (sc2)*/
1097
1098	chip_write(chip, TDA9875_CH1V, 0x10);  /* Channel volume 1 mute*/
1099	chip_write(chip, TDA9875_CH2V, 0x10);  /* Channel volume 2 mute */
1100	chip_write(chip, TDA9875_DACOS, 0x02); /* sig DAC i/o(in:nicam)*/
1101	chip_write(chip, TDA9875_ADCIS, 0x6f); /* sig ADC input(in:mono)*/
1102	chip_write(chip, TDA9875_LOSR, 0x00);  /* line out (in:mono)*/
1103	chip_write(chip, TDA9875_AER, 0x00);   /*06 Effect (AVL+PSEUDO) */
1104	chip_write(chip, TDA9875_MCS, 0x44);   /* Main ch select (DAC) */
1105	chip_write(chip, TDA9875_MVL, 0x03);   /* Vol Main left 10dB */
1106	chip_write(chip, TDA9875_MVR, 0x03);   /* Vol Main right 10dB*/
1107	chip_write(chip, TDA9875_MBA, 0x00);   /* Main Bass Main 0dB*/
1108	chip_write(chip, TDA9875_MTR, 0x00);   /* Main Treble Main 0dB*/
1109	chip_write(chip, TDA9875_ACS, 0x44);   /* Aux chan select (dac)*/
1110	chip_write(chip, TDA9875_AVL, 0x00);   /* Vol Aux left 0dB*/
1111	chip_write(chip, TDA9875_AVR, 0x00);   /* Vol Aux right 0dB*/
1112	chip_write(chip, TDA9875_ABA, 0x00);   /* Aux Bass Main 0dB*/
1113	chip_write(chip, TDA9875_ATR, 0x00);   /* Aux Aigus Main 0dB*/
1114
1115	chip_write(chip, TDA9875_MUT, 0xcc);   /* General mute  */
1116	return 0;
1117}
1118
1119static int tda9875_volume(int val) { return (unsigned char)(val / 602 - 84); }
1120static int tda9875_bass(int val) { return (unsigned char)(max(-12, val / 2115 - 15)); }
1121static int tda9875_treble(int val) { return (unsigned char)(val / 2622 - 12); }
1122
1123/* ----------------------------------------------------------------------- */
1124
1125
1126/* *********************** *
1127 * i2c interface functions *
1128 * *********************** */
1129
1130static int tda9875_checkit(struct CHIPSTATE *chip)
1131{
1132	struct v4l2_subdev *sd = &chip->sd;
1133	int dic, rev;
1134
1135	dic = chip_read2(chip, 254);
1136	rev = chip_read2(chip, 255);
1137
1138	if (dic == 0 || dic == 2) { /* tda9875 and tda9875A */
1139		v4l2_info(sd, "found tda9875%s rev. %d.\n",
1140			dic == 0 ? "" : "A", rev);
1141		return 1;
1142	}
1143	return 0;
1144}
1145
1146/* ---------------------------------------------------------------------- */
1147/* audio chip descriptions - defines+functions for tea6420                */
1148
1149#define TEA6300_VL         0x00  /* volume left */
1150#define TEA6300_VR         0x01  /* volume right */
1151#define TEA6300_BA         0x02  /* bass */
1152#define TEA6300_TR         0x03  /* treble */
1153#define TEA6300_FA         0x04  /* fader control */
1154#define TEA6300_S          0x05  /* switch register */
1155				 /* values for those registers: */
1156#define TEA6300_S_SA       0x01  /* stereo A input */
1157#define TEA6300_S_SB       0x02  /* stereo B */
1158#define TEA6300_S_SC       0x04  /* stereo C */
1159#define TEA6300_S_GMU      0x80  /* general mute */
1160
1161#define TEA6320_V          0x00  /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1162#define TEA6320_FFR        0x01  /* fader front right (0-5) */
1163#define TEA6320_FFL        0x02  /* fader front left (0-5) */
1164#define TEA6320_FRR        0x03  /* fader rear right (0-5) */
1165#define TEA6320_FRL        0x04  /* fader rear left (0-5) */
1166#define TEA6320_BA         0x05  /* bass (0-4) */
1167#define TEA6320_TR         0x06  /* treble (0-4) */
1168#define TEA6320_S          0x07  /* switch register */
1169				 /* values for those registers: */
1170#define TEA6320_S_SA       0x07  /* stereo A input */
1171#define TEA6320_S_SB       0x06  /* stereo B */
1172#define TEA6320_S_SC       0x05  /* stereo C */
1173#define TEA6320_S_SD       0x04  /* stereo D */
1174#define TEA6320_S_GMU      0x80  /* general mute */
1175
1176#define TEA6420_S_SA       0x00  /* stereo A input */
1177#define TEA6420_S_SB       0x01  /* stereo B */
1178#define TEA6420_S_SC       0x02  /* stereo C */
1179#define TEA6420_S_SD       0x03  /* stereo D */
1180#define TEA6420_S_SE       0x04  /* stereo E */
1181#define TEA6420_S_GMU      0x05  /* general mute */
1182
1183static int tea6300_shift10(int val) { return val >> 10; }
1184static int tea6300_shift12(int val) { return val >> 12; }
1185
1186/* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1187/* 0x0c mirror those immediately higher) */
1188static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1189static int tea6320_shift11(int val) { return val >> 11; }
1190static int tea6320_initialize(struct CHIPSTATE * chip)
1191{
1192	chip_write(chip, TEA6320_FFR, 0x3f);
1193	chip_write(chip, TEA6320_FFL, 0x3f);
1194	chip_write(chip, TEA6320_FRR, 0x3f);
1195	chip_write(chip, TEA6320_FRL, 0x3f);
1196
1197	return 0;
1198}
1199
1200
1201/* ---------------------------------------------------------------------- */
1202/* audio chip descriptions - defines+functions for tda8425                */
1203
1204#define TDA8425_VL         0x00  /* volume left */
1205#define TDA8425_VR         0x01  /* volume right */
1206#define TDA8425_BA         0x02  /* bass */
1207#define TDA8425_TR         0x03  /* treble */
1208#define TDA8425_S1         0x08  /* switch functions */
1209				 /* values for those registers: */
1210#define TDA8425_S1_OFF     0xEE  /* audio off (mute on) */
1211#define TDA8425_S1_CH1     0xCE  /* audio channel 1 (mute off) - "linear stereo" mode */
1212#define TDA8425_S1_CH2     0xCF  /* audio channel 2 (mute off) - "linear stereo" mode */
1213#define TDA8425_S1_MU      0x20  /* mute bit */
1214#define TDA8425_S1_STEREO  0x18  /* stereo bits */
1215#define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1216#define TDA8425_S1_STEREO_LINEAR  0x08 /* linear stereo */
1217#define TDA8425_S1_STEREO_PSEUDO  0x10 /* pseudo stereo */
1218#define TDA8425_S1_STEREO_MONO    0x00 /* forced mono */
1219#define TDA8425_S1_ML      0x06        /* language selector */
1220#define TDA8425_S1_ML_SOUND_A 0x02     /* sound a */
1221#define TDA8425_S1_ML_SOUND_B 0x04     /* sound b */
1222#define TDA8425_S1_ML_STEREO  0x06     /* stereo */
1223#define TDA8425_S1_IS      0x01        /* channel selector */
1224
1225
1226static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1227static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1228
1229static int tda8425_initialize(struct CHIPSTATE *chip)
1230{
1231	struct CHIPDESC *desc = chip->desc;
1232	struct i2c_client *c = v4l2_get_subdevdata(&chip->sd);
1233	int inputmap[4] = { /* tuner	*/ TDA8425_S1_CH2, /* radio  */ TDA8425_S1_CH1,
1234			    /* extern	*/ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
1235
1236	if (c->adapter->id == I2C_HW_B_RIVA)
1237		memcpy(desc->inputmap, inputmap, sizeof(inputmap));
1238	return 0;
1239}
1240
1241static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1242{
1243	int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1244
1245	if (mode & V4L2_TUNER_MODE_LANG1) {
1246		s1 |= TDA8425_S1_ML_SOUND_A;
1247		s1 |= TDA8425_S1_STEREO_PSEUDO;
1248
1249	} else if (mode & V4L2_TUNER_MODE_LANG2) {
1250		s1 |= TDA8425_S1_ML_SOUND_B;
1251		s1 |= TDA8425_S1_STEREO_PSEUDO;
1252
1253	} else {
1254		s1 |= TDA8425_S1_ML_STEREO;
1255
1256		if (mode & V4L2_TUNER_MODE_MONO)
1257			s1 |= TDA8425_S1_STEREO_MONO;
1258		if (mode & V4L2_TUNER_MODE_STEREO)
1259			s1 |= TDA8425_S1_STEREO_SPATIAL;
1260	}
1261	chip_write(chip,TDA8425_S1,s1);
1262}
1263
1264
1265/* ---------------------------------------------------------------------- */
1266/* audio chip descriptions - defines+functions for pic16c54 (PV951)       */
1267
1268/* the registers of 16C54, I2C sub address. */
1269#define PIC16C54_REG_KEY_CODE     0x01	       /* Not use. */
1270#define PIC16C54_REG_MISC         0x02
1271
1272/* bit definition of the RESET register, I2C data. */
1273#define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1274					    /*        code of remote controller */
1275#define PIC16C54_MISC_MTS_MAIN         0x02 /* bit 1 */
1276#define PIC16C54_MISC_MTS_SAP          0x04 /* bit 2 */
1277#define PIC16C54_MISC_MTS_BOTH         0x08 /* bit 3 */
1278#define PIC16C54_MISC_SND_MUTE         0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1279#define PIC16C54_MISC_SND_NOTMUTE      0x20 /* bit 5 */
1280#define PIC16C54_MISC_SWITCH_TUNER     0x40 /* bit 6	, Switch to Line-in */
1281#define PIC16C54_MISC_SWITCH_LINE      0x80 /* bit 7	, Switch to Tuner */
1282
1283/* ---------------------------------------------------------------------- */
1284/* audio chip descriptions - defines+functions for TA8874Z                */
1285
1286/* write 1st byte */
1287#define TA8874Z_LED_STE	0x80
1288#define TA8874Z_LED_BIL	0x40
1289#define TA8874Z_LED_EXT	0x20
1290#define TA8874Z_MONO_SET	0x10
1291#define TA8874Z_MUTE	0x08
1292#define TA8874Z_F_MONO	0x04
1293#define TA8874Z_MODE_SUB	0x02
1294#define TA8874Z_MODE_MAIN	0x01
1295
1296/* write 2nd byte */
1297/*#define TA8874Z_TI	0x80  */ /* test mode */
1298#define TA8874Z_SEPARATION	0x3f
1299#define TA8874Z_SEPARATION_DEFAULT	0x10
1300
1301/* read */
1302#define TA8874Z_B1	0x80
1303#define TA8874Z_B0	0x40
1304#define TA8874Z_CHAG_FLAG	0x20
1305
1306/*
1307 *        B1 B0
1308 * mono    L  H
1309 * stereo  L  L
1310 * BIL     H  L
1311 */
1312static int ta8874z_getmode(struct CHIPSTATE *chip)
1313{
1314	int val, mode;
1315
1316	val = chip_read(chip);
1317	mode = V4L2_TUNER_MODE_MONO;
1318	if (val & TA8874Z_B1){
1319		mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1320	}else if (!(val & TA8874Z_B0)){
1321		mode |= V4L2_TUNER_MODE_STEREO;
1322	}
1323	/* v4l_dbg(1, debug, chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1324	return mode;
1325}
1326
1327static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1328static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1329static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1330static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1331
1332static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1333{
1334	struct v4l2_subdev *sd = &chip->sd;
1335	int update = 1;
1336	audiocmd *t = NULL;
1337
1338	v4l2_dbg(1, debug, sd, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1339
1340	switch(mode){
1341	case V4L2_TUNER_MODE_MONO:
1342		t = &ta8874z_mono;
1343		break;
1344	case V4L2_TUNER_MODE_STEREO:
1345		t = &ta8874z_stereo;
1346		break;
1347	case V4L2_TUNER_MODE_LANG1:
1348		t = &ta8874z_main;
1349		break;
1350	case V4L2_TUNER_MODE_LANG2:
1351		t = &ta8874z_sub;
1352		break;
1353	default:
1354		update = 0;
1355	}
1356
1357	if(update)
1358		chip_cmd(chip, "TA8874Z", t);
1359}
1360
1361static int ta8874z_checkit(struct CHIPSTATE *chip)
1362{
1363	int rc;
1364	rc = chip_read(chip);
1365	return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1366}
1367
1368/* ---------------------------------------------------------------------- */
1369/* audio chip descriptions - struct CHIPDESC                              */
1370
1371/* insmod options to enable/disable individual audio chips */
1372static int tda8425  = 1;
1373static int tda9840  = 1;
1374static int tda9850  = 1;
1375static int tda9855  = 1;
1376static int tda9873  = 1;
1377static int tda9874a = 1;
1378static int tda9875  = 1;
1379static int tea6300;	/* default 0 - address clash with msp34xx */
1380static int tea6320;	/* default 0 - address clash with msp34xx */
1381static int tea6420  = 1;
1382static int pic16c54 = 1;
1383static int ta8874z;	/* default 0 - address clash with tda9840 */
1384
1385module_param(tda8425, int, 0444);
1386module_param(tda9840, int, 0444);
1387module_param(tda9850, int, 0444);
1388module_param(tda9855, int, 0444);
1389module_param(tda9873, int, 0444);
1390module_param(tda9874a, int, 0444);
1391module_param(tda9875, int, 0444);
1392module_param(tea6300, int, 0444);
1393module_param(tea6320, int, 0444);
1394module_param(tea6420, int, 0444);
1395module_param(pic16c54, int, 0444);
1396module_param(ta8874z, int, 0444);
1397
1398static struct CHIPDESC chiplist[] = {
1399	{
1400		.name       = "tda9840",
1401		.insmodopt  = &tda9840,
1402		.addr_lo    = I2C_ADDR_TDA9840 >> 1,
1403		.addr_hi    = I2C_ADDR_TDA9840 >> 1,
1404		.registers  = 5,
1405		.flags      = CHIP_NEED_CHECKMODE,
1406
1407		/* callbacks */
1408		.checkit    = tda9840_checkit,
1409		.getmode    = tda9840_getmode,
1410		.setmode    = tda9840_setmode,
1411
1412		.init       = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1413				/* ,TDA9840_SW, TDA9840_MONO */} }
1414	},
1415	{
1416		.name       = "tda9873h",
1417		.insmodopt  = &tda9873,
1418		.addr_lo    = I2C_ADDR_TDA985x_L >> 1,
1419		.addr_hi    = I2C_ADDR_TDA985x_H >> 1,
1420		.registers  = 3,
1421		.flags      = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1422
1423		/* callbacks */
1424		.checkit    = tda9873_checkit,
1425		.getmode    = tda9873_getmode,
1426		.setmode    = tda9873_setmode,
1427
1428		.init       = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1429		.inputreg   = TDA9873_SW,
1430		.inputmute  = TDA9873_MUTE | TDA9873_AUTOMUTE,
1431		.inputmap   = {0xa0, 0xa2, 0xa0, 0xa0},
1432		.inputmask  = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1433
1434	},
1435	{
1436		.name       = "tda9874h/a",
1437		.insmodopt  = &tda9874a,
1438		.addr_lo    = I2C_ADDR_TDA9874 >> 1,
1439		.addr_hi    = I2C_ADDR_TDA9874 >> 1,
1440		.flags      = CHIP_NEED_CHECKMODE,
1441
1442		/* callbacks */
1443		.initialize = tda9874a_initialize,
1444		.checkit    = tda9874a_checkit,
1445		.getmode    = tda9874a_getmode,
1446		.setmode    = tda9874a_setmode,
1447	},
1448	{
1449		.name       = "tda9875",
1450		.insmodopt  = &tda9875,
1451		.addr_lo    = I2C_ADDR_TDA9875 >> 1,
1452		.addr_hi    = I2C_ADDR_TDA9875 >> 1,
1453		.flags      = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1454
1455		/* callbacks */
1456		.initialize = tda9875_initialize,
1457		.checkit    = tda9875_checkit,
1458		.volfunc    = tda9875_volume,
1459		.bassfunc   = tda9875_bass,
1460		.treblefunc = tda9875_treble,
1461		.leftreg    = TDA9875_MVL,
1462		.rightreg   = TDA9875_MVR,
1463		.bassreg    = TDA9875_MBA,
1464		.treblereg  = TDA9875_MTR,
1465		.leftinit   = 58880,
1466		.rightinit  = 58880,
1467	},
1468	{
1469		.name       = "tda9850",
1470		.insmodopt  = &tda9850,
1471		.addr_lo    = I2C_ADDR_TDA985x_L >> 1,
1472		.addr_hi    = I2C_ADDR_TDA985x_H >> 1,
1473		.registers  = 11,
1474
1475		.getmode    = tda985x_getmode,
1476		.setmode    = tda985x_setmode,
1477
1478		.init       = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1479	},
1480	{
1481		.name       = "tda9855",
1482		.insmodopt  = &tda9855,
1483		.addr_lo    = I2C_ADDR_TDA985x_L >> 1,
1484		.addr_hi    = I2C_ADDR_TDA985x_H >> 1,
1485		.registers  = 11,
1486		.flags      = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1487
1488		.leftreg    = TDA9855_VL,
1489		.rightreg   = TDA9855_VR,
1490		.bassreg    = TDA9855_BA,
1491		.treblereg  = TDA9855_TR,
1492
1493		/* callbacks */
1494		.volfunc    = tda9855_volume,
1495		.bassfunc   = tda9855_bass,
1496		.treblefunc = tda9855_treble,
1497		.getmode    = tda985x_getmode,
1498		.setmode    = tda985x_setmode,
1499
1500		.init       = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1501				    TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1502				    TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1503				    0x07, 0x10, 0x10, 0x03 }}
1504	},
1505	{
1506		.name       = "tea6300",
1507		.insmodopt  = &tea6300,
1508		.addr_lo    = I2C_ADDR_TEA6300 >> 1,
1509		.addr_hi    = I2C_ADDR_TEA6300 >> 1,
1510		.registers  = 6,
1511		.flags      = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1512
1513		.leftreg    = TEA6300_VR,
1514		.rightreg   = TEA6300_VL,
1515		.bassreg    = TEA6300_BA,
1516		.treblereg  = TEA6300_TR,
1517
1518		/* callbacks */
1519		.volfunc    = tea6300_shift10,
1520		.bassfunc   = tea6300_shift12,
1521		.treblefunc = tea6300_shift12,
1522
1523		.inputreg   = TEA6300_S,
1524		.inputmap   = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1525		.inputmute  = TEA6300_S_GMU,
1526	},
1527	{
1528		.name       = "tea6320",
1529		.insmodopt  = &tea6320,
1530		.addr_lo    = I2C_ADDR_TEA6300 >> 1,
1531		.addr_hi    = I2C_ADDR_TEA6300 >> 1,
1532		.registers  = 8,
1533		.flags      = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1534
1535		.leftreg    = TEA6320_V,
1536		.rightreg   = TEA6320_V,
1537		.bassreg    = TEA6320_BA,
1538		.treblereg  = TEA6320_TR,
1539
1540		/* callbacks */
1541		.initialize = tea6320_initialize,
1542		.volfunc    = tea6320_volume,
1543		.bassfunc   = tea6320_shift11,
1544		.treblefunc = tea6320_shift11,
1545
1546		.inputreg   = TEA6320_S,
1547		.inputmap   = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1548		.inputmute  = TEA6300_S_GMU,
1549	},
1550	{
1551		.name       = "tea6420",
1552		.insmodopt  = &tea6420,
1553		.addr_lo    = I2C_ADDR_TEA6420 >> 1,
1554		.addr_hi    = I2C_ADDR_TEA6420 >> 1,
1555		.registers  = 1,
1556		.flags      = CHIP_HAS_INPUTSEL,
1557
1558		.inputreg   = -1,
1559		.inputmap   = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1560		.inputmute  = TEA6300_S_GMU,
1561	},
1562	{
1563		.name       = "tda8425",
1564		.insmodopt  = &tda8425,
1565		.addr_lo    = I2C_ADDR_TDA8425 >> 1,
1566		.addr_hi    = I2C_ADDR_TDA8425 >> 1,
1567		.registers  = 9,
1568		.flags      = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1569
1570		.leftreg    = TDA8425_VL,
1571		.rightreg   = TDA8425_VR,
1572		.bassreg    = TDA8425_BA,
1573		.treblereg  = TDA8425_TR,
1574
1575		/* callbacks */
1576		.initialize = tda8425_initialize,
1577		.volfunc    = tda8425_shift10,
1578		.bassfunc   = tda8425_shift12,
1579		.treblefunc = tda8425_shift12,
1580		.setmode    = tda8425_setmode,
1581
1582		.inputreg   = TDA8425_S1,
1583		.inputmap   = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1584		.inputmute  = TDA8425_S1_OFF,
1585
1586	},
1587	{
1588		.name       = "pic16c54 (PV951)",
1589		.insmodopt  = &pic16c54,
1590		.addr_lo    = I2C_ADDR_PIC16C54 >> 1,
1591		.addr_hi    = I2C_ADDR_PIC16C54>> 1,
1592		.registers  = 2,
1593		.flags      = CHIP_HAS_INPUTSEL,
1594
1595		.inputreg   = PIC16C54_REG_MISC,
1596		.inputmap   = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1597			     PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1598			     PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1599			     PIC16C54_MISC_SND_MUTE},
1600		.inputmute  = PIC16C54_MISC_SND_MUTE,
1601	},
1602	{
1603		.name       = "ta8874z",
1604		.checkit    = ta8874z_checkit,
1605		.insmodopt  = &ta8874z,
1606		.addr_lo    = I2C_ADDR_TDA9840 >> 1,
1607		.addr_hi    = I2C_ADDR_TDA9840 >> 1,
1608		.registers  = 2,
1609		.flags      = CHIP_NEED_CHECKMODE,
1610
1611		/* callbacks */
1612		.getmode    = ta8874z_getmode,
1613		.setmode    = ta8874z_setmode,
1614
1615		.init       = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1616	},
1617	{ .name = NULL } /* EOF */
1618};
1619
1620
1621/* ---------------------------------------------------------------------- */
1622
1623static int tvaudio_g_ctrl(struct v4l2_subdev *sd,
1624			    struct v4l2_control *ctrl)
1625{
1626	struct CHIPSTATE *chip = to_state(sd);
1627	struct CHIPDESC *desc = chip->desc;
1628
1629	switch (ctrl->id) {
1630	case V4L2_CID_AUDIO_MUTE:
1631		if (!(desc->flags & CHIP_HAS_INPUTSEL))
1632			break;
1633		ctrl->value=chip->muted;
1634		return 0;
1635	case V4L2_CID_AUDIO_VOLUME:
1636		if (!(desc->flags & CHIP_HAS_VOLUME))
1637			break;
1638		ctrl->value = max(chip->left,chip->right);
1639		return 0;
1640	case V4L2_CID_AUDIO_BALANCE:
1641	{
1642		int volume;
1643		if (!(desc->flags & CHIP_HAS_VOLUME))
1644			break;
1645		volume = max(chip->left,chip->right);
1646		if (volume)
1647			ctrl->value=(32768*min(chip->left,chip->right))/volume;
1648		else
1649			ctrl->value=32768;
1650		return 0;
1651	}
1652	case V4L2_CID_AUDIO_BASS:
1653		if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1654			break;
1655		ctrl->value = chip->bass;
1656		return 0;
1657	case V4L2_CID_AUDIO_TREBLE:
1658		if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1659			break;
1660		ctrl->value = chip->treble;
1661		return 0;
1662	}
1663	return -EINVAL;
1664}
1665
1666static int tvaudio_s_ctrl(struct v4l2_subdev *sd,
1667			    struct v4l2_control *ctrl)
1668{
1669	struct CHIPSTATE *chip = to_state(sd);
1670	struct CHIPDESC *desc = chip->desc;
1671
1672	switch (ctrl->id) {
1673	case V4L2_CID_AUDIO_MUTE:
1674		if (!(desc->flags & CHIP_HAS_INPUTSEL))
1675			break;
1676
1677		if (ctrl->value < 0 || ctrl->value >= 2)
1678			return -ERANGE;
1679		chip->muted = ctrl->value;
1680		if (chip->muted)
1681			chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1682		else
1683			chip_write_masked(chip,desc->inputreg,
1684					desc->inputmap[chip->input],desc->inputmask);
1685		return 0;
1686	case V4L2_CID_AUDIO_VOLUME:
1687	{
1688		int volume,balance;
1689
1690		if (!(desc->flags & CHIP_HAS_VOLUME))
1691			break;
1692
1693		volume = max(chip->left,chip->right);
1694		if (volume)
1695			balance=(32768*min(chip->left,chip->right))/volume;
1696		else
1697			balance=32768;
1698
1699		volume=ctrl->value;
1700		chip->left = (min(65536 - balance,32768) * volume) / 32768;
1701		chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1702
1703		chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1704		chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1705
1706		return 0;
1707	}
1708	case V4L2_CID_AUDIO_BALANCE:
1709	{
1710		int volume, balance;
1711		if (!(desc->flags & CHIP_HAS_VOLUME))
1712			break;
1713
1714		volume = max(chip->left,chip->right);
1715		balance = ctrl->value;
1716
1717		chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1718		chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1719
1720		return 0;
1721	}
1722	case V4L2_CID_AUDIO_BASS:
1723		if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1724			break;
1725		chip->bass = ctrl->value;
1726		chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1727
1728		return 0;
1729	case V4L2_CID_AUDIO_TREBLE:
1730		if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1731			break;
1732		chip->treble = ctrl->value;
1733		chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1734
1735		return 0;
1736	}
1737	return -EINVAL;
1738}
1739
1740
1741/* ---------------------------------------------------------------------- */
1742/* video4linux interface                                                  */
1743
1744static int tvaudio_s_radio(struct v4l2_subdev *sd)
1745{
1746	struct CHIPSTATE *chip = to_state(sd);
1747
1748	chip->radio = 1;
1749	chip->watch_stereo = 0;
1750	/* del_timer(&chip->wt); */
1751	return 0;
1752}
1753
1754static int tvaudio_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1755{
1756	struct CHIPSTATE *chip = to_state(sd);
1757	struct CHIPDESC *desc = chip->desc;
1758
1759	switch (qc->id) {
1760	case V4L2_CID_AUDIO_MUTE:
1761		if (desc->flags & CHIP_HAS_INPUTSEL)
1762			return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0);
1763		break;
1764	case V4L2_CID_AUDIO_VOLUME:
1765		if (desc->flags & CHIP_HAS_VOLUME)
1766			return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 58880);
1767		break;
1768	case V4L2_CID_AUDIO_BALANCE:
1769		if (desc->flags & CHIP_HAS_VOLUME)
1770			return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1771		break;
1772	case V4L2_CID_AUDIO_BASS:
1773	case V4L2_CID_AUDIO_TREBLE:
1774		if (desc->flags & CHIP_HAS_BASSTREBLE)
1775			return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1776		break;
1777	default:
1778		break;
1779	}
1780	return -EINVAL;
1781}
1782
1783static int tvaudio_s_routing(struct v4l2_subdev *sd,
1784			     u32 input, u32 output, u32 config)
1785{
1786	struct CHIPSTATE *chip = to_state(sd);
1787	struct CHIPDESC *desc = chip->desc;
1788
1789	if (!(desc->flags & CHIP_HAS_INPUTSEL))
1790		return 0;
1791	if (input >= 4)
1792		return -EINVAL;
1793	/* There are four inputs: tuner, radio, extern and intern. */
1794	chip->input = input;
1795	if (chip->muted)
1796		return 0;
1797	chip_write_masked(chip, desc->inputreg,
1798			desc->inputmap[chip->input], desc->inputmask);
1799	return 0;
1800}
1801
1802static int tvaudio_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1803{
1804	struct CHIPSTATE *chip = to_state(sd);
1805	struct CHIPDESC *desc = chip->desc;
1806	int mode = 0;
1807
1808	if (!desc->setmode)
1809		return 0;
1810	if (chip->radio)
1811		return 0;
1812
1813	switch (vt->audmode) {
1814	case V4L2_TUNER_MODE_MONO:
1815	case V4L2_TUNER_MODE_STEREO:
1816	case V4L2_TUNER_MODE_LANG1:
1817	case V4L2_TUNER_MODE_LANG2:
1818		mode = vt->audmode;
1819		break;
1820	case V4L2_TUNER_MODE_LANG1_LANG2:
1821		mode = V4L2_TUNER_MODE_STEREO;
1822		break;
1823	default:
1824		return -EINVAL;
1825	}
1826	chip->audmode = vt->audmode;
1827
1828	if (mode) {
1829		chip->watch_stereo = 0;
1830		/* del_timer(&chip->wt); */
1831		chip->mode = mode;
1832		desc->setmode(chip, mode);
1833	}
1834	return 0;
1835}
1836
1837static int tvaudio_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1838{
1839	struct CHIPSTATE *chip = to_state(sd);
1840	struct CHIPDESC *desc = chip->desc;
1841	int mode = V4L2_TUNER_MODE_MONO;
1842
1843	if (!desc->getmode)
1844		return 0;
1845	if (chip->radio)
1846		return 0;
1847
1848	vt->audmode = chip->audmode;
1849	vt->rxsubchans = 0;
1850	vt->capability = V4L2_TUNER_CAP_STEREO |
1851		V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1852
1853	mode = desc->getmode(chip);
1854
1855	if (mode & V4L2_TUNER_MODE_MONO)
1856		vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1857	if (mode & V4L2_TUNER_MODE_STEREO)
1858		vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1859	/* Note: for SAP it should be mono/lang2 or stereo/lang2.
1860	   When this module is converted fully to v4l2, then this
1861	   should change for those chips that can detect SAP. */
1862	if (mode & V4L2_TUNER_MODE_LANG1)
1863		vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1864			V4L2_TUNER_SUB_LANG2;
1865	return 0;
1866}
1867
1868static int tvaudio_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1869{
1870	struct CHIPSTATE *chip = to_state(sd);
1871
1872	chip->radio = 0;
1873	return 0;
1874}
1875
1876static int tvaudio_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
1877{
1878	struct CHIPSTATE *chip = to_state(sd);
1879	struct CHIPDESC *desc = chip->desc;
1880
1881	chip->mode = 0; /* automatic */
1882
1883	/* For chips that provide getmode and setmode, and doesn't
1884	   automatically follows the stereo carrier, a kthread is
1885	   created to set the audio standard. In this case, when then
1886	   the video channel is changed, tvaudio starts on MONO mode.
1887	   After waiting for 2 seconds, the kernel thread is called,
1888	   to follow whatever audio standard is pointed by the
1889	   audio carrier.
1890	 */
1891	if (chip->thread) {
1892		desc->setmode(chip, V4L2_TUNER_MODE_MONO);
1893		if (chip->prevmode != V4L2_TUNER_MODE_MONO)
1894			chip->prevmode = -1; /* reset previous mode */
1895		mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1896	}
1897	return 0;
1898}
1899
1900static int tvaudio_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
1901{
1902	struct i2c_client *client = v4l2_get_subdevdata(sd);
1903
1904	return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVAUDIO, 0);
1905}
1906
1907/* ----------------------------------------------------------------------- */
1908
1909static const struct v4l2_subdev_core_ops tvaudio_core_ops = {
1910	.g_chip_ident = tvaudio_g_chip_ident,
1911	.queryctrl = tvaudio_queryctrl,
1912	.g_ctrl = tvaudio_g_ctrl,
1913	.s_ctrl = tvaudio_s_ctrl,
1914	.s_std = tvaudio_s_std,
1915};
1916
1917static const struct v4l2_subdev_tuner_ops tvaudio_tuner_ops = {
1918	.s_radio = tvaudio_s_radio,
1919	.s_frequency = tvaudio_s_frequency,
1920	.s_tuner = tvaudio_s_tuner,
1921	.g_tuner = tvaudio_g_tuner,
1922};
1923
1924static const struct v4l2_subdev_audio_ops tvaudio_audio_ops = {
1925	.s_routing = tvaudio_s_routing,
1926};
1927
1928static const struct v4l2_subdev_ops tvaudio_ops = {
1929	.core = &tvaudio_core_ops,
1930	.tuner = &tvaudio_tuner_ops,
1931	.audio = &tvaudio_audio_ops,
1932};
1933
1934/* ----------------------------------------------------------------------- */
1935
1936
1937/* i2c registration                                                       */
1938
1939static int tvaudio_probe(struct i2c_client *client, const struct i2c_device_id *id)
1940{
1941	struct CHIPSTATE *chip;
1942	struct CHIPDESC  *desc;
1943	struct v4l2_subdev *sd;
1944
1945	if (debug) {
1946		printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1947		printk(KERN_INFO "tvaudio: known chips: ");
1948		for (desc = chiplist; desc->name != NULL; desc++)
1949			printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1950		printk("\n");
1951	}
1952
1953	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1954	if (!chip)
1955		return -ENOMEM;
1956	sd = &chip->sd;
1957	v4l2_i2c_subdev_init(sd, client, &tvaudio_ops);
1958
1959	/* find description for the chip */
1960	v4l2_dbg(1, debug, sd, "chip found @ 0x%x\n", client->addr<<1);
1961	for (desc = chiplist; desc->name != NULL; desc++) {
1962		if (0 == *(desc->insmodopt))
1963			continue;
1964		if (client->addr < desc->addr_lo ||
1965		    client->addr > desc->addr_hi)
1966			continue;
1967		if (desc->checkit && !desc->checkit(chip))
1968			continue;
1969		break;
1970	}
1971	if (desc->name == NULL) {
1972		v4l2_dbg(1, debug, sd, "no matching chip description found\n");
1973		kfree(chip);
1974		return -EIO;
1975	}
1976	v4l2_info(sd, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1977	if (desc->flags) {
1978		v4l2_dbg(1, debug, sd, "matches:%s%s%s.\n",
1979			(desc->flags & CHIP_HAS_VOLUME)     ? " volume"      : "",
1980			(desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1981			(desc->flags & CHIP_HAS_INPUTSEL)   ? " audiomux"    : "");
1982	}
1983
1984	/* fill required data structures */
1985	if (!id)
1986		strlcpy(client->name, desc->name, I2C_NAME_SIZE);
1987	chip->desc = desc;
1988	chip->shadow.count = desc->registers+1;
1989	chip->prevmode = -1;
1990	chip->audmode = V4L2_TUNER_MODE_LANG1;
1991
1992	/* initialization  */
1993	if (desc->initialize != NULL)
1994		desc->initialize(chip);
1995	else
1996		chip_cmd(chip, "init", &desc->init);
1997
1998	if (desc->flags & CHIP_HAS_VOLUME) {
1999		if (!desc->volfunc) {
2000			/* This shouldn't be happen. Warn user, but keep working
2001			   without volume controls
2002			 */
2003			v4l2_info(sd, "volume callback undefined!\n");
2004			desc->flags &= ~CHIP_HAS_VOLUME;
2005		} else {
2006			chip->left  = desc->leftinit  ? desc->leftinit  : 65535;
2007			chip->right = desc->rightinit ? desc->rightinit : 65535;
2008			chip_write(chip, desc->leftreg,
2009				   desc->volfunc(chip->left));
2010			chip_write(chip, desc->rightreg,
2011				   desc->volfunc(chip->right));
2012		}
2013	}
2014	if (desc->flags & CHIP_HAS_BASSTREBLE) {
2015		if (!desc->bassfunc || !desc->treblefunc) {
2016			/* This shouldn't be happen. Warn user, but keep working
2017			   without bass/treble controls
2018			 */
2019			v4l2_info(sd, "bass/treble callbacks undefined!\n");
2020			desc->flags &= ~CHIP_HAS_BASSTREBLE;
2021		} else {
2022			chip->treble = desc->trebleinit ?
2023						desc->trebleinit : 32768;
2024			chip->bass   = desc->bassinit   ?
2025						desc->bassinit   : 32768;
2026			chip_write(chip, desc->bassreg,
2027				   desc->bassfunc(chip->bass));
2028			chip_write(chip, desc->treblereg,
2029				   desc->treblefunc(chip->treble));
2030		}
2031	}
2032
2033	chip->thread = NULL;
2034	init_timer(&chip->wt);
2035	if (desc->flags & CHIP_NEED_CHECKMODE) {
2036		if (!desc->getmode || !desc->setmode) {
2037			/* This shouldn't be happen. Warn user, but keep working
2038			   without kthread
2039			 */
2040			v4l2_info(sd, "set/get mode callbacks undefined!\n");
2041			return 0;
2042		}
2043		/* start async thread */
2044		chip->wt.function = chip_thread_wake;
2045		chip->wt.data     = (unsigned long)chip;
2046		chip->thread = kthread_run(chip_thread, chip, client->name);
2047		if (IS_ERR(chip->thread)) {
2048			v4l2_warn(sd, "failed to create kthread\n");
2049			chip->thread = NULL;
2050		}
2051	}
2052	return 0;
2053}
2054
2055static int tvaudio_remove(struct i2c_client *client)
2056{
2057	struct v4l2_subdev *sd = i2c_get_clientdata(client);
2058	struct CHIPSTATE *chip = to_state(sd);
2059
2060	del_timer_sync(&chip->wt);
2061	if (chip->thread) {
2062		/* shutdown async thread */
2063		kthread_stop(chip->thread);
2064		chip->thread = NULL;
2065	}
2066
2067	v4l2_device_unregister_subdev(sd);
2068	kfree(chip);
2069	return 0;
2070}
2071
2072/* This driver supports many devices and the idea is to let the driver
2073   detect which device is present. So rather than listing all supported
2074   devices here, we pretend to support a single, fake device type. */
2075static const struct i2c_device_id tvaudio_id[] = {
2076	{ "tvaudio", 0 },
2077	{ }
2078};
2079MODULE_DEVICE_TABLE(i2c, tvaudio_id);
2080
2081static struct v4l2_i2c_driver_data v4l2_i2c_data = {
2082	.name = "tvaudio",
2083	.probe = tvaudio_probe,
2084	.remove = tvaudio_remove,
2085	.id_table = tvaudio_id,
2086};
2087