1/* 2 * Support for LGDT3302 and LGDT3303 - VSB/QAM 3 * 4 * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 * 20 */ 21 22/* 23 * NOTES ABOUT THIS DRIVER 24 * 25 * This Linux driver supports: 26 * DViCO FusionHDTV 3 Gold-Q 27 * DViCO FusionHDTV 3 Gold-T 28 * DViCO FusionHDTV 5 Gold 29 * DViCO FusionHDTV 5 Lite 30 * DViCO FusionHDTV 5 USB Gold 31 * Air2PC/AirStar 2 ATSC 3rd generation (HD5000) 32 * pcHDTV HD5500 33 * 34 */ 35 36#include <linux/kernel.h> 37#include <linux/module.h> 38#include <linux/init.h> 39#include <linux/delay.h> 40#include <linux/string.h> 41#include <linux/slab.h> 42#include <asm/byteorder.h> 43 44#include "dvb_frontend.h" 45#include "dvb_math.h" 46#include "lgdt330x_priv.h" 47#include "lgdt330x.h" 48 49/* Use Equalizer Mean Squared Error instead of Phaser Tracker MSE */ 50/* #define USE_EQMSE */ 51 52static int debug; 53module_param(debug, int, 0644); 54MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off)."); 55#define dprintk(args...) \ 56do { \ 57if (debug) printk(KERN_DEBUG "lgdt330x: " args); \ 58} while (0) 59 60struct lgdt330x_state 61{ 62 struct i2c_adapter* i2c; 63 64 /* Configuration settings */ 65 const struct lgdt330x_config* config; 66 67 struct dvb_frontend frontend; 68 69 /* Demodulator private data */ 70 fe_modulation_t current_modulation; 71 u32 snr; /* Result of last SNR calculation */ 72 73 /* Tuner private data */ 74 u32 current_frequency; 75}; 76 77static int i2c_write_demod_bytes (struct lgdt330x_state* state, 78 u8 *buf, /* data bytes to send */ 79 int len /* number of bytes to send */ ) 80{ 81 struct i2c_msg msg = 82 { .addr = state->config->demod_address, 83 .flags = 0, 84 .buf = buf, 85 .len = 2 }; 86 int i; 87 int err; 88 89 for (i=0; i<len-1; i+=2){ 90 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { 91 printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __func__, msg.buf[0], msg.buf[1], err); 92 if (err < 0) 93 return err; 94 else 95 return -EREMOTEIO; 96 } 97 msg.buf += 2; 98 } 99 return 0; 100} 101 102/* 103 * This routine writes the register (reg) to the demod bus 104 * then reads the data returned for (len) bytes. 105 */ 106 107static u8 i2c_read_demod_bytes (struct lgdt330x_state* state, 108 enum I2C_REG reg, u8* buf, int len) 109{ 110 u8 wr [] = { reg }; 111 struct i2c_msg msg [] = { 112 { .addr = state->config->demod_address, 113 .flags = 0, .buf = wr, .len = 1 }, 114 { .addr = state->config->demod_address, 115 .flags = I2C_M_RD, .buf = buf, .len = len }, 116 }; 117 int ret; 118 ret = i2c_transfer(state->i2c, msg, 2); 119 if (ret != 2) { 120 printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __func__, state->config->demod_address, reg, ret); 121 } else { 122 ret = 0; 123 } 124 return ret; 125} 126 127/* Software reset */ 128static int lgdt3302_SwReset(struct lgdt330x_state* state) 129{ 130 u8 ret; 131 u8 reset[] = { 132 IRQ_MASK, 133 0x00 /* bit 6 is active low software reset 134 * bits 5-0 are 1 to mask interrupts */ 135 }; 136 137 ret = i2c_write_demod_bytes(state, 138 reset, sizeof(reset)); 139 if (ret == 0) { 140 141 /* force reset high (inactive) and unmask interrupts */ 142 reset[1] = 0x7f; 143 ret = i2c_write_demod_bytes(state, 144 reset, sizeof(reset)); 145 } 146 return ret; 147} 148 149static int lgdt3303_SwReset(struct lgdt330x_state* state) 150{ 151 u8 ret; 152 u8 reset[] = { 153 0x02, 154 0x00 /* bit 0 is active low software reset */ 155 }; 156 157 ret = i2c_write_demod_bytes(state, 158 reset, sizeof(reset)); 159 if (ret == 0) { 160 161 /* force reset high (inactive) */ 162 reset[1] = 0x01; 163 ret = i2c_write_demod_bytes(state, 164 reset, sizeof(reset)); 165 } 166 return ret; 167} 168 169static int lgdt330x_SwReset(struct lgdt330x_state* state) 170{ 171 switch (state->config->demod_chip) { 172 case LGDT3302: 173 return lgdt3302_SwReset(state); 174 case LGDT3303: 175 return lgdt3303_SwReset(state); 176 default: 177 return -ENODEV; 178 } 179} 180 181static int lgdt330x_init(struct dvb_frontend* fe) 182{ 183 /* Hardware reset is done using gpio[0] of cx23880x chip. 184 * I'd like to do it here, but don't know how to find chip address. 185 * cx88-cards.c arranges for the reset bit to be inactive (high). 186 * Maybe there needs to be a callable function in cx88-core or 187 * the caller of this function needs to do it. */ 188 189 /* 190 * Array of byte pairs <address, value> 191 * to initialize each different chip 192 */ 193 static u8 lgdt3302_init_data[] = { 194 /* Use 50MHz parameter values from spec sheet since xtal is 50 */ 195 /* Change the value of NCOCTFV[25:0] of carrier 196 recovery center frequency register */ 197 VSB_CARRIER_FREQ0, 0x00, 198 VSB_CARRIER_FREQ1, 0x87, 199 VSB_CARRIER_FREQ2, 0x8e, 200 VSB_CARRIER_FREQ3, 0x01, 201 /* Change the TPCLK pin polarity 202 data is valid on falling clock */ 203 DEMUX_CONTROL, 0xfb, 204 /* Change the value of IFBW[11:0] of 205 AGC IF/RF loop filter bandwidth register */ 206 AGC_RF_BANDWIDTH0, 0x40, 207 AGC_RF_BANDWIDTH1, 0x93, 208 AGC_RF_BANDWIDTH2, 0x00, 209 /* Change the value of bit 6, 'nINAGCBY' and 210 'NSSEL[1:0] of ACG function control register 2 */ 211 AGC_FUNC_CTRL2, 0xc6, 212 /* Change the value of bit 6 'RFFIX' 213 of AGC function control register 3 */ 214 AGC_FUNC_CTRL3, 0x40, 215 /* Set the value of 'INLVTHD' register 0x2a/0x2c 216 to 0x7fe */ 217 AGC_DELAY0, 0x07, 218 AGC_DELAY2, 0xfe, 219 /* Change the value of IAGCBW[15:8] 220 of inner AGC loop filter bandwidth */ 221 AGC_LOOP_BANDWIDTH0, 0x08, 222 AGC_LOOP_BANDWIDTH1, 0x9a 223 }; 224 225 static u8 lgdt3303_init_data[] = { 226 0x4c, 0x14 227 }; 228 229 static u8 flip_1_lgdt3303_init_data[] = { 230 0x4c, 0x14, 231 0x87, 0xf3 232 }; 233 234 static u8 flip_2_lgdt3303_init_data[] = { 235 0x4c, 0x14, 236 0x87, 0xda 237 }; 238 239 struct lgdt330x_state* state = fe->demodulator_priv; 240 char *chip_name; 241 int err; 242 243 switch (state->config->demod_chip) { 244 case LGDT3302: 245 chip_name = "LGDT3302"; 246 err = i2c_write_demod_bytes(state, lgdt3302_init_data, 247 sizeof(lgdt3302_init_data)); 248 break; 249 case LGDT3303: 250 chip_name = "LGDT3303"; 251 switch (state->config->clock_polarity_flip) { 252 case 2: 253 err = i2c_write_demod_bytes(state, 254 flip_2_lgdt3303_init_data, 255 sizeof(flip_2_lgdt3303_init_data)); 256 break; 257 case 1: 258 err = i2c_write_demod_bytes(state, 259 flip_1_lgdt3303_init_data, 260 sizeof(flip_1_lgdt3303_init_data)); 261 break; 262 case 0: 263 default: 264 err = i2c_write_demod_bytes(state, lgdt3303_init_data, 265 sizeof(lgdt3303_init_data)); 266 } 267 break; 268 default: 269 chip_name = "undefined"; 270 printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n"); 271 err = -ENODEV; 272 } 273 dprintk("%s entered as %s\n", __func__, chip_name); 274 if (err < 0) 275 return err; 276 return lgdt330x_SwReset(state); 277} 278 279static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber) 280{ 281 *ber = 0; /* Not supplied by the demod chips */ 282 return 0; 283} 284 285static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) 286{ 287 struct lgdt330x_state* state = fe->demodulator_priv; 288 int err; 289 u8 buf[2]; 290 291 switch (state->config->demod_chip) { 292 case LGDT3302: 293 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1, 294 buf, sizeof(buf)); 295 break; 296 case LGDT3303: 297 err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1, 298 buf, sizeof(buf)); 299 break; 300 default: 301 printk(KERN_WARNING 302 "Only LGDT3302 and LGDT3303 are supported chips.\n"); 303 err = -ENODEV; 304 } 305 306 *ucblocks = (buf[0] << 8) | buf[1]; 307 return 0; 308} 309 310static int lgdt330x_set_parameters(struct dvb_frontend* fe, 311 struct dvb_frontend_parameters *param) 312{ 313 /* 314 * Array of byte pairs <address, value> 315 * to initialize 8VSB for lgdt3303 chip 50 MHz IF 316 */ 317 static u8 lgdt3303_8vsb_44_data[] = { 318 0x04, 0x00, 319 0x0d, 0x40, 320 0x0e, 0x87, 321 0x0f, 0x8e, 322 0x10, 0x01, 323 0x47, 0x8b }; 324 325 /* 326 * Array of byte pairs <address, value> 327 * to initialize QAM for lgdt3303 chip 328 */ 329 static u8 lgdt3303_qam_data[] = { 330 0x04, 0x00, 331 0x0d, 0x00, 332 0x0e, 0x00, 333 0x0f, 0x00, 334 0x10, 0x00, 335 0x51, 0x63, 336 0x47, 0x66, 337 0x48, 0x66, 338 0x4d, 0x1a, 339 0x49, 0x08, 340 0x4a, 0x9b }; 341 342 struct lgdt330x_state* state = fe->demodulator_priv; 343 344 static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 }; 345 346 int err; 347 /* Change only if we are actually changing the modulation */ 348 if (state->current_modulation != param->u.vsb.modulation) { 349 switch(param->u.vsb.modulation) { 350 case VSB_8: 351 dprintk("%s: VSB_8 MODE\n", __func__); 352 353 /* Select VSB mode */ 354 top_ctrl_cfg[1] = 0x03; 355 356 /* Select ANT connector if supported by card */ 357 if (state->config->pll_rf_set) 358 state->config->pll_rf_set(fe, 1); 359 360 if (state->config->demod_chip == LGDT3303) { 361 err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data, 362 sizeof(lgdt3303_8vsb_44_data)); 363 } 364 break; 365 366 case QAM_64: 367 dprintk("%s: QAM_64 MODE\n", __func__); 368 369 /* Select QAM_64 mode */ 370 top_ctrl_cfg[1] = 0x00; 371 372 /* Select CABLE connector if supported by card */ 373 if (state->config->pll_rf_set) 374 state->config->pll_rf_set(fe, 0); 375 376 if (state->config->demod_chip == LGDT3303) { 377 err = i2c_write_demod_bytes(state, lgdt3303_qam_data, 378 sizeof(lgdt3303_qam_data)); 379 } 380 break; 381 382 case QAM_256: 383 dprintk("%s: QAM_256 MODE\n", __func__); 384 385 /* Select QAM_256 mode */ 386 top_ctrl_cfg[1] = 0x01; 387 388 /* Select CABLE connector if supported by card */ 389 if (state->config->pll_rf_set) 390 state->config->pll_rf_set(fe, 0); 391 392 if (state->config->demod_chip == LGDT3303) { 393 err = i2c_write_demod_bytes(state, lgdt3303_qam_data, 394 sizeof(lgdt3303_qam_data)); 395 } 396 break; 397 default: 398 printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __func__, param->u.vsb.modulation); 399 return -1; 400 } 401 /* 402 * select serial or parallel MPEG harware interface 403 * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303 404 * Parallel: 0x00 405 */ 406 top_ctrl_cfg[1] |= state->config->serial_mpeg; 407 408 /* Select the requested mode */ 409 i2c_write_demod_bytes(state, top_ctrl_cfg, 410 sizeof(top_ctrl_cfg)); 411 if (state->config->set_ts_params) 412 state->config->set_ts_params(fe, 0); 413 state->current_modulation = param->u.vsb.modulation; 414 } 415 416 /* Tune to the specified frequency */ 417 if (fe->ops.tuner_ops.set_params) { 418 fe->ops.tuner_ops.set_params(fe, param); 419 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 420 } 421 422 /* Keep track of the new frequency */ 423 /* The tuner is shared with the video4linux analog API */ 424 state->current_frequency = param->frequency; 425 426 lgdt330x_SwReset(state); 427 return 0; 428} 429 430static int lgdt330x_get_frontend(struct dvb_frontend* fe, 431 struct dvb_frontend_parameters* param) 432{ 433 struct lgdt330x_state *state = fe->demodulator_priv; 434 param->frequency = state->current_frequency; 435 return 0; 436} 437 438static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status) 439{ 440 struct lgdt330x_state* state = fe->demodulator_priv; 441 u8 buf[3]; 442 443 *status = 0; /* Reset status result */ 444 445 /* AGC status register */ 446 i2c_read_demod_bytes(state, AGC_STATUS, buf, 1); 447 dprintk("%s: AGC_STATUS = 0x%02x\n", __func__, buf[0]); 448 if ((buf[0] & 0x0c) == 0x8){ 449 /* Test signal does not exist flag */ 450 /* as well as the AGC lock flag. */ 451 *status |= FE_HAS_SIGNAL; 452 } 453 454 /* 455 * You must set the Mask bits to 1 in the IRQ_MASK in order 456 * to see that status bit in the IRQ_STATUS register. 457 * This is done in SwReset(); 458 */ 459 /* signal status */ 460 i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf)); 461 dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __func__, buf[0], buf[1], buf[2]); 462 463 464 /* sync status */ 465 if ((buf[2] & 0x03) == 0x01) { 466 *status |= FE_HAS_SYNC; 467 } 468 469 /* FEC error status */ 470 if ((buf[2] & 0x0c) == 0x08) { 471 *status |= FE_HAS_LOCK; 472 *status |= FE_HAS_VITERBI; 473 } 474 475 /* Carrier Recovery Lock Status Register */ 476 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1); 477 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __func__, buf[0]); 478 switch (state->current_modulation) { 479 case QAM_256: 480 case QAM_64: 481 /* Need to understand why there are 3 lock levels here */ 482 if ((buf[0] & 0x07) == 0x07) 483 *status |= FE_HAS_CARRIER; 484 break; 485 case VSB_8: 486 if ((buf[0] & 0x80) == 0x80) 487 *status |= FE_HAS_CARRIER; 488 break; 489 default: 490 printk(KERN_WARNING "lgdt330x: %s: Modulation set to unsupported value\n", __func__); 491 } 492 493 return 0; 494} 495 496static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status) 497{ 498 struct lgdt330x_state* state = fe->demodulator_priv; 499 int err; 500 u8 buf[3]; 501 502 *status = 0; /* Reset status result */ 503 504 /* lgdt3303 AGC status register */ 505 err = i2c_read_demod_bytes(state, 0x58, buf, 1); 506 if (err < 0) 507 return err; 508 509 dprintk("%s: AGC_STATUS = 0x%02x\n", __func__, buf[0]); 510 if ((buf[0] & 0x21) == 0x01){ 511 /* Test input signal does not exist flag */ 512 /* as well as the AGC lock flag. */ 513 *status |= FE_HAS_SIGNAL; 514 } 515 516 /* Carrier Recovery Lock Status Register */ 517 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1); 518 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __func__, buf[0]); 519 switch (state->current_modulation) { 520 case QAM_256: 521 case QAM_64: 522 /* Need to understand why there are 3 lock levels here */ 523 if ((buf[0] & 0x07) == 0x07) 524 *status |= FE_HAS_CARRIER; 525 else 526 break; 527 i2c_read_demod_bytes(state, 0x8a, buf, 1); 528 if ((buf[0] & 0x04) == 0x04) 529 *status |= FE_HAS_SYNC; 530 if ((buf[0] & 0x01) == 0x01) 531 *status |= FE_HAS_LOCK; 532 if ((buf[0] & 0x08) == 0x08) 533 *status |= FE_HAS_VITERBI; 534 break; 535 case VSB_8: 536 if ((buf[0] & 0x80) == 0x80) 537 *status |= FE_HAS_CARRIER; 538 else 539 break; 540 i2c_read_demod_bytes(state, 0x38, buf, 1); 541 if ((buf[0] & 0x02) == 0x00) 542 *status |= FE_HAS_SYNC; 543 if ((buf[0] & 0x01) == 0x01) { 544 *status |= FE_HAS_LOCK; 545 *status |= FE_HAS_VITERBI; 546 } 547 break; 548 default: 549 printk(KERN_WARNING "lgdt330x: %s: Modulation set to unsupported value\n", __func__); 550 } 551 return 0; 552} 553 554/* Calculate SNR estimation (scaled by 2^24) 555 556 8-VSB SNR equations from LGDT3302 and LGDT3303 datasheets, QAM 557 equations from LGDT3303 datasheet. VSB is the same between the '02 558 and '03, so maybe QAM is too? Perhaps someone with a newer datasheet 559 that has QAM information could verify? 560 561 For 8-VSB: (two ways, take your pick) 562 LGDT3302: 563 SNR_EQ = 10 * log10(25 * 24^2 / EQ_MSE) 564 LGDT3303: 565 SNR_EQ = 10 * log10(25 * 32^2 / EQ_MSE) 566 LGDT3302 & LGDT3303: 567 SNR_PT = 10 * log10(25 * 32^2 / PT_MSE) (we use this one) 568 For 64-QAM: 569 SNR = 10 * log10( 688128 / MSEQAM) 570 For 256-QAM: 571 SNR = 10 * log10( 696320 / MSEQAM) 572 573 We re-write the snr equation as: 574 SNR * 2^24 = 10*(c - intlog10(MSE)) 575 Where for 256-QAM, c = log10(696320) * 2^24, and so on. */ 576 577static u32 calculate_snr(u32 mse, u32 c) 578{ 579 if (mse == 0) /* No signal */ 580 return 0; 581 582 mse = intlog10(mse); 583 if (mse > c) { 584 /* Negative SNR, which is possible, but realisticly the 585 demod will lose lock before the signal gets this bad. The 586 API only allows for unsigned values, so just return 0 */ 587 return 0; 588 } 589 return 10*(c - mse); 590} 591 592static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr) 593{ 594 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv; 595 u8 buf[5]; /* read data buffer */ 596 u32 noise; /* noise value */ 597 u32 c; /* per-modulation SNR calculation constant */ 598 599 switch(state->current_modulation) { 600 case VSB_8: 601 i2c_read_demod_bytes(state, LGDT3302_EQPH_ERR0, buf, 5); 602#ifdef USE_EQMSE 603 /* Use Equalizer Mean-Square Error Register */ 604 /* SNR for ranges from -15.61 to +41.58 */ 605 noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2]; 606 c = 69765745; /* log10(25*24^2)*2^24 */ 607#else 608 /* Use Phase Tracker Mean-Square Error Register */ 609 /* SNR for ranges from -13.11 to +44.08 */ 610 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4]; 611 c = 73957994; /* log10(25*32^2)*2^24 */ 612#endif 613 break; 614 case QAM_64: 615 case QAM_256: 616 i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2); 617 noise = ((buf[0] & 3) << 8) | buf[1]; 618 c = state->current_modulation == QAM_64 ? 97939837 : 98026066; 619 /* log10(688128)*2^24 and log10(696320)*2^24 */ 620 break; 621 default: 622 printk(KERN_ERR "lgdt330x: %s: Modulation set to unsupported value\n", 623 __func__); 624 return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */ 625 } 626 627 state->snr = calculate_snr(noise, c); 628 *snr = (state->snr) >> 16; /* Convert from 8.24 fixed-point to 8.8 */ 629 630 dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __func__, noise, 631 state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16); 632 633 return 0; 634} 635 636static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr) 637{ 638 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv; 639 u8 buf[5]; /* read data buffer */ 640 u32 noise; /* noise value */ 641 u32 c; /* per-modulation SNR calculation constant */ 642 643 switch(state->current_modulation) { 644 case VSB_8: 645 i2c_read_demod_bytes(state, LGDT3303_EQPH_ERR0, buf, 5); 646#ifdef USE_EQMSE 647 /* Use Equalizer Mean-Square Error Register */ 648 /* SNR for ranges from -16.12 to +44.08 */ 649 noise = ((buf[0] & 0x78) << 13) | (buf[1] << 8) | buf[2]; 650 c = 73957994; /* log10(25*32^2)*2^24 */ 651#else 652 /* Use Phase Tracker Mean-Square Error Register */ 653 /* SNR for ranges from -13.11 to +44.08 */ 654 noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4]; 655 c = 73957994; /* log10(25*32^2)*2^24 */ 656#endif 657 break; 658 case QAM_64: 659 case QAM_256: 660 i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2); 661 noise = (buf[0] << 8) | buf[1]; 662 c = state->current_modulation == QAM_64 ? 97939837 : 98026066; 663 /* log10(688128)*2^24 and log10(696320)*2^24 */ 664 break; 665 default: 666 printk(KERN_ERR "lgdt330x: %s: Modulation set to unsupported value\n", 667 __func__); 668 return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */ 669 } 670 671 state->snr = calculate_snr(noise, c); 672 *snr = (state->snr) >> 16; /* Convert from 8.24 fixed-point to 8.8 */ 673 674 dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __func__, noise, 675 state->snr >> 24, (((state->snr >> 8) & 0xffff) * 100) >> 16); 676 677 return 0; 678} 679 680static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength) 681{ 682 /* Calculate Strength from SNR up to 35dB */ 683 /* Even though the SNR can go higher than 35dB, there is some comfort */ 684 /* factor in having a range of strong signals that can show at 100% */ 685 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv; 686 u16 snr; 687 int ret; 688 689 ret = fe->ops.read_snr(fe, &snr); 690 if (ret != 0) 691 return ret; 692 /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */ 693 /* scale the range 0 - 35*2^24 into 0 - 65535 */ 694 if (state->snr >= 8960 * 0x10000) 695 *strength = 0xffff; 696 else 697 *strength = state->snr / 8960; 698 699 return 0; 700} 701 702static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings) 703{ 704 /* I have no idea about this - it may not be needed */ 705 fe_tune_settings->min_delay_ms = 500; 706 fe_tune_settings->step_size = 0; 707 fe_tune_settings->max_drift = 0; 708 return 0; 709} 710 711static void lgdt330x_release(struct dvb_frontend* fe) 712{ 713 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv; 714 kfree(state); 715} 716 717static struct dvb_frontend_ops lgdt3302_ops; 718static struct dvb_frontend_ops lgdt3303_ops; 719 720struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config, 721 struct i2c_adapter* i2c) 722{ 723 struct lgdt330x_state* state = NULL; 724 u8 buf[1]; 725 726 /* Allocate memory for the internal state */ 727 state = kzalloc(sizeof(struct lgdt330x_state), GFP_KERNEL); 728 if (state == NULL) 729 goto error; 730 731 /* Setup the state */ 732 state->config = config; 733 state->i2c = i2c; 734 735 /* Create dvb_frontend */ 736 switch (config->demod_chip) { 737 case LGDT3302: 738 memcpy(&state->frontend.ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops)); 739 break; 740 case LGDT3303: 741 memcpy(&state->frontend.ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops)); 742 break; 743 default: 744 goto error; 745 } 746 state->frontend.demodulator_priv = state; 747 748 /* Verify communication with demod chip */ 749 if (i2c_read_demod_bytes(state, 2, buf, 1)) 750 goto error; 751 752 state->current_frequency = -1; 753 state->current_modulation = -1; 754 755 return &state->frontend; 756 757error: 758 kfree(state); 759 dprintk("%s: ERROR\n",__func__); 760 return NULL; 761} 762 763static struct dvb_frontend_ops lgdt3302_ops = { 764 .info = { 765 .name= "LG Electronics LGDT3302 VSB/QAM Frontend", 766 .type = FE_ATSC, 767 .frequency_min= 54000000, 768 .frequency_max= 858000000, 769 .frequency_stepsize= 62500, 770 .symbol_rate_min = 5056941, /* QAM 64 */ 771 .symbol_rate_max = 10762000, /* VSB 8 */ 772 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB 773 }, 774 .init = lgdt330x_init, 775 .set_frontend = lgdt330x_set_parameters, 776 .get_frontend = lgdt330x_get_frontend, 777 .get_tune_settings = lgdt330x_get_tune_settings, 778 .read_status = lgdt3302_read_status, 779 .read_ber = lgdt330x_read_ber, 780 .read_signal_strength = lgdt330x_read_signal_strength, 781 .read_snr = lgdt3302_read_snr, 782 .read_ucblocks = lgdt330x_read_ucblocks, 783 .release = lgdt330x_release, 784}; 785 786static struct dvb_frontend_ops lgdt3303_ops = { 787 .info = { 788 .name= "LG Electronics LGDT3303 VSB/QAM Frontend", 789 .type = FE_ATSC, 790 .frequency_min= 54000000, 791 .frequency_max= 858000000, 792 .frequency_stepsize= 62500, 793 .symbol_rate_min = 5056941, /* QAM 64 */ 794 .symbol_rate_max = 10762000, /* VSB 8 */ 795 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB 796 }, 797 .init = lgdt330x_init, 798 .set_frontend = lgdt330x_set_parameters, 799 .get_frontend = lgdt330x_get_frontend, 800 .get_tune_settings = lgdt330x_get_tune_settings, 801 .read_status = lgdt3303_read_status, 802 .read_ber = lgdt330x_read_ber, 803 .read_signal_strength = lgdt330x_read_signal_strength, 804 .read_snr = lgdt3303_read_snr, 805 .read_ucblocks = lgdt330x_read_ucblocks, 806 .release = lgdt330x_release, 807}; 808 809MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver"); 810MODULE_AUTHOR("Wilson Michaels"); 811MODULE_LICENSE("GPL"); 812 813EXPORT_SYMBOL(lgdt330x_attach); 814 815/* 816 * Local variables: 817 * c-basic-offset: 8 818 * End: 819 */ 820