1/* 2 * Copyright (C) 1995-1996 Linus Torvalds & authors (see below) 3 */ 4 5/* 6 * Original authors: abramov@cecmow.enet.dec.com (Igor Abramov) 7 * mlord@pobox.com (Mark Lord) 8 * 9 * See linux/MAINTAINERS for address of current maintainer. 10 * 11 * This file provides support for the advanced features and bugs 12 * of IDE interfaces using the CMD Technologies 0640 IDE interface chip. 13 * 14 * These chips are basically fucked by design, and getting this driver 15 * to work on every motherboard design that uses this screwed chip seems 16 * bloody well impossible. However, we're still trying. 17 * 18 * Version 0.97 worked for everybody. 19 * 20 * User feedback is essential. Many thanks to the beta test team: 21 * 22 * A.Hartgers@stud.tue.nl, JZDQC@CUNYVM.CUNY.edu, abramov@cecmow.enet.dec.com, 23 * bardj@utopia.ppp.sn.no, bart@gaga.tue.nl, bbol001@cs.auckland.ac.nz, 24 * chrisc@dbass.demon.co.uk, dalecki@namu26.Num.Math.Uni-Goettingen.de, 25 * derekn@vw.ece.cmu.edu, florian@btp2x3.phy.uni-bayreuth.de, 26 * flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net, 27 * j@pobox.com, jkemp1@mises.uni-paderborn.de, jtoppe@hiwaay.net, 28 * kerouac@ssnet.com, meskes@informatik.rwth-aachen.de, hzoli@cs.elte.hu, 29 * peter@udgaard.isgtec.com, phil@tazenda.demon.co.uk, roadcapw@cfw.com, 30 * s0033las@sun10.vsz.bme.hu, schaffer@tam.cornell.edu, sjd@slip.net, 31 * steve@ei.org, ulrpeg@bigcomm.gun.de, ism@tardis.ed.ac.uk, mack@cray.com 32 * liug@mama.indstate.edu, and others. 33 * 34 * Version 0.01 Initial version, hacked out of ide.c, 35 * and #include'd rather than compiled separately. 36 * This will get cleaned up in a subsequent release. 37 * 38 * Version 0.02 Fixes for vlb initialization code, enable prefetch 39 * for versions 'B' and 'C' of chip by default, 40 * some code cleanup. 41 * 42 * Version 0.03 Added reset of secondary interface, 43 * and black list for devices which are not compatible 44 * with prefetch mode. Separate function for setting 45 * prefetch is added, possibly it will be called some 46 * day from ioctl processing code. 47 * 48 * Version 0.04 Now configs/compiles separate from ide.c 49 * 50 * Version 0.05 Major rewrite of interface timing code. 51 * Added new function cmd640_set_mode to set PIO mode 52 * from ioctl call. New drives added to black list. 53 * 54 * Version 0.06 More code cleanup. Prefetch is enabled only for 55 * detected hard drives, not included in prefetch 56 * black list. 57 * 58 * Version 0.07 Changed to more conservative drive tuning policy. 59 * Unknown drives, which report PIO < 4 are set to 60 * (reported_PIO - 1) if it is supported, or to PIO0. 61 * List of known drives extended by info provided by 62 * CMD at their ftp site. 63 * 64 * Version 0.08 Added autotune/noautotune support. 65 * 66 * Version 0.09 Try to be smarter about 2nd port enabling. 67 * Version 0.10 Be nice and don't reset 2nd port. 68 * Version 0.11 Try to handle more weird situations. 69 * 70 * Version 0.12 Lots of bug fixes from Laszlo Peter 71 * irq unmasking disabled for reliability. 72 * try to be even smarter about the second port. 73 * tidy up source code formatting. 74 * Version 0.13 permit irq unmasking again. 75 * Version 0.90 massive code cleanup, some bugs fixed. 76 * defaults all drives to PIO mode0, prefetch off. 77 * autotune is OFF by default, with compile time flag. 78 * prefetch can be turned OFF/ON using "hdparm -p8/-p9" 79 * (requires hdparm-3.1 or newer) 80 * Version 0.91 first release to linux-kernel list. 81 * Version 0.92 move initial reg dump to separate callable function 82 * change "readahead" to "prefetch" to avoid confusion 83 * Version 0.95 respect original BIOS timings unless autotuning. 84 * tons of code cleanup and rearrangement. 85 * added CONFIG_BLK_DEV_CMD640_ENHANCED option 86 * prevent use of unmask when prefetch is on 87 * Version 0.96 prevent use of io_32bit when prefetch is off 88 * Version 0.97 fix VLB secondary interface for sjd@slip.net 89 * other minor tune-ups: 0.96 was very good. 90 * Version 0.98 ignore PCI version when disabled by BIOS 91 * Version 0.99 display setup/active/recovery clocks with PIO mode 92 * Version 1.00 Mmm.. cannot depend on PCMD_ENA in all systems 93 * Version 1.01 slow/fast devsel can be selected with "hdparm -p6/-p7" 94 * ("fast" is necessary for 32bit I/O in some systems) 95 * Version 1.02 fix bug that resulted in slow "setup times" 96 * (patch courtesy of Zoltan Hidvegi) 97 */ 98 99#define CMD640_PREFETCH_MASKS 1 100 101/*#define CMD640_DUMP_REGS */ 102 103#include <linux/types.h> 104#include <linux/kernel.h> 105#include <linux/delay.h> 106#include <linux/ide.h> 107#include <linux/init.h> 108 109#include <asm/io.h> 110 111#define DRV_NAME "cmd640" 112 113static int cmd640_vlb; 114 115/* 116 * CMD640 specific registers definition. 117 */ 118 119#define VID 0x00 120#define DID 0x02 121#define PCMD 0x04 122#define PCMD_ENA 0x01 123#define PSTTS 0x06 124#define REVID 0x08 125#define PROGIF 0x09 126#define SUBCL 0x0a 127#define BASCL 0x0b 128#define BaseA0 0x10 129#define BaseA1 0x14 130#define BaseA2 0x18 131#define BaseA3 0x1c 132#define INTLINE 0x3c 133#define INPINE 0x3d 134 135#define CFR 0x50 136#define CFR_DEVREV 0x03 137#define CFR_IDE01INTR 0x04 138#define CFR_DEVID 0x18 139#define CFR_AT_VESA_078h 0x20 140#define CFR_DSA1 0x40 141#define CFR_DSA0 0x80 142 143#define CNTRL 0x51 144#define CNTRL_DIS_RA0 0x40 145#define CNTRL_DIS_RA1 0x80 146#define CNTRL_ENA_2ND 0x08 147 148#define CMDTIM 0x52 149#define ARTTIM0 0x53 150#define DRWTIM0 0x54 151#define ARTTIM1 0x55 152#define DRWTIM1 0x56 153#define ARTTIM23 0x57 154#define ARTTIM23_DIS_RA2 0x04 155#define ARTTIM23_DIS_RA3 0x08 156#define ARTTIM23_IDE23INTR 0x10 157#define DRWTIM23 0x58 158#define BRST 0x59 159 160/* 161 * Registers and masks for easy access by drive index: 162 */ 163static u8 prefetch_regs[4] = {CNTRL, CNTRL, ARTTIM23, ARTTIM23}; 164static u8 prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, ARTTIM23_DIS_RA3}; 165 166#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED 167 168static u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23}; 169static u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM23, DRWTIM23}; 170 171/* 172 * Current cmd640 timing values for each drive. 173 * The defaults for each are the slowest possible timings. 174 */ 175static u8 setup_counts[4] = {4, 4, 4, 4}; /* Address setup count (in clocks) */ 176static u8 active_counts[4] = {16, 16, 16, 16}; /* Active count (encoded) */ 177static u8 recovery_counts[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */ 178 179#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ 180 181static DEFINE_SPINLOCK(cmd640_lock); 182 183/* 184 * Interface to access cmd640x registers 185 */ 186static unsigned int cmd640_key; 187static void (*__put_cmd640_reg)(u16 reg, u8 val); 188static u8 (*__get_cmd640_reg)(u16 reg); 189 190/* 191 * This is read from the CFR reg, and is used in several places. 192 */ 193static unsigned int cmd640_chip_version; 194 195/* 196 * The CMD640x chip does not support DWORD config write cycles, but some 197 * of the BIOSes use them to implement the config services. 198 * Therefore, we must use direct IO instead. 199 */ 200 201/* PCI method 1 access */ 202 203static void put_cmd640_reg_pci1(u16 reg, u8 val) 204{ 205 outl_p((reg & 0xfc) | cmd640_key, 0xcf8); 206 outb_p(val, (reg & 3) | 0xcfc); 207} 208 209static u8 get_cmd640_reg_pci1(u16 reg) 210{ 211 outl_p((reg & 0xfc) | cmd640_key, 0xcf8); 212 return inb_p((reg & 3) | 0xcfc); 213} 214 215/* PCI method 2 access (from CMD datasheet) */ 216 217static void put_cmd640_reg_pci2(u16 reg, u8 val) 218{ 219 outb_p(0x10, 0xcf8); 220 outb_p(val, cmd640_key + reg); 221 outb_p(0, 0xcf8); 222} 223 224static u8 get_cmd640_reg_pci2(u16 reg) 225{ 226 u8 b; 227 228 outb_p(0x10, 0xcf8); 229 b = inb_p(cmd640_key + reg); 230 outb_p(0, 0xcf8); 231 return b; 232} 233 234/* VLB access */ 235 236static void put_cmd640_reg_vlb(u16 reg, u8 val) 237{ 238 outb_p(reg, cmd640_key); 239 outb_p(val, cmd640_key + 4); 240} 241 242static u8 get_cmd640_reg_vlb(u16 reg) 243{ 244 outb_p(reg, cmd640_key); 245 return inb_p(cmd640_key + 4); 246} 247 248static u8 get_cmd640_reg(u16 reg) 249{ 250 unsigned long flags; 251 u8 b; 252 253 spin_lock_irqsave(&cmd640_lock, flags); 254 b = __get_cmd640_reg(reg); 255 spin_unlock_irqrestore(&cmd640_lock, flags); 256 return b; 257} 258 259static void put_cmd640_reg(u16 reg, u8 val) 260{ 261 unsigned long flags; 262 263 spin_lock_irqsave(&cmd640_lock, flags); 264 __put_cmd640_reg(reg, val); 265 spin_unlock_irqrestore(&cmd640_lock, flags); 266} 267 268static int __init match_pci_cmd640_device(void) 269{ 270 const u8 ven_dev[4] = {0x95, 0x10, 0x40, 0x06}; 271 unsigned int i; 272 for (i = 0; i < 4; i++) { 273 if (get_cmd640_reg(i) != ven_dev[i]) 274 return 0; 275 } 276#ifdef STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT 277 if ((get_cmd640_reg(PCMD) & PCMD_ENA) == 0) { 278 printk("ide: cmd640 on PCI disabled by BIOS\n"); 279 return 0; 280 } 281#endif /* STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT */ 282 return 1; /* success */ 283} 284 285/* 286 * Probe for CMD640x -- pci method 1 287 */ 288static int __init probe_for_cmd640_pci1(void) 289{ 290 __get_cmd640_reg = get_cmd640_reg_pci1; 291 __put_cmd640_reg = put_cmd640_reg_pci1; 292 for (cmd640_key = 0x80000000; 293 cmd640_key <= 0x8000f800; 294 cmd640_key += 0x800) { 295 if (match_pci_cmd640_device()) 296 return 1; /* success */ 297 } 298 return 0; 299} 300 301/* 302 * Probe for CMD640x -- pci method 2 303 */ 304static int __init probe_for_cmd640_pci2(void) 305{ 306 __get_cmd640_reg = get_cmd640_reg_pci2; 307 __put_cmd640_reg = put_cmd640_reg_pci2; 308 for (cmd640_key = 0xc000; cmd640_key <= 0xcf00; cmd640_key += 0x100) { 309 if (match_pci_cmd640_device()) 310 return 1; /* success */ 311 } 312 return 0; 313} 314 315/* 316 * Probe for CMD640x -- vlb 317 */ 318static int __init probe_for_cmd640_vlb(void) 319{ 320 u8 b; 321 322 __get_cmd640_reg = get_cmd640_reg_vlb; 323 __put_cmd640_reg = put_cmd640_reg_vlb; 324 cmd640_key = 0x178; 325 b = get_cmd640_reg(CFR); 326 if (b == 0xff || b == 0x00 || (b & CFR_AT_VESA_078h)) { 327 cmd640_key = 0x78; 328 b = get_cmd640_reg(CFR); 329 if (b == 0xff || b == 0x00 || !(b & CFR_AT_VESA_078h)) 330 return 0; 331 } 332 return 1; /* success */ 333} 334 335/* 336 * Returns 1 if an IDE interface/drive exists at 0x170, 337 * Returns 0 otherwise. 338 */ 339static int __init secondary_port_responding(void) 340{ 341 unsigned long flags; 342 343 spin_lock_irqsave(&cmd640_lock, flags); 344 345 outb_p(0x0a, 0x176); /* select drive0 */ 346 udelay(100); 347 if ((inb_p(0x176) & 0x1f) != 0x0a) { 348 outb_p(0x1a, 0x176); /* select drive1 */ 349 udelay(100); 350 if ((inb_p(0x176) & 0x1f) != 0x1a) { 351 spin_unlock_irqrestore(&cmd640_lock, flags); 352 return 0; /* nothing responded */ 353 } 354 } 355 spin_unlock_irqrestore(&cmd640_lock, flags); 356 return 1; /* success */ 357} 358 359#ifdef CMD640_DUMP_REGS 360/* 361 * Dump out all cmd640 registers. May be called from ide.c 362 */ 363static void cmd640_dump_regs(void) 364{ 365 unsigned int reg = cmd640_vlb ? 0x50 : 0x00; 366 367 /* Dump current state of chip registers */ 368 printk("ide: cmd640 internal register dump:"); 369 for (; reg <= 0x59; reg++) { 370 if (!(reg & 0x0f)) 371 printk("\n%04x:", reg); 372 printk(" %02x", get_cmd640_reg(reg)); 373 } 374 printk("\n"); 375} 376#endif 377 378static void __set_prefetch_mode(ide_drive_t *drive, int mode) 379{ 380 if (mode) { /* want prefetch on? */ 381#if CMD640_PREFETCH_MASKS 382 drive->dev_flags |= IDE_DFLAG_NO_UNMASK; 383 drive->dev_flags &= ~IDE_DFLAG_UNMASK; 384#endif 385 drive->dev_flags &= ~IDE_DFLAG_NO_IO_32BIT; 386 } else { 387 drive->dev_flags &= ~IDE_DFLAG_NO_UNMASK; 388 drive->dev_flags |= IDE_DFLAG_NO_IO_32BIT; 389 drive->io_32bit = 0; 390 } 391} 392 393#ifndef CONFIG_BLK_DEV_CMD640_ENHANCED 394/* 395 * Check whether prefetch is on for a drive, 396 * and initialize the unmask flags for safe operation. 397 */ 398static void __init check_prefetch(ide_drive_t *drive, unsigned int index) 399{ 400 u8 b = get_cmd640_reg(prefetch_regs[index]); 401 402 __set_prefetch_mode(drive, (b & prefetch_masks[index]) ? 0 : 1); 403} 404#else 405 406/* 407 * Sets prefetch mode for a drive. 408 */ 409static void set_prefetch_mode(ide_drive_t *drive, unsigned int index, int mode) 410{ 411 unsigned long flags; 412 int reg = prefetch_regs[index]; 413 u8 b; 414 415 spin_lock_irqsave(&cmd640_lock, flags); 416 b = __get_cmd640_reg(reg); 417 __set_prefetch_mode(drive, mode); 418 if (mode) 419 b &= ~prefetch_masks[index]; /* enable prefetch */ 420 else 421 b |= prefetch_masks[index]; /* disable prefetch */ 422 __put_cmd640_reg(reg, b); 423 spin_unlock_irqrestore(&cmd640_lock, flags); 424} 425 426/* 427 * Dump out current drive clocks settings 428 */ 429static void display_clocks(unsigned int index) 430{ 431 u8 active_count, recovery_count; 432 433 active_count = active_counts[index]; 434 if (active_count == 1) 435 ++active_count; 436 recovery_count = recovery_counts[index]; 437 if (active_count > 3 && recovery_count == 1) 438 ++recovery_count; 439 if (cmd640_chip_version > 1) 440 recovery_count += 1; /* cmd640b uses (count + 1)*/ 441 printk(", clocks=%d/%d/%d\n", setup_counts[index], active_count, recovery_count); 442} 443 444/* 445 * Pack active and recovery counts into single byte representation 446 * used by controller 447 */ 448static inline u8 pack_nibbles(u8 upper, u8 lower) 449{ 450 return ((upper & 0x0f) << 4) | (lower & 0x0f); 451} 452 453/* 454 * This routine writes the prepared setup/active/recovery counts 455 * for a drive into the cmd640 chipset registers to active them. 456 */ 457static void program_drive_counts(ide_drive_t *drive, unsigned int index) 458{ 459 unsigned long flags; 460 u8 setup_count = setup_counts[index]; 461 u8 active_count = active_counts[index]; 462 u8 recovery_count = recovery_counts[index]; 463 464 /* 465 * Set up address setup count and drive read/write timing registers. 466 * Primary interface has individual count/timing registers for 467 * each drive. Secondary interface has one common set of registers, 468 * so we merge the timings, using the slowest value for each timing. 469 */ 470 if (index > 1) { 471 ide_drive_t *peer = ide_get_pair_dev(drive); 472 unsigned int mate = index ^ 1; 473 474 if (peer) { 475 if (setup_count < setup_counts[mate]) 476 setup_count = setup_counts[mate]; 477 if (active_count < active_counts[mate]) 478 active_count = active_counts[mate]; 479 if (recovery_count < recovery_counts[mate]) 480 recovery_count = recovery_counts[mate]; 481 } 482 } 483 484 /* 485 * Convert setup_count to internal chipset representation 486 */ 487 switch (setup_count) { 488 case 4: setup_count = 0x00; break; 489 case 3: setup_count = 0x80; break; 490 case 1: 491 case 2: setup_count = 0x40; break; 492 default: setup_count = 0xc0; /* case 5 */ 493 } 494 495 /* 496 * Now that everything is ready, program the new timings 497 */ 498 spin_lock_irqsave(&cmd640_lock, flags); 499 /* 500 * Program the address_setup clocks into ARTTIM reg, 501 * and then the active/recovery counts into the DRWTIM reg 502 * (this converts counts of 16 into counts of zero -- okay). 503 */ 504 setup_count |= __get_cmd640_reg(arttim_regs[index]) & 0x3f; 505 __put_cmd640_reg(arttim_regs[index], setup_count); 506 __put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count)); 507 spin_unlock_irqrestore(&cmd640_lock, flags); 508} 509 510/* 511 * Set a specific pio_mode for a drive 512 */ 513static void cmd640_set_mode(ide_drive_t *drive, unsigned int index, 514 u8 pio_mode, unsigned int cycle_time) 515{ 516 struct ide_timing *t; 517 int setup_time, active_time, recovery_time, clock_time; 518 u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count; 519 int bus_speed; 520 521 if (cmd640_vlb) 522 bus_speed = ide_vlb_clk ? ide_vlb_clk : 50; 523 else 524 bus_speed = ide_pci_clk ? ide_pci_clk : 33; 525 526 if (pio_mode > 5) 527 pio_mode = 5; 528 529 t = ide_timing_find_mode(XFER_PIO_0 + pio_mode); 530 setup_time = t->setup; 531 active_time = t->active; 532 533 recovery_time = cycle_time - (setup_time + active_time); 534 clock_time = 1000 / bus_speed; 535 cycle_count = DIV_ROUND_UP(cycle_time, clock_time); 536 537 setup_count = DIV_ROUND_UP(setup_time, clock_time); 538 539 active_count = DIV_ROUND_UP(active_time, clock_time); 540 if (active_count < 2) 541 active_count = 2; /* minimum allowed by cmd640 */ 542 543 recovery_count = DIV_ROUND_UP(recovery_time, clock_time); 544 recovery_count2 = cycle_count - (setup_count + active_count); 545 if (recovery_count2 > recovery_count) 546 recovery_count = recovery_count2; 547 if (recovery_count < 2) 548 recovery_count = 2; /* minimum allowed by cmd640 */ 549 if (recovery_count > 17) { 550 active_count += recovery_count - 17; 551 recovery_count = 17; 552 } 553 if (active_count > 16) 554 active_count = 16; /* maximum allowed by cmd640 */ 555 if (cmd640_chip_version > 1) 556 recovery_count -= 1; /* cmd640b uses (count + 1)*/ 557 if (recovery_count > 16) 558 recovery_count = 16; /* maximum allowed by cmd640 */ 559 560 setup_counts[index] = setup_count; 561 active_counts[index] = active_count; 562 recovery_counts[index] = recovery_count; 563 564 /* 565 * In a perfect world, we might set the drive pio mode here 566 * (using WIN_SETFEATURE) before continuing. 567 * 568 * But we do not, because: 569 * 1) this is the wrong place to do it (proper is do_special() in ide.c) 570 * 2) in practice this is rarely, if ever, necessary 571 */ 572 program_drive_counts(drive, index); 573} 574 575static void cmd640_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) 576{ 577 unsigned int index = 0, cycle_time; 578 const u8 pio = drive->pio_mode - XFER_PIO_0; 579 u8 b; 580 581 switch (pio) { 582 case 6: /* set fast-devsel off */ 583 case 7: /* set fast-devsel on */ 584 b = get_cmd640_reg(CNTRL) & ~0x27; 585 if (pio & 1) 586 b |= 0x27; 587 put_cmd640_reg(CNTRL, b); 588 printk("%s: %sabled cmd640 fast host timing (devsel)\n", 589 drive->name, (pio & 1) ? "en" : "dis"); 590 return; 591 case 8: /* set prefetch off */ 592 case 9: /* set prefetch on */ 593 set_prefetch_mode(drive, index, pio & 1); 594 printk("%s: %sabled cmd640 prefetch\n", 595 drive->name, (pio & 1) ? "en" : "dis"); 596 return; 597 } 598 599 cycle_time = ide_pio_cycle_time(drive, pio); 600 cmd640_set_mode(drive, index, pio, cycle_time); 601 602 printk("%s: selected cmd640 PIO mode%d (%dns)", 603 drive->name, pio, cycle_time); 604 605 display_clocks(index); 606} 607#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ 608 609static void __init cmd640_init_dev(ide_drive_t *drive) 610{ 611 unsigned int i = drive->hwif->channel * 2 + (drive->dn & 1); 612 613#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED 614 /* 615 * Reset timing to the slowest speed and turn off prefetch. 616 * This way, the drive identify code has a better chance. 617 */ 618 setup_counts[i] = 4; /* max possible */ 619 active_counts[i] = 16; /* max possible */ 620 recovery_counts[i] = 16; /* max possible */ 621 program_drive_counts(drive, i); 622 set_prefetch_mode(drive, i, 0); 623 printk(KERN_INFO DRV_NAME ": drive%d timings/prefetch cleared\n", i); 624#else 625 /* 626 * Set the drive unmask flags to match the prefetch setting. 627 */ 628 check_prefetch(drive, i); 629 printk(KERN_INFO DRV_NAME ": drive%d timings/prefetch(%s) preserved\n", 630 i, (drive->dev_flags & IDE_DFLAG_NO_IO_32BIT) ? "off" : "on"); 631#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ 632} 633 634static int cmd640_test_irq(ide_hwif_t *hwif) 635{ 636 int irq_reg = hwif->channel ? ARTTIM23 : CFR; 637 u8 irq_mask = hwif->channel ? ARTTIM23_IDE23INTR : 638 CFR_IDE01INTR; 639 u8 irq_stat = get_cmd640_reg(irq_reg); 640 641 return (irq_stat & irq_mask) ? 1 : 0; 642} 643 644static const struct ide_port_ops cmd640_port_ops = { 645 .init_dev = cmd640_init_dev, 646#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED 647 .set_pio_mode = cmd640_set_pio_mode, 648#endif 649 .test_irq = cmd640_test_irq, 650}; 651 652static int pci_conf1(void) 653{ 654 unsigned long flags; 655 u32 tmp; 656 657 spin_lock_irqsave(&cmd640_lock, flags); 658 outb(0x01, 0xCFB); 659 tmp = inl(0xCF8); 660 outl(0x80000000, 0xCF8); 661 if (inl(0xCF8) == 0x80000000) { 662 outl(tmp, 0xCF8); 663 spin_unlock_irqrestore(&cmd640_lock, flags); 664 return 1; 665 } 666 outl(tmp, 0xCF8); 667 spin_unlock_irqrestore(&cmd640_lock, flags); 668 return 0; 669} 670 671static int pci_conf2(void) 672{ 673 unsigned long flags; 674 675 spin_lock_irqsave(&cmd640_lock, flags); 676 outb(0x00, 0xCFB); 677 outb(0x00, 0xCF8); 678 outb(0x00, 0xCFA); 679 if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) { 680 spin_unlock_irqrestore(&cmd640_lock, flags); 681 return 1; 682 } 683 spin_unlock_irqrestore(&cmd640_lock, flags); 684 return 0; 685} 686 687static const struct ide_port_info cmd640_port_info __initdata = { 688 .chipset = ide_cmd640, 689 .host_flags = IDE_HFLAG_SERIALIZE | 690 IDE_HFLAG_NO_DMA | 691 IDE_HFLAG_ABUSE_PREFETCH | 692 IDE_HFLAG_ABUSE_FAST_DEVSEL, 693 .port_ops = &cmd640_port_ops, 694 .pio_mask = ATA_PIO5, 695}; 696 697static int cmd640x_init_one(unsigned long base, unsigned long ctl) 698{ 699 if (!request_region(base, 8, DRV_NAME)) { 700 printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX not free.\n", 701 DRV_NAME, base, base + 7); 702 return -EBUSY; 703 } 704 705 if (!request_region(ctl, 1, DRV_NAME)) { 706 printk(KERN_ERR "%s: I/O resource 0x%lX not free.\n", 707 DRV_NAME, ctl); 708 release_region(base, 8); 709 return -EBUSY; 710 } 711 712 return 0; 713} 714 715/* 716 * Probe for a cmd640 chipset, and initialize it if found. 717 */ 718static int __init cmd640x_init(void) 719{ 720 int second_port_cmd640 = 0, rc; 721 const char *bus_type, *port2; 722 u8 b, cfr; 723 struct ide_hw hw[2], *hws[2]; 724 725 if (cmd640_vlb && probe_for_cmd640_vlb()) { 726 bus_type = "VLB"; 727 } else { 728 cmd640_vlb = 0; 729 /* Find out what kind of PCI probing is supported otherwise 730 Justin Gibbs will sulk.. */ 731 if (pci_conf1() && probe_for_cmd640_pci1()) 732 bus_type = "PCI (type1)"; 733 else if (pci_conf2() && probe_for_cmd640_pci2()) 734 bus_type = "PCI (type2)"; 735 else 736 return 0; 737 } 738 /* 739 * Undocumented magic (there is no 0x5b reg in specs) 740 */ 741 put_cmd640_reg(0x5b, 0xbd); 742 if (get_cmd640_reg(0x5b) != 0xbd) { 743 printk(KERN_ERR "ide: cmd640 init failed: wrong value in reg 0x5b\n"); 744 return 0; 745 } 746 put_cmd640_reg(0x5b, 0); 747 748#ifdef CMD640_DUMP_REGS 749 cmd640_dump_regs(); 750#endif 751 752 /* 753 * Documented magic begins here 754 */ 755 cfr = get_cmd640_reg(CFR); 756 cmd640_chip_version = cfr & CFR_DEVREV; 757 if (cmd640_chip_version == 0) { 758 printk("ide: bad cmd640 revision: %d\n", cmd640_chip_version); 759 return 0; 760 } 761 762 rc = cmd640x_init_one(0x1f0, 0x3f6); 763 if (rc) 764 return rc; 765 766 rc = cmd640x_init_one(0x170, 0x376); 767 if (rc) { 768 release_region(0x3f6, 1); 769 release_region(0x1f0, 8); 770 return rc; 771 } 772 773 memset(&hw, 0, sizeof(hw)); 774 775 ide_std_init_ports(&hw[0], 0x1f0, 0x3f6); 776 hw[0].irq = 14; 777 778 ide_std_init_ports(&hw[1], 0x170, 0x376); 779 hw[1].irq = 15; 780 781 printk(KERN_INFO "cmd640: buggy cmd640%c interface on %s, config=0x%02x" 782 "\n", 'a' + cmd640_chip_version - 1, bus_type, cfr); 783 784 /* 785 * Initialize data for primary port 786 */ 787 hws[0] = &hw[0]; 788 789 /* 790 * Ensure compatibility by always using the slowest timings 791 * for access to the drive's command register block, 792 * and reset the prefetch burstsize to default (512 bytes). 793 * 794 * Maybe we need a way to NOT do these on *some* systems? 795 */ 796 put_cmd640_reg(CMDTIM, 0); 797 put_cmd640_reg(BRST, 0x40); 798 799 b = get_cmd640_reg(CNTRL); 800 801 /* 802 * Try to enable the secondary interface, if not already enabled 803 */ 804 if (secondary_port_responding()) { 805 if ((b & CNTRL_ENA_2ND)) { 806 second_port_cmd640 = 1; 807 port2 = "okay"; 808 } else if (cmd640_vlb) { 809 second_port_cmd640 = 1; 810 port2 = "alive"; 811 } else 812 port2 = "not cmd640"; 813 } else { 814 put_cmd640_reg(CNTRL, b ^ CNTRL_ENA_2ND); /* toggle the bit */ 815 if (secondary_port_responding()) { 816 second_port_cmd640 = 1; 817 port2 = "enabled"; 818 } else { 819 put_cmd640_reg(CNTRL, b); /* restore original setting */ 820 port2 = "not responding"; 821 } 822 } 823 824 /* 825 * Initialize data for secondary cmd640 port, if enabled 826 */ 827 if (second_port_cmd640) 828 hws[1] = &hw[1]; 829 830 printk(KERN_INFO "cmd640: %sserialized, secondary interface %s\n", 831 second_port_cmd640 ? "" : "not ", port2); 832 833#ifdef CMD640_DUMP_REGS 834 cmd640_dump_regs(); 835#endif 836 837 return ide_host_add(&cmd640_port_info, hws, second_port_cmd640 ? 2 : 1, 838 NULL); 839} 840 841module_param_named(probe_vlb, cmd640_vlb, bool, 0); 842MODULE_PARM_DESC(probe_vlb, "probe for VLB version of CMD640 chipset"); 843 844module_init(cmd640x_init); 845 846MODULE_LICENSE("GPL"); 847