1# 2# DMA engine configuration 3# 4 5menuconfig DMADEVICES 6 bool "DMA Engine support" 7 depends on HAS_DMA 8 help 9 DMA engines can do asynchronous data transfers without 10 involving the host CPU. Currently, this framework can be 11 used to offload memory copies in the network stack and 12 RAID operations in the MD driver. This menu only presents 13 DMA Device drivers supported by the configured arch, it may 14 be empty in some cases. 15 16config DMADEVICES_DEBUG 17 bool "DMA Engine debugging" 18 depends on DMADEVICES != n 19 help 20 This is an option for use by developers; most people should 21 say N here. This enables DMA engine core and driver debugging. 22 23config DMADEVICES_VDEBUG 24 bool "DMA Engine verbose debugging" 25 depends on DMADEVICES_DEBUG != n 26 help 27 This is an option for use by developers; most people should 28 say N here. This enables deeper (more verbose) debugging of 29 the DMA engine core and drivers. 30 31 32if DMADEVICES 33 34comment "DMA Devices" 35 36config INTEL_MID_DMAC 37 tristate "Intel MID DMA support for Peripheral DMA controllers" 38 depends on PCI && X86 39 select DMA_ENGINE 40 default n 41 help 42 Enable support for the Intel(R) MID DMA engine present 43 in Intel MID chipsets. 44 45 Say Y here if you have such a chipset. 46 47 If unsure, say N. 48 49config ASYNC_TX_DISABLE_CHANNEL_SWITCH 50 bool 51 52config INTEL_IOATDMA 53 tristate "Intel I/OAT DMA support" 54 depends on PCI && X86 55 select DMA_ENGINE 56 select DCA 57 select ASYNC_TX_DISABLE_CHANNEL_SWITCH 58 select ASYNC_TX_DISABLE_PQ_VAL_DMA 59 select ASYNC_TX_DISABLE_XOR_VAL_DMA 60 help 61 Enable support for the Intel(R) I/OAT DMA engine present 62 in recent Intel Xeon chipsets. 63 64 Say Y here if you have such a chipset. 65 66 If unsure, say N. 67 68config INTEL_IOP_ADMA 69 tristate "Intel IOP ADMA support" 70 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX 71 select DMA_ENGINE 72 help 73 Enable support for the Intel(R) IOP Series RAID engines. 74 75config DW_DMAC 76 tristate "Synopsys DesignWare AHB DMA support" 77 depends on AVR32 78 select DMA_ENGINE 79 default y if CPU_AT32AP7000 80 help 81 Support the Synopsys DesignWare AHB DMA controller. This 82 can be integrated in chips such as the Atmel AT32ap7000. 83 84config AT_HDMAC 85 tristate "Atmel AHB DMA support" 86 depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45 87 select DMA_ENGINE 88 help 89 Support the Atmel AHB DMA controller. This can be integrated in 90 chips such as the Atmel AT91SAM9RL. 91 92config FSL_DMA 93 tristate "Freescale Elo and Elo Plus DMA support" 94 depends on FSL_SOC 95 select DMA_ENGINE 96 ---help--- 97 Enable support for the Freescale Elo and Elo Plus DMA controllers. 98 The Elo is the DMA controller on some 82xx and 83xx parts, and the 99 Elo Plus is the DMA controller on 85xx and 86xx parts. 100 101config MPC512X_DMA 102 tristate "Freescale MPC512x built-in DMA engine support" 103 depends on PPC_MPC512x 104 select DMA_ENGINE 105 ---help--- 106 Enable support for the Freescale MPC512x built-in DMA engine. 107 108config MV_XOR 109 bool "Marvell XOR engine support" 110 depends on PLAT_ORION 111 select DMA_ENGINE 112 ---help--- 113 Enable support for the Marvell XOR engine. 114 115config MX3_IPU 116 bool "MX3x Image Processing Unit support" 117 depends on ARCH_MX3 118 select DMA_ENGINE 119 default y 120 help 121 If you plan to use the Image Processing unit in the i.MX3x, say 122 Y here. If unsure, select Y. 123 124config MX3_IPU_IRQS 125 int "Number of dynamically mapped interrupts for IPU" 126 depends on MX3_IPU 127 range 2 137 128 default 4 129 help 130 Out of 137 interrupt sources on i.MX31 IPU only very few are used. 131 To avoid bloating the irq_desc[] array we allocate a sufficient 132 number of IRQ slots and map them dynamically to specific sources. 133 134config TXX9_DMAC 135 tristate "Toshiba TXx9 SoC DMA support" 136 depends on MACH_TX49XX || MACH_TX39XX 137 select DMA_ENGINE 138 help 139 Support the TXx9 SoC internal DMA controller. This can be 140 integrated in chips such as the Toshiba TX4927/38/39. 141 142config SH_DMAE 143 tristate "Renesas SuperH DMAC support" 144 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE) 145 depends on !SH_DMA_API 146 select DMA_ENGINE 147 help 148 Enable support for the Renesas SuperH DMA controllers. 149 150config COH901318 151 bool "ST-Ericsson COH901318 DMA support" 152 select DMA_ENGINE 153 depends on ARCH_U300 154 help 155 Enable support for ST-Ericsson COH 901 318 DMA. 156 157config STE_DMA40 158 bool "ST-Ericsson DMA40 support" 159 depends on ARCH_U8500 160 select DMA_ENGINE 161 help 162 Support for ST-Ericsson DMA40 controller 163 164config AMCC_PPC440SPE_ADMA 165 tristate "AMCC PPC440SPe ADMA support" 166 depends on 440SPe || 440SP 167 select DMA_ENGINE 168 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL 169 help 170 Enable support for the AMCC PPC440SPe RAID engines. 171 172config TIMB_DMA 173 tristate "Timberdale FPGA DMA support" 174 depends on MFD_TIMBERDALE || HAS_IOMEM 175 select DMA_ENGINE 176 help 177 Enable support for the Timberdale FPGA DMA engine. 178 179config ARCH_HAS_ASYNC_TX_FIND_CHANNEL 180 bool 181 182config PL330_DMA 183 tristate "DMA API Driver for PL330" 184 select DMA_ENGINE 185 depends on PL330 186 help 187 Select if your platform has one or more PL330 DMACs. 188 You need to provide platform specific settings via 189 platform_data for a dma-pl330 device. 190 191config PCH_DMA 192 tristate "Topcliff PCH DMA support" 193 depends on PCI && X86 194 select DMA_ENGINE 195 help 196 Enable support for the Topcliff PCH DMA engine. 197 198config DMA_ENGINE 199 bool 200 201comment "DMA Clients" 202 depends on DMA_ENGINE 203 204config NET_DMA 205 bool "Network: TCP receive copy offload" 206 depends on DMA_ENGINE && NET 207 default (INTEL_IOATDMA || FSL_DMA) 208 help 209 This enables the use of DMA engines in the network stack to 210 offload receive copy-to-user operations, freeing CPU cycles. 211 212 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise 213 say N. 214 215config ASYNC_TX_DMA 216 bool "Async_tx: Offload support for the async_tx api" 217 depends on DMA_ENGINE 218 help 219 This allows the async_tx api to take advantage of offload engines for 220 memcpy, memset, xor, and raid6 p+q operations. If your platform has 221 a dma engine that can perform raid operations and you have enabled 222 MD_RAID456 say Y. 223 224 If unsure, say N. 225 226config DMATEST 227 tristate "DMA Test client" 228 depends on DMA_ENGINE 229 help 230 Simple DMA test client. Say N unless you're debugging a 231 DMA Device driver. 232 233endif 234