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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/char/
1/*
2 * Intel & MS High Precision Event Timer Implementation.
3 *
4 * Copyright (C) 2003 Intel Corporation
5 *	Venki Pallipadi
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 *	Bob Picco <robert.picco@hp.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/interrupt.h>
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/smp_lock.h>
18#include <linux/types.h>
19#include <linux/miscdevice.h>
20#include <linux/major.h>
21#include <linux/ioport.h>
22#include <linux/fcntl.h>
23#include <linux/init.h>
24#include <linux/poll.h>
25#include <linux/mm.h>
26#include <linux/proc_fs.h>
27#include <linux/spinlock.h>
28#include <linux/sysctl.h>
29#include <linux/wait.h>
30#include <linux/bcd.h>
31#include <linux/seq_file.h>
32#include <linux/bitops.h>
33#include <linux/clocksource.h>
34#include <linux/slab.h>
35
36#include <asm/current.h>
37#include <asm/uaccess.h>
38#include <asm/system.h>
39#include <asm/io.h>
40#include <asm/irq.h>
41#include <asm/div64.h>
42
43#include <linux/acpi.h>
44#include <acpi/acpi_bus.h>
45#include <linux/hpet.h>
46
47/*
48 * The High Precision Event Timer driver.
49 * This driver is closely modelled after the rtc.c driver.
50 * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
51 */
52#define	HPET_USER_FREQ	(64)
53#define	HPET_DRIFT	(500)
54
55#define HPET_RANGE_SIZE		1024	/* from HPET spec */
56
57
58/* WARNING -- don't get confused.  These macros are never used
59 * to write the (single) counter, and rarely to read it.
60 * They're badly named; to fix, someday.
61 */
62#if BITS_PER_LONG == 64
63#define	write_counter(V, MC)	writeq(V, MC)
64#define	read_counter(MC)	readq(MC)
65#else
66#define	write_counter(V, MC)	writel(V, MC)
67#define	read_counter(MC)	readl(MC)
68#endif
69
70static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
71
72/* This clocksource driver currently only works on ia64 */
73#ifdef CONFIG_IA64
74static void __iomem *hpet_mctr;
75
76static cycle_t read_hpet(struct clocksource *cs)
77{
78	return (cycle_t)read_counter((void __iomem *)hpet_mctr);
79}
80
81static struct clocksource clocksource_hpet = {
82        .name           = "hpet",
83        .rating         = 250,
84        .read           = read_hpet,
85        .mask           = CLOCKSOURCE_MASK(64),
86	.mult		= 0, /* to be calculated */
87        .shift          = 10,
88        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
89};
90static struct clocksource *hpet_clocksource;
91#endif
92
93/* A lock for concurrent access by app and isr hpet activity. */
94static DEFINE_SPINLOCK(hpet_lock);
95
96#define	HPET_DEV_NAME	(7)
97
98struct hpet_dev {
99	struct hpets *hd_hpets;
100	struct hpet __iomem *hd_hpet;
101	struct hpet_timer __iomem *hd_timer;
102	unsigned long hd_ireqfreq;
103	unsigned long hd_irqdata;
104	wait_queue_head_t hd_waitqueue;
105	struct fasync_struct *hd_async_queue;
106	unsigned int hd_flags;
107	unsigned int hd_irq;
108	unsigned int hd_hdwirq;
109	char hd_name[HPET_DEV_NAME];
110};
111
112struct hpets {
113	struct hpets *hp_next;
114	struct hpet __iomem *hp_hpet;
115	unsigned long hp_hpet_phys;
116	struct clocksource *hp_clocksource;
117	unsigned long long hp_tick_freq;
118	unsigned long hp_delta;
119	unsigned int hp_ntimer;
120	unsigned int hp_which;
121	struct hpet_dev hp_dev[1];
122};
123
124static struct hpets *hpets;
125
126#define	HPET_OPEN		0x0001
127#define	HPET_IE			0x0002	/* interrupt enabled */
128#define	HPET_PERIODIC		0x0004
129#define	HPET_SHARED_IRQ		0x0008
130
131
132#ifndef readq
133static inline unsigned long long readq(void __iomem *addr)
134{
135	return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
136}
137#endif
138
139#ifndef writeq
140static inline void writeq(unsigned long long v, void __iomem *addr)
141{
142	writel(v & 0xffffffff, addr);
143	writel(v >> 32, addr + 4);
144}
145#endif
146
147static irqreturn_t hpet_interrupt(int irq, void *data)
148{
149	struct hpet_dev *devp;
150	unsigned long isr;
151
152	devp = data;
153	isr = 1 << (devp - devp->hd_hpets->hp_dev);
154
155	if ((devp->hd_flags & HPET_SHARED_IRQ) &&
156	    !(isr & readl(&devp->hd_hpet->hpet_isr)))
157		return IRQ_NONE;
158
159	spin_lock(&hpet_lock);
160	devp->hd_irqdata++;
161
162	/*
163	 * For non-periodic timers, increment the accumulator.
164	 * This has the effect of treating non-periodic like periodic.
165	 */
166	if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
167		unsigned long m, t;
168
169		t = devp->hd_ireqfreq;
170		m = read_counter(&devp->hd_timer->hpet_compare);
171		write_counter(t + m, &devp->hd_timer->hpet_compare);
172	}
173
174	if (devp->hd_flags & HPET_SHARED_IRQ)
175		writel(isr, &devp->hd_hpet->hpet_isr);
176	spin_unlock(&hpet_lock);
177
178	wake_up_interruptible(&devp->hd_waitqueue);
179
180	kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
181
182	return IRQ_HANDLED;
183}
184
185static void hpet_timer_set_irq(struct hpet_dev *devp)
186{
187	unsigned long v;
188	int irq, gsi;
189	struct hpet_timer __iomem *timer;
190
191	spin_lock_irq(&hpet_lock);
192	if (devp->hd_hdwirq) {
193		spin_unlock_irq(&hpet_lock);
194		return;
195	}
196
197	timer = devp->hd_timer;
198
199	/* we prefer level triggered mode */
200	v = readl(&timer->hpet_config);
201	if (!(v & Tn_INT_TYPE_CNF_MASK)) {
202		v |= Tn_INT_TYPE_CNF_MASK;
203		writel(v, &timer->hpet_config);
204	}
205	spin_unlock_irq(&hpet_lock);
206
207	v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
208				 Tn_INT_ROUTE_CAP_SHIFT;
209
210	/*
211	 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
212	 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
213	 */
214	if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
215		v &= ~0xf3df;
216	else
217		v &= ~0xffff;
218
219	for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
220		if (irq >= nr_irqs) {
221			irq = HPET_MAX_IRQ;
222			break;
223		}
224
225		gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
226					ACPI_ACTIVE_LOW);
227		if (gsi > 0)
228			break;
229
230	}
231
232	if (irq < HPET_MAX_IRQ) {
233		spin_lock_irq(&hpet_lock);
234		v = readl(&timer->hpet_config);
235		v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
236		writel(v, &timer->hpet_config);
237		devp->hd_hdwirq = gsi;
238		spin_unlock_irq(&hpet_lock);
239	}
240	return;
241}
242
243static int hpet_open(struct inode *inode, struct file *file)
244{
245	struct hpet_dev *devp;
246	struct hpets *hpetp;
247	int i;
248
249	if (file->f_mode & FMODE_WRITE)
250		return -EINVAL;
251
252	lock_kernel();
253	spin_lock_irq(&hpet_lock);
254
255	for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
256		for (i = 0; i < hpetp->hp_ntimer; i++)
257			if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
258				continue;
259			else {
260				devp = &hpetp->hp_dev[i];
261				break;
262			}
263
264	if (!devp) {
265		spin_unlock_irq(&hpet_lock);
266		unlock_kernel();
267		return -EBUSY;
268	}
269
270	file->private_data = devp;
271	devp->hd_irqdata = 0;
272	devp->hd_flags |= HPET_OPEN;
273	spin_unlock_irq(&hpet_lock);
274	unlock_kernel();
275
276	hpet_timer_set_irq(devp);
277
278	return 0;
279}
280
281static ssize_t
282hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
283{
284	DECLARE_WAITQUEUE(wait, current);
285	unsigned long data;
286	ssize_t retval;
287	struct hpet_dev *devp;
288
289	devp = file->private_data;
290	if (!devp->hd_ireqfreq)
291		return -EIO;
292
293	if (count < sizeof(unsigned long))
294		return -EINVAL;
295
296	add_wait_queue(&devp->hd_waitqueue, &wait);
297
298	for ( ; ; ) {
299		set_current_state(TASK_INTERRUPTIBLE);
300
301		spin_lock_irq(&hpet_lock);
302		data = devp->hd_irqdata;
303		devp->hd_irqdata = 0;
304		spin_unlock_irq(&hpet_lock);
305
306		if (data)
307			break;
308		else if (file->f_flags & O_NONBLOCK) {
309			retval = -EAGAIN;
310			goto out;
311		} else if (signal_pending(current)) {
312			retval = -ERESTARTSYS;
313			goto out;
314		}
315		schedule();
316	}
317
318	retval = put_user(data, (unsigned long __user *)buf);
319	if (!retval)
320		retval = sizeof(unsigned long);
321out:
322	__set_current_state(TASK_RUNNING);
323	remove_wait_queue(&devp->hd_waitqueue, &wait);
324
325	return retval;
326}
327
328static unsigned int hpet_poll(struct file *file, poll_table * wait)
329{
330	unsigned long v;
331	struct hpet_dev *devp;
332
333	devp = file->private_data;
334
335	if (!devp->hd_ireqfreq)
336		return 0;
337
338	poll_wait(file, &devp->hd_waitqueue, wait);
339
340	spin_lock_irq(&hpet_lock);
341	v = devp->hd_irqdata;
342	spin_unlock_irq(&hpet_lock);
343
344	if (v != 0)
345		return POLLIN | POLLRDNORM;
346
347	return 0;
348}
349
350static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
351{
352#ifdef	CONFIG_HPET_MMAP
353	struct hpet_dev *devp;
354	unsigned long addr;
355
356	if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
357		return -EINVAL;
358
359	devp = file->private_data;
360	addr = devp->hd_hpets->hp_hpet_phys;
361
362	if (addr & (PAGE_SIZE - 1))
363		return -ENOSYS;
364
365	vma->vm_flags |= VM_IO;
366	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
367
368	if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
369					PAGE_SIZE, vma->vm_page_prot)) {
370		printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
371			__func__);
372		return -EAGAIN;
373	}
374
375	return 0;
376#else
377	return -ENOSYS;
378#endif
379}
380
381static int hpet_fasync(int fd, struct file *file, int on)
382{
383	struct hpet_dev *devp;
384
385	devp = file->private_data;
386
387	if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
388		return 0;
389	else
390		return -EIO;
391}
392
393static int hpet_release(struct inode *inode, struct file *file)
394{
395	struct hpet_dev *devp;
396	struct hpet_timer __iomem *timer;
397	int irq = 0;
398
399	devp = file->private_data;
400	timer = devp->hd_timer;
401
402	spin_lock_irq(&hpet_lock);
403
404	writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
405	       &timer->hpet_config);
406
407	irq = devp->hd_irq;
408	devp->hd_irq = 0;
409
410	devp->hd_ireqfreq = 0;
411
412	if (devp->hd_flags & HPET_PERIODIC
413	    && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
414		unsigned long v;
415
416		v = readq(&timer->hpet_config);
417		v ^= Tn_TYPE_CNF_MASK;
418		writeq(v, &timer->hpet_config);
419	}
420
421	devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
422	spin_unlock_irq(&hpet_lock);
423
424	if (irq)
425		free_irq(irq, devp);
426
427	file->private_data = NULL;
428	return 0;
429}
430
431static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int);
432
433static long hpet_ioctl(struct file *file, unsigned int cmd,
434			unsigned long arg)
435{
436	struct hpet_dev *devp;
437	int ret;
438
439	devp = file->private_data;
440	lock_kernel();
441	ret = hpet_ioctl_common(devp, cmd, arg, 0);
442	unlock_kernel();
443
444	return ret;
445}
446
447static int hpet_ioctl_ieon(struct hpet_dev *devp)
448{
449	struct hpet_timer __iomem *timer;
450	struct hpet __iomem *hpet;
451	struct hpets *hpetp;
452	int irq;
453	unsigned long g, v, t, m;
454	unsigned long flags, isr;
455
456	timer = devp->hd_timer;
457	hpet = devp->hd_hpet;
458	hpetp = devp->hd_hpets;
459
460	if (!devp->hd_ireqfreq)
461		return -EIO;
462
463	spin_lock_irq(&hpet_lock);
464
465	if (devp->hd_flags & HPET_IE) {
466		spin_unlock_irq(&hpet_lock);
467		return -EBUSY;
468	}
469
470	devp->hd_flags |= HPET_IE;
471
472	if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
473		devp->hd_flags |= HPET_SHARED_IRQ;
474	spin_unlock_irq(&hpet_lock);
475
476	irq = devp->hd_hdwirq;
477
478	if (irq) {
479		unsigned long irq_flags;
480
481		if (devp->hd_flags & HPET_SHARED_IRQ) {
482			/*
483			 * To prevent the interrupt handler from seeing an
484			 * unwanted interrupt status bit, program the timer
485			 * so that it will not fire in the near future ...
486			 */
487			writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
488			       &timer->hpet_config);
489			write_counter(read_counter(&hpet->hpet_mc),
490				      &timer->hpet_compare);
491			/* ... and clear any left-over status. */
492			isr = 1 << (devp - devp->hd_hpets->hp_dev);
493			writel(isr, &hpet->hpet_isr);
494		}
495
496		sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
497		irq_flags = devp->hd_flags & HPET_SHARED_IRQ
498						? IRQF_SHARED : IRQF_DISABLED;
499		if (request_irq(irq, hpet_interrupt, irq_flags,
500				devp->hd_name, (void *)devp)) {
501			printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
502			irq = 0;
503		}
504	}
505
506	if (irq == 0) {
507		spin_lock_irq(&hpet_lock);
508		devp->hd_flags ^= HPET_IE;
509		spin_unlock_irq(&hpet_lock);
510		return -EIO;
511	}
512
513	devp->hd_irq = irq;
514	t = devp->hd_ireqfreq;
515	v = readq(&timer->hpet_config);
516
517	/* 64-bit comparators are not yet supported through the ioctls,
518	 * so force this into 32-bit mode if it supports both modes
519	 */
520	g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
521
522	if (devp->hd_flags & HPET_PERIODIC) {
523		g |= Tn_TYPE_CNF_MASK;
524		v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
525		writeq(v, &timer->hpet_config);
526		local_irq_save(flags);
527
528		/*
529		 * NOTE: First we modify the hidden accumulator
530		 * register supported by periodic-capable comparators.
531		 * We never want to modify the (single) counter; that
532		 * would affect all the comparators. The value written
533		 * is the counter value when the first interrupt is due.
534		 */
535		m = read_counter(&hpet->hpet_mc);
536		write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
537		/*
538		 * Then we modify the comparator, indicating the period
539		 * for subsequent interrupt.
540		 */
541		write_counter(t, &timer->hpet_compare);
542	} else {
543		local_irq_save(flags);
544		m = read_counter(&hpet->hpet_mc);
545		write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
546	}
547
548	if (devp->hd_flags & HPET_SHARED_IRQ) {
549		isr = 1 << (devp - devp->hd_hpets->hp_dev);
550		writel(isr, &hpet->hpet_isr);
551	}
552	writeq(g, &timer->hpet_config);
553	local_irq_restore(flags);
554
555	return 0;
556}
557
558/* converts Hz to number of timer ticks */
559static inline unsigned long hpet_time_div(struct hpets *hpets,
560					  unsigned long dis)
561{
562	unsigned long long m;
563
564	m = hpets->hp_tick_freq + (dis >> 1);
565	do_div(m, dis);
566	return (unsigned long)m;
567}
568
569static int
570hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel)
571{
572	struct hpet_timer __iomem *timer;
573	struct hpet __iomem *hpet;
574	struct hpets *hpetp;
575	int err;
576	unsigned long v;
577
578	switch (cmd) {
579	case HPET_IE_OFF:
580	case HPET_INFO:
581	case HPET_EPI:
582	case HPET_DPI:
583	case HPET_IRQFREQ:
584		timer = devp->hd_timer;
585		hpet = devp->hd_hpet;
586		hpetp = devp->hd_hpets;
587		break;
588	case HPET_IE_ON:
589		return hpet_ioctl_ieon(devp);
590	default:
591		return -EINVAL;
592	}
593
594	err = 0;
595
596	switch (cmd) {
597	case HPET_IE_OFF:
598		if ((devp->hd_flags & HPET_IE) == 0)
599			break;
600		v = readq(&timer->hpet_config);
601		v &= ~Tn_INT_ENB_CNF_MASK;
602		writeq(v, &timer->hpet_config);
603		if (devp->hd_irq) {
604			free_irq(devp->hd_irq, devp);
605			devp->hd_irq = 0;
606		}
607		devp->hd_flags ^= HPET_IE;
608		break;
609	case HPET_INFO:
610		{
611			struct hpet_info info;
612
613			if (devp->hd_ireqfreq)
614				info.hi_ireqfreq =
615					hpet_time_div(hpetp, devp->hd_ireqfreq);
616			else
617				info.hi_ireqfreq = 0;
618			info.hi_flags =
619			    readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
620			info.hi_hpet = hpetp->hp_which;
621			info.hi_timer = devp - hpetp->hp_dev;
622			if (kernel)
623				memcpy((void *)arg, &info, sizeof(info));
624			else
625				if (copy_to_user((void __user *)arg, &info,
626						 sizeof(info)))
627					err = -EFAULT;
628			break;
629		}
630	case HPET_EPI:
631		v = readq(&timer->hpet_config);
632		if ((v & Tn_PER_INT_CAP_MASK) == 0) {
633			err = -ENXIO;
634			break;
635		}
636		devp->hd_flags |= HPET_PERIODIC;
637		break;
638	case HPET_DPI:
639		v = readq(&timer->hpet_config);
640		if ((v & Tn_PER_INT_CAP_MASK) == 0) {
641			err = -ENXIO;
642			break;
643		}
644		if (devp->hd_flags & HPET_PERIODIC &&
645		    readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
646			v = readq(&timer->hpet_config);
647			v ^= Tn_TYPE_CNF_MASK;
648			writeq(v, &timer->hpet_config);
649		}
650		devp->hd_flags &= ~HPET_PERIODIC;
651		break;
652	case HPET_IRQFREQ:
653		if (!kernel && (arg > hpet_max_freq) &&
654		    !capable(CAP_SYS_RESOURCE)) {
655			err = -EACCES;
656			break;
657		}
658
659		if (!arg) {
660			err = -EINVAL;
661			break;
662		}
663
664		devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
665	}
666
667	return err;
668}
669
670static const struct file_operations hpet_fops = {
671	.owner = THIS_MODULE,
672	.llseek = no_llseek,
673	.read = hpet_read,
674	.poll = hpet_poll,
675	.unlocked_ioctl = hpet_ioctl,
676	.open = hpet_open,
677	.release = hpet_release,
678	.fasync = hpet_fasync,
679	.mmap = hpet_mmap,
680};
681
682static int hpet_is_known(struct hpet_data *hdp)
683{
684	struct hpets *hpetp;
685
686	for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
687		if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
688			return 1;
689
690	return 0;
691}
692
693static ctl_table hpet_table[] = {
694	{
695	 .procname = "max-user-freq",
696	 .data = &hpet_max_freq,
697	 .maxlen = sizeof(int),
698	 .mode = 0644,
699	 .proc_handler = proc_dointvec,
700	 },
701	{}
702};
703
704static ctl_table hpet_root[] = {
705	{
706	 .procname = "hpet",
707	 .maxlen = 0,
708	 .mode = 0555,
709	 .child = hpet_table,
710	 },
711	{}
712};
713
714static ctl_table dev_root[] = {
715	{
716	 .procname = "dev",
717	 .maxlen = 0,
718	 .mode = 0555,
719	 .child = hpet_root,
720	 },
721	{}
722};
723
724static struct ctl_table_header *sysctl_header;
725
726/*
727 * Adjustment for when arming the timer with
728 * initial conditions.  That is, main counter
729 * ticks expired before interrupts are enabled.
730 */
731#define	TICK_CALIBRATE	(1000UL)
732
733static unsigned long __hpet_calibrate(struct hpets *hpetp)
734{
735	struct hpet_timer __iomem *timer = NULL;
736	unsigned long t, m, count, i, flags, start;
737	struct hpet_dev *devp;
738	int j;
739	struct hpet __iomem *hpet;
740
741	for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
742		if ((devp->hd_flags & HPET_OPEN) == 0) {
743			timer = devp->hd_timer;
744			break;
745		}
746
747	if (!timer)
748		return 0;
749
750	hpet = hpetp->hp_hpet;
751	t = read_counter(&timer->hpet_compare);
752
753	i = 0;
754	count = hpet_time_div(hpetp, TICK_CALIBRATE);
755
756	local_irq_save(flags);
757
758	start = read_counter(&hpet->hpet_mc);
759
760	do {
761		m = read_counter(&hpet->hpet_mc);
762		write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
763	} while (i++, (m - start) < count);
764
765	local_irq_restore(flags);
766
767	return (m - start) / i;
768}
769
770static unsigned long hpet_calibrate(struct hpets *hpetp)
771{
772	unsigned long ret = -1;
773	unsigned long tmp;
774
775	/*
776	 * Try to calibrate until return value becomes stable small value.
777	 * If SMI interruption occurs in calibration loop, the return value
778	 * will be big. This avoids its impact.
779	 */
780	for ( ; ; ) {
781		tmp = __hpet_calibrate(hpetp);
782		if (ret <= tmp)
783			break;
784		ret = tmp;
785	}
786
787	return ret;
788}
789
790int hpet_alloc(struct hpet_data *hdp)
791{
792	u64 cap, mcfg;
793	struct hpet_dev *devp;
794	u32 i, ntimer;
795	struct hpets *hpetp;
796	size_t siz;
797	struct hpet __iomem *hpet;
798	static struct hpets *last = NULL;
799	unsigned long period;
800	unsigned long long temp;
801	u32 remainder;
802
803	/*
804	 * hpet_alloc can be called by platform dependent code.
805	 * If platform dependent code has allocated the hpet that
806	 * ACPI has also reported, then we catch it here.
807	 */
808	if (hpet_is_known(hdp)) {
809		printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
810			__func__);
811		return 0;
812	}
813
814	siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
815				      sizeof(struct hpet_dev));
816
817	hpetp = kzalloc(siz, GFP_KERNEL);
818
819	if (!hpetp)
820		return -ENOMEM;
821
822	hpetp->hp_which = hpet_nhpet++;
823	hpetp->hp_hpet = hdp->hd_address;
824	hpetp->hp_hpet_phys = hdp->hd_phys_address;
825
826	hpetp->hp_ntimer = hdp->hd_nirqs;
827
828	for (i = 0; i < hdp->hd_nirqs; i++)
829		hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
830
831	hpet = hpetp->hp_hpet;
832
833	cap = readq(&hpet->hpet_cap);
834
835	ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
836
837	if (hpetp->hp_ntimer != ntimer) {
838		printk(KERN_WARNING "hpet: number irqs doesn't agree"
839		       " with number of timers\n");
840		kfree(hpetp);
841		return -ENODEV;
842	}
843
844	if (last)
845		last->hp_next = hpetp;
846	else
847		hpets = hpetp;
848
849	last = hpetp;
850
851	period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
852		HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
853	temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
854	temp += period >> 1; /* round */
855	do_div(temp, period);
856	hpetp->hp_tick_freq = temp; /* ticks per second */
857
858	printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
859		hpetp->hp_which, hdp->hd_phys_address,
860		hpetp->hp_ntimer > 1 ? "s" : "");
861	for (i = 0; i < hpetp->hp_ntimer; i++)
862		printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
863	printk("\n");
864
865	temp = hpetp->hp_tick_freq;
866	remainder = do_div(temp, 1000000);
867	printk(KERN_INFO
868		"hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
869		hpetp->hp_which, hpetp->hp_ntimer,
870		cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
871		(unsigned) temp, remainder);
872
873	mcfg = readq(&hpet->hpet_config);
874	if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
875		write_counter(0L, &hpet->hpet_mc);
876		mcfg |= HPET_ENABLE_CNF_MASK;
877		writeq(mcfg, &hpet->hpet_config);
878	}
879
880	for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
881		struct hpet_timer __iomem *timer;
882
883		timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
884
885		devp->hd_hpets = hpetp;
886		devp->hd_hpet = hpet;
887		devp->hd_timer = timer;
888
889		/*
890		 * If the timer was reserved by platform code,
891		 * then make timer unavailable for opens.
892		 */
893		if (hdp->hd_state & (1 << i)) {
894			devp->hd_flags = HPET_OPEN;
895			continue;
896		}
897
898		init_waitqueue_head(&devp->hd_waitqueue);
899	}
900
901	hpetp->hp_delta = hpet_calibrate(hpetp);
902
903/* This clocksource driver currently only works on ia64 */
904#ifdef CONFIG_IA64
905	if (!hpet_clocksource) {
906		hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
907		CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr);
908		clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq,
909						clocksource_hpet.shift);
910		clocksource_register(&clocksource_hpet);
911		hpetp->hp_clocksource = &clocksource_hpet;
912		hpet_clocksource = &clocksource_hpet;
913	}
914#endif
915
916	return 0;
917}
918
919static acpi_status hpet_resources(struct acpi_resource *res, void *data)
920{
921	struct hpet_data *hdp;
922	acpi_status status;
923	struct acpi_resource_address64 addr;
924
925	hdp = data;
926
927	status = acpi_resource_to_address64(res, &addr);
928
929	if (ACPI_SUCCESS(status)) {
930		hdp->hd_phys_address = addr.minimum;
931		hdp->hd_address = ioremap(addr.minimum, addr.address_length);
932
933		if (hpet_is_known(hdp)) {
934			iounmap(hdp->hd_address);
935			return AE_ALREADY_EXISTS;
936		}
937	} else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
938		struct acpi_resource_fixed_memory32 *fixmem32;
939
940		fixmem32 = &res->data.fixed_memory32;
941		if (!fixmem32)
942			return AE_NO_MEMORY;
943
944		hdp->hd_phys_address = fixmem32->address;
945		hdp->hd_address = ioremap(fixmem32->address,
946						HPET_RANGE_SIZE);
947
948		if (hpet_is_known(hdp)) {
949			iounmap(hdp->hd_address);
950			return AE_ALREADY_EXISTS;
951		}
952	} else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
953		struct acpi_resource_extended_irq *irqp;
954		int i, irq;
955
956		irqp = &res->data.extended_irq;
957
958		for (i = 0; i < irqp->interrupt_count; i++) {
959			irq = acpi_register_gsi(NULL, irqp->interrupts[i],
960				      irqp->triggering, irqp->polarity);
961			if (irq < 0)
962				return AE_ERROR;
963
964			hdp->hd_irq[hdp->hd_nirqs] = irq;
965			hdp->hd_nirqs++;
966		}
967	}
968
969	return AE_OK;
970}
971
972static int hpet_acpi_add(struct acpi_device *device)
973{
974	acpi_status result;
975	struct hpet_data data;
976
977	memset(&data, 0, sizeof(data));
978
979	result =
980	    acpi_walk_resources(device->handle, METHOD_NAME__CRS,
981				hpet_resources, &data);
982
983	if (ACPI_FAILURE(result))
984		return -ENODEV;
985
986	if (!data.hd_address || !data.hd_nirqs) {
987		if (data.hd_address)
988			iounmap(data.hd_address);
989		printk("%s: no address or irqs in _CRS\n", __func__);
990		return -ENODEV;
991	}
992
993	return hpet_alloc(&data);
994}
995
996static int hpet_acpi_remove(struct acpi_device *device, int type)
997{
998	return -EINVAL;
999}
1000
1001static const struct acpi_device_id hpet_device_ids[] = {
1002	{"PNP0103", 0},
1003	{"", 0},
1004};
1005MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
1006
1007static struct acpi_driver hpet_acpi_driver = {
1008	.name = "hpet",
1009	.ids = hpet_device_ids,
1010	.ops = {
1011		.add = hpet_acpi_add,
1012		.remove = hpet_acpi_remove,
1013		},
1014};
1015
1016static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1017
1018static int __init hpet_init(void)
1019{
1020	int result;
1021
1022	result = misc_register(&hpet_misc);
1023	if (result < 0)
1024		return -ENODEV;
1025
1026	sysctl_header = register_sysctl_table(dev_root);
1027
1028	result = acpi_bus_register_driver(&hpet_acpi_driver);
1029	if (result < 0) {
1030		if (sysctl_header)
1031			unregister_sysctl_table(sysctl_header);
1032		misc_deregister(&hpet_misc);
1033		return result;
1034	}
1035
1036	return 0;
1037}
1038
1039static void __exit hpet_exit(void)
1040{
1041	acpi_bus_unregister_driver(&hpet_acpi_driver);
1042
1043	if (sysctl_header)
1044		unregister_sysctl_table(sysctl_header);
1045	misc_deregister(&hpet_misc);
1046
1047	return;
1048}
1049
1050module_init(hpet_init);
1051module_exit(hpet_exit);
1052MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1053MODULE_LICENSE("GPL");
1054