1/* 2 * For documentation on the i460 AGP interface, see Chapter 7 (AGP Subsystem) of 3 * the "Intel 460GTX Chipset Software Developer's Manual": 4 * http://developer.intel.com/design/itanium/downloads/24870401s.htm 5 */ 6/* 7 * 460GX support by Chris Ahna <christopher.j.ahna@intel.com> 8 * Clean up & simplification by David Mosberger-Tang <davidm@hpl.hp.com> 9 */ 10#include <linux/module.h> 11#include <linux/pci.h> 12#include <linux/init.h> 13#include <linux/string.h> 14#include <linux/slab.h> 15#include <linux/agp_backend.h> 16#include <linux/log2.h> 17 18#include "agp.h" 19 20#define INTEL_I460_BAPBASE 0x98 21#define INTEL_I460_GXBCTL 0xa0 22#define INTEL_I460_AGPSIZ 0xa2 23#define INTEL_I460_ATTBASE 0xfe200000 24#define INTEL_I460_GATT_VALID (1UL << 24) 25#define INTEL_I460_GATT_COHERENT (1UL << 25) 26 27/* 28 * The i460 can operate with large (4MB) pages, but there is no sane way to support this 29 * within the current kernel/DRM environment, so we disable the relevant code for now. 30 * See also comments in ia64_alloc_page()... 31 */ 32#define I460_LARGE_IO_PAGES 0 33 34#if I460_LARGE_IO_PAGES 35# define I460_IO_PAGE_SHIFT i460.io_page_shift 36#else 37# define I460_IO_PAGE_SHIFT 12 38#endif 39 40#define I460_IOPAGES_PER_KPAGE (PAGE_SIZE >> I460_IO_PAGE_SHIFT) 41#define I460_KPAGES_PER_IOPAGE (1 << (I460_IO_PAGE_SHIFT - PAGE_SHIFT)) 42#define I460_SRAM_IO_DISABLE (1 << 4) 43#define I460_BAPBASE_ENABLE (1 << 3) 44#define I460_AGPSIZ_MASK 0x7 45#define I460_4M_PS (1 << 1) 46 47/* Control bits for Out-Of-GART coherency and Burst Write Combining */ 48#define I460_GXBCTL_OOG (1UL << 0) 49#define I460_GXBCTL_BWC (1UL << 2) 50 51/* 52 * gatt_table entries are 32-bits wide on the i460; the generic code ought to declare the 53 * gatt_table and gatt_table_real pointers a "void *"... 54 */ 55#define RD_GATT(index) readl((u32 *) i460.gatt + (index)) 56#define WR_GATT(index, val) writel((val), (u32 *) i460.gatt + (index)) 57/* 58 * The 460 spec says we have to read the last location written to make sure that all 59 * writes have taken effect 60 */ 61#define WR_FLUSH_GATT(index) RD_GATT(index) 62 63static unsigned long i460_mask_memory (struct agp_bridge_data *bridge, 64 dma_addr_t addr, int type); 65 66static struct { 67 void *gatt; /* ioremap'd GATT area */ 68 69 /* i460 supports multiple GART page sizes, so GART pageshift is dynamic: */ 70 u8 io_page_shift; 71 72 /* BIOS configures chipset to one of 2 possible apbase values: */ 73 u8 dynamic_apbase; 74 75 /* structure for tracking partial use of 4MB GART pages: */ 76 struct lp_desc { 77 unsigned long *alloced_map; /* bitmap of kernel-pages in use */ 78 int refcount; /* number of kernel pages using the large page */ 79 u64 paddr; /* physical address of large page */ 80 struct page *page; /* page pointer */ 81 } *lp_desc; 82} i460; 83 84static const struct aper_size_info_8 i460_sizes[3] = 85{ 86 /* 87 * The 32GB aperture is only available with a 4M GART page size. Due to the 88 * dynamic GART page size, we can't figure out page_order or num_entries until 89 * runtime. 90 */ 91 {32768, 0, 0, 4}, 92 {1024, 0, 0, 2}, 93 {256, 0, 0, 1} 94}; 95 96static struct gatt_mask i460_masks[] = 97{ 98 { 99 .mask = INTEL_I460_GATT_VALID | INTEL_I460_GATT_COHERENT, 100 .type = 0 101 } 102}; 103 104static int i460_fetch_size (void) 105{ 106 int i; 107 u8 temp; 108 struct aper_size_info_8 *values; 109 110 /* Determine the GART page size */ 111 pci_read_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL, &temp); 112 i460.io_page_shift = (temp & I460_4M_PS) ? 22 : 12; 113 pr_debug("i460_fetch_size: io_page_shift=%d\n", i460.io_page_shift); 114 115 if (i460.io_page_shift != I460_IO_PAGE_SHIFT) { 116 printk(KERN_ERR PFX 117 "I/O (GART) page-size %luKB doesn't match expected " 118 "size %luKB\n", 119 1UL << (i460.io_page_shift - 10), 120 1UL << (I460_IO_PAGE_SHIFT)); 121 return 0; 122 } 123 124 values = A_SIZE_8(agp_bridge->driver->aperture_sizes); 125 126 pci_read_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, &temp); 127 128 /* Exit now if the IO drivers for the GART SRAMS are turned off */ 129 if (temp & I460_SRAM_IO_DISABLE) { 130 printk(KERN_ERR PFX "GART SRAMS disabled on 460GX chipset\n"); 131 printk(KERN_ERR PFX "AGPGART operation not possible\n"); 132 return 0; 133 } 134 135 /* Make sure we don't try to create an 2 ^ 23 entry GATT */ 136 if ((i460.io_page_shift == 0) && ((temp & I460_AGPSIZ_MASK) == 4)) { 137 printk(KERN_ERR PFX "We can't have a 32GB aperture with 4KB GART pages\n"); 138 return 0; 139 } 140 141 /* Determine the proper APBASE register */ 142 if (temp & I460_BAPBASE_ENABLE) 143 i460.dynamic_apbase = INTEL_I460_BAPBASE; 144 else 145 i460.dynamic_apbase = AGP_APBASE; 146 147 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) { 148 /* 149 * Dynamically calculate the proper num_entries and page_order values for 150 * the define aperture sizes. Take care not to shift off the end of 151 * values[i].size. 152 */ 153 values[i].num_entries = (values[i].size << 8) >> (I460_IO_PAGE_SHIFT - 12); 154 values[i].page_order = ilog2((sizeof(u32)*values[i].num_entries) >> PAGE_SHIFT); 155 } 156 157 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) { 158 /* Neglect control bits when matching up size_value */ 159 if ((temp & I460_AGPSIZ_MASK) == values[i].size_value) { 160 agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i); 161 agp_bridge->aperture_size_idx = i; 162 return values[i].size; 163 } 164 } 165 166 return 0; 167} 168 169/* There isn't anything to do here since 460 has no GART TLB. */ 170static void i460_tlb_flush (struct agp_memory *mem) 171{ 172 return; 173} 174 175/* 176 * This utility function is needed to prevent corruption of the control bits 177 * which are stored along with the aperture size in 460's AGPSIZ register 178 */ 179static void i460_write_agpsiz (u8 size_value) 180{ 181 u8 temp; 182 183 pci_read_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, &temp); 184 pci_write_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, 185 ((temp & ~I460_AGPSIZ_MASK) | size_value)); 186} 187 188static void i460_cleanup (void) 189{ 190 struct aper_size_info_8 *previous_size; 191 192 previous_size = A_SIZE_8(agp_bridge->previous_size); 193 i460_write_agpsiz(previous_size->size_value); 194 195 if (I460_IO_PAGE_SHIFT > PAGE_SHIFT) 196 kfree(i460.lp_desc); 197} 198 199static int i460_configure (void) 200{ 201 union { 202 u32 small[2]; 203 u64 large; 204 } temp; 205 size_t size; 206 u8 scratch; 207 struct aper_size_info_8 *current_size; 208 209 temp.large = 0; 210 211 current_size = A_SIZE_8(agp_bridge->current_size); 212 i460_write_agpsiz(current_size->size_value); 213 214 /* 215 * Do the necessary rigmarole to read all eight bytes of APBASE. 216 * This has to be done since the AGP aperture can be above 4GB on 217 * 460 based systems. 218 */ 219 pci_read_config_dword(agp_bridge->dev, i460.dynamic_apbase, &(temp.small[0])); 220 pci_read_config_dword(agp_bridge->dev, i460.dynamic_apbase + 4, &(temp.small[1])); 221 222 /* Clear BAR control bits */ 223 agp_bridge->gart_bus_addr = temp.large & ~((1UL << 3) - 1); 224 225 pci_read_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL, &scratch); 226 pci_write_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL, 227 (scratch & 0x02) | I460_GXBCTL_OOG | I460_GXBCTL_BWC); 228 229 /* 230 * Initialize partial allocation trackers if a GART page is bigger than a kernel 231 * page. 232 */ 233 if (I460_IO_PAGE_SHIFT > PAGE_SHIFT) { 234 size = current_size->num_entries * sizeof(i460.lp_desc[0]); 235 i460.lp_desc = kzalloc(size, GFP_KERNEL); 236 if (!i460.lp_desc) 237 return -ENOMEM; 238 } 239 return 0; 240} 241 242static int i460_create_gatt_table (struct agp_bridge_data *bridge) 243{ 244 int page_order, num_entries, i; 245 void *temp; 246 247 /* 248 * Load up the fixed address of the GART SRAMS which hold our GATT table. 249 */ 250 temp = agp_bridge->current_size; 251 page_order = A_SIZE_8(temp)->page_order; 252 num_entries = A_SIZE_8(temp)->num_entries; 253 254 i460.gatt = ioremap(INTEL_I460_ATTBASE, PAGE_SIZE << page_order); 255 if (!i460.gatt) { 256 printk(KERN_ERR PFX "ioremap failed\n"); 257 return -ENOMEM; 258 } 259 260 /* These are no good, the should be removed from the agp_bridge strucure... */ 261 agp_bridge->gatt_table_real = NULL; 262 agp_bridge->gatt_table = NULL; 263 agp_bridge->gatt_bus_addr = 0; 264 265 for (i = 0; i < num_entries; ++i) 266 WR_GATT(i, 0); 267 WR_FLUSH_GATT(i - 1); 268 return 0; 269} 270 271static int i460_free_gatt_table (struct agp_bridge_data *bridge) 272{ 273 int num_entries, i; 274 void *temp; 275 276 temp = agp_bridge->current_size; 277 278 num_entries = A_SIZE_8(temp)->num_entries; 279 280 for (i = 0; i < num_entries; ++i) 281 WR_GATT(i, 0); 282 WR_FLUSH_GATT(num_entries - 1); 283 284 iounmap(i460.gatt); 285 return 0; 286} 287 288/* 289 * The following functions are called when the I/O (GART) page size is smaller than 290 * PAGE_SIZE. 291 */ 292 293static int i460_insert_memory_small_io_page (struct agp_memory *mem, 294 off_t pg_start, int type) 295{ 296 unsigned long paddr, io_pg_start, io_page_size; 297 int i, j, k, num_entries; 298 void *temp; 299 300 pr_debug("i460_insert_memory_small_io_page(mem=%p, pg_start=%ld, type=%d, paddr0=0x%lx)\n", 301 mem, pg_start, type, page_to_phys(mem->pages[0])); 302 303 if (type >= AGP_USER_TYPES || mem->type >= AGP_USER_TYPES) 304 return -EINVAL; 305 306 io_pg_start = I460_IOPAGES_PER_KPAGE * pg_start; 307 308 temp = agp_bridge->current_size; 309 num_entries = A_SIZE_8(temp)->num_entries; 310 311 if ((io_pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count) > num_entries) { 312 printk(KERN_ERR PFX "Looks like we're out of AGP memory\n"); 313 return -EINVAL; 314 } 315 316 j = io_pg_start; 317 while (j < (io_pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count)) { 318 if (!PGE_EMPTY(agp_bridge, RD_GATT(j))) { 319 pr_debug("i460_insert_memory_small_io_page: GATT[%d]=0x%x is busy\n", 320 j, RD_GATT(j)); 321 return -EBUSY; 322 } 323 j++; 324 } 325 326 io_page_size = 1UL << I460_IO_PAGE_SHIFT; 327 for (i = 0, j = io_pg_start; i < mem->page_count; i++) { 328 paddr = page_to_phys(mem->pages[i]); 329 for (k = 0; k < I460_IOPAGES_PER_KPAGE; k++, j++, paddr += io_page_size) 330 WR_GATT(j, i460_mask_memory(agp_bridge, paddr, mem->type)); 331 } 332 WR_FLUSH_GATT(j - 1); 333 return 0; 334} 335 336static int i460_remove_memory_small_io_page(struct agp_memory *mem, 337 off_t pg_start, int type) 338{ 339 int i; 340 341 pr_debug("i460_remove_memory_small_io_page(mem=%p, pg_start=%ld, type=%d)\n", 342 mem, pg_start, type); 343 344 pg_start = I460_IOPAGES_PER_KPAGE * pg_start; 345 346 for (i = pg_start; i < (pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count); i++) 347 WR_GATT(i, 0); 348 WR_FLUSH_GATT(i - 1); 349 return 0; 350} 351 352#if I460_LARGE_IO_PAGES 353 354 355static int i460_alloc_large_page (struct lp_desc *lp) 356{ 357 unsigned long order = I460_IO_PAGE_SHIFT - PAGE_SHIFT; 358 size_t map_size; 359 360 lp->page = alloc_pages(GFP_KERNEL, order); 361 if (!lp->page) { 362 printk(KERN_ERR PFX "Couldn't alloc 4M GART page...\n"); 363 return -ENOMEM; 364 } 365 366 map_size = ((I460_KPAGES_PER_IOPAGE + BITS_PER_LONG - 1) & -BITS_PER_LONG)/8; 367 lp->alloced_map = kzalloc(map_size, GFP_KERNEL); 368 if (!lp->alloced_map) { 369 __free_pages(lp->page, order); 370 printk(KERN_ERR PFX "Out of memory, we're in trouble...\n"); 371 return -ENOMEM; 372 } 373 374 lp->paddr = page_to_phys(lp->page); 375 lp->refcount = 0; 376 atomic_add(I460_KPAGES_PER_IOPAGE, &agp_bridge->current_memory_agp); 377 return 0; 378} 379 380static void i460_free_large_page (struct lp_desc *lp) 381{ 382 kfree(lp->alloced_map); 383 lp->alloced_map = NULL; 384 385 __free_pages(lp->page, I460_IO_PAGE_SHIFT - PAGE_SHIFT); 386 atomic_sub(I460_KPAGES_PER_IOPAGE, &agp_bridge->current_memory_agp); 387} 388 389static int i460_insert_memory_large_io_page (struct agp_memory *mem, 390 off_t pg_start, int type) 391{ 392 int i, start_offset, end_offset, idx, pg, num_entries; 393 struct lp_desc *start, *end, *lp; 394 void *temp; 395 396 if (type >= AGP_USER_TYPES || mem->type >= AGP_USER_TYPES) 397 return -EINVAL; 398 399 temp = agp_bridge->current_size; 400 num_entries = A_SIZE_8(temp)->num_entries; 401 402 /* Figure out what pg_start means in terms of our large GART pages */ 403 start = &i460.lp_desc[pg_start / I460_KPAGES_PER_IOPAGE]; 404 end = &i460.lp_desc[(pg_start + mem->page_count - 1) / I460_KPAGES_PER_IOPAGE]; 405 start_offset = pg_start % I460_KPAGES_PER_IOPAGE; 406 end_offset = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_IOPAGE; 407 408 if (end > i460.lp_desc + num_entries) { 409 printk(KERN_ERR PFX "Looks like we're out of AGP memory\n"); 410 return -EINVAL; 411 } 412 413 /* Check if the requested region of the aperture is free */ 414 for (lp = start; lp <= end; ++lp) { 415 if (!lp->alloced_map) 416 continue; /* OK, the entire large page is available... */ 417 418 for (idx = ((lp == start) ? start_offset : 0); 419 idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE); 420 idx++) 421 { 422 if (test_bit(idx, lp->alloced_map)) 423 return -EBUSY; 424 } 425 } 426 427 for (lp = start, i = 0; lp <= end; ++lp) { 428 if (!lp->alloced_map) { 429 /* Allocate new GART pages... */ 430 if (i460_alloc_large_page(lp) < 0) 431 return -ENOMEM; 432 pg = lp - i460.lp_desc; 433 WR_GATT(pg, i460_mask_memory(agp_bridge, 434 lp->paddr, 0)); 435 WR_FLUSH_GATT(pg); 436 } 437 438 for (idx = ((lp == start) ? start_offset : 0); 439 idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE); 440 idx++, i++) 441 { 442 mem->pages[i] = lp->page; 443 __set_bit(idx, lp->alloced_map); 444 ++lp->refcount; 445 } 446 } 447 return 0; 448} 449 450static int i460_remove_memory_large_io_page (struct agp_memory *mem, 451 off_t pg_start, int type) 452{ 453 int i, pg, start_offset, end_offset, idx, num_entries; 454 struct lp_desc *start, *end, *lp; 455 void *temp; 456 457 temp = agp_bridge->current_size; 458 num_entries = A_SIZE_8(temp)->num_entries; 459 460 /* Figure out what pg_start means in terms of our large GART pages */ 461 start = &i460.lp_desc[pg_start / I460_KPAGES_PER_IOPAGE]; 462 end = &i460.lp_desc[(pg_start + mem->page_count - 1) / I460_KPAGES_PER_IOPAGE]; 463 start_offset = pg_start % I460_KPAGES_PER_IOPAGE; 464 end_offset = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_IOPAGE; 465 466 for (i = 0, lp = start; lp <= end; ++lp) { 467 for (idx = ((lp == start) ? start_offset : 0); 468 idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE); 469 idx++, i++) 470 { 471 mem->pages[i] = NULL; 472 __clear_bit(idx, lp->alloced_map); 473 --lp->refcount; 474 } 475 476 /* Free GART pages if they are unused */ 477 if (lp->refcount == 0) { 478 pg = lp - i460.lp_desc; 479 WR_GATT(pg, 0); 480 WR_FLUSH_GATT(pg); 481 i460_free_large_page(lp); 482 } 483 } 484 return 0; 485} 486 487/* Wrapper routines to call the approriate {small_io_page,large_io_page} function */ 488 489static int i460_insert_memory (struct agp_memory *mem, 490 off_t pg_start, int type) 491{ 492 if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT) 493 return i460_insert_memory_small_io_page(mem, pg_start, type); 494 else 495 return i460_insert_memory_large_io_page(mem, pg_start, type); 496} 497 498static int i460_remove_memory (struct agp_memory *mem, 499 off_t pg_start, int type) 500{ 501 if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT) 502 return i460_remove_memory_small_io_page(mem, pg_start, type); 503 else 504 return i460_remove_memory_large_io_page(mem, pg_start, type); 505} 506 507/* 508 * If the I/O (GART) page size is bigger than the kernel page size, we don't want to 509 * allocate memory until we know where it is to be bound in the aperture (a 510 * multi-kernel-page alloc might fit inside of an already allocated GART page). 511 * 512 * Let's just hope nobody counts on the allocated AGP memory being there before bind time 513 * (I don't think current drivers do)... 514 */ 515static struct page *i460_alloc_page (struct agp_bridge_data *bridge) 516{ 517 void *page; 518 519 if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT) { 520 page = agp_generic_alloc_page(agp_bridge); 521 } else 522 /* Returning NULL would cause problems */ 523 /* AK: really dubious code. */ 524 page = (void *)~0UL; 525 return page; 526} 527 528static void i460_destroy_page (struct page *page, int flags) 529{ 530 if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT) { 531 agp_generic_destroy_page(page, flags); 532 } 533} 534 535#endif /* I460_LARGE_IO_PAGES */ 536 537static unsigned long i460_mask_memory (struct agp_bridge_data *bridge, 538 dma_addr_t addr, int type) 539{ 540 /* Make sure the returned address is a valid GATT entry */ 541 return bridge->driver->masks[0].mask 542 | (((addr & ~((1 << I460_IO_PAGE_SHIFT) - 1)) & 0xfffff000) >> 12); 543} 544 545const struct agp_bridge_driver intel_i460_driver = { 546 .owner = THIS_MODULE, 547 .aperture_sizes = i460_sizes, 548 .size_type = U8_APER_SIZE, 549 .num_aperture_sizes = 3, 550 .configure = i460_configure, 551 .fetch_size = i460_fetch_size, 552 .cleanup = i460_cleanup, 553 .tlb_flush = i460_tlb_flush, 554 .mask_memory = i460_mask_memory, 555 .masks = i460_masks, 556 .agp_enable = agp_generic_enable, 557 .cache_flush = global_cache_flush, 558 .create_gatt_table = i460_create_gatt_table, 559 .free_gatt_table = i460_free_gatt_table, 560#if I460_LARGE_IO_PAGES 561 .insert_memory = i460_insert_memory, 562 .remove_memory = i460_remove_memory, 563 .agp_alloc_page = i460_alloc_page, 564 .agp_destroy_page = i460_destroy_page, 565#else 566 .insert_memory = i460_insert_memory_small_io_page, 567 .remove_memory = i460_remove_memory_small_io_page, 568 .agp_alloc_page = agp_generic_alloc_page, 569 .agp_alloc_pages = agp_generic_alloc_pages, 570 .agp_destroy_page = agp_generic_destroy_page, 571 .agp_destroy_pages = agp_generic_destroy_pages, 572#endif 573 .alloc_by_type = agp_generic_alloc_by_type, 574 .free_by_type = agp_generic_free_by_type, 575 .agp_type_to_mask_type = agp_generic_type_to_mask_type, 576 .cant_use_aperture = true, 577}; 578 579static int __devinit agp_intel_i460_probe(struct pci_dev *pdev, 580 const struct pci_device_id *ent) 581{ 582 struct agp_bridge_data *bridge; 583 u8 cap_ptr; 584 585 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP); 586 if (!cap_ptr) 587 return -ENODEV; 588 589 bridge = agp_alloc_bridge(); 590 if (!bridge) 591 return -ENOMEM; 592 593 bridge->driver = &intel_i460_driver; 594 bridge->dev = pdev; 595 bridge->capndx = cap_ptr; 596 597 printk(KERN_INFO PFX "Detected Intel 460GX chipset\n"); 598 599 pci_set_drvdata(pdev, bridge); 600 return agp_add_bridge(bridge); 601} 602 603static void __devexit agp_intel_i460_remove(struct pci_dev *pdev) 604{ 605 struct agp_bridge_data *bridge = pci_get_drvdata(pdev); 606 607 agp_remove_bridge(bridge); 608 agp_put_bridge(bridge); 609} 610 611static struct pci_device_id agp_intel_i460_pci_table[] = { 612 { 613 .class = (PCI_CLASS_BRIDGE_HOST << 8), 614 .class_mask = ~0, 615 .vendor = PCI_VENDOR_ID_INTEL, 616 .device = PCI_DEVICE_ID_INTEL_84460GX, 617 .subvendor = PCI_ANY_ID, 618 .subdevice = PCI_ANY_ID, 619 }, 620 { } 621}; 622 623MODULE_DEVICE_TABLE(pci, agp_intel_i460_pci_table); 624 625static struct pci_driver agp_intel_i460_pci_driver = { 626 .name = "agpgart-intel-i460", 627 .id_table = agp_intel_i460_pci_table, 628 .probe = agp_intel_i460_probe, 629 .remove = __devexit_p(agp_intel_i460_remove), 630}; 631 632static int __init agp_intel_i460_init(void) 633{ 634 if (agp_off) 635 return -EINVAL; 636 return pci_register_driver(&agp_intel_i460_pci_driver); 637} 638 639static void __exit agp_intel_i460_cleanup(void) 640{ 641 pci_unregister_driver(&agp_intel_i460_pci_driver); 642} 643 644module_init(agp_intel_i460_init); 645module_exit(agp_intel_i460_cleanup); 646 647MODULE_AUTHOR("Chris Ahna <Christopher.J.Ahna@intel.com>"); 648MODULE_LICENSE("GPL and additional rights"); 649