1/* 2 * sata_uli.c - ULi Electronics SATA 3 * 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2, or (at your option) 8 * any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; see the file COPYING. If not, write to 17 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 18 * 19 * 20 * libata documentation is available via 'make {ps|pdf}docs', 21 * as Documentation/DocBook/libata.* 22 * 23 * Hardware documentation available under NDA. 24 * 25 */ 26 27#include <linux/kernel.h> 28#include <linux/module.h> 29#include <linux/gfp.h> 30#include <linux/pci.h> 31#include <linux/init.h> 32#include <linux/blkdev.h> 33#include <linux/delay.h> 34#include <linux/interrupt.h> 35#include <linux/device.h> 36#include <scsi/scsi_host.h> 37#include <linux/libata.h> 38 39#define DRV_NAME "sata_uli" 40#define DRV_VERSION "1.3" 41 42enum { 43 uli_5289 = 0, 44 uli_5287 = 1, 45 uli_5281 = 2, 46 47 uli_max_ports = 4, 48 49 /* PCI configuration registers */ 50 ULI5287_BASE = 0x90, /* sata0 phy SCR registers */ 51 ULI5287_OFFS = 0x10, /* offset from sata0->sata1 phy regs */ 52 ULI5281_BASE = 0x60, /* sata0 phy SCR registers */ 53 ULI5281_OFFS = 0x60, /* offset from sata0->sata1 phy regs */ 54}; 55 56struct uli_priv { 57 unsigned int scr_cfg_addr[uli_max_ports]; 58}; 59 60static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); 61static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); 62static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); 63 64static const struct pci_device_id uli_pci_tbl[] = { 65 { PCI_VDEVICE(AL, 0x5289), uli_5289 }, 66 { PCI_VDEVICE(AL, 0x5287), uli_5287 }, 67 { PCI_VDEVICE(AL, 0x5281), uli_5281 }, 68 69 { } /* terminate list */ 70}; 71 72static struct pci_driver uli_pci_driver = { 73 .name = DRV_NAME, 74 .id_table = uli_pci_tbl, 75 .probe = uli_init_one, 76 .remove = ata_pci_remove_one, 77}; 78 79static struct scsi_host_template uli_sht = { 80 ATA_BMDMA_SHT(DRV_NAME), 81}; 82 83static struct ata_port_operations uli_ops = { 84 .inherits = &ata_bmdma_port_ops, 85 .scr_read = uli_scr_read, 86 .scr_write = uli_scr_write, 87 .hardreset = ATA_OP_NULL, 88}; 89 90static const struct ata_port_info uli_port_info = { 91 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 92 ATA_FLAG_IGN_SIMPLEX, 93 .pio_mask = ATA_PIO4, 94 .udma_mask = ATA_UDMA6, 95 .port_ops = &uli_ops, 96}; 97 98 99MODULE_AUTHOR("Peer Chen"); 100MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller"); 101MODULE_LICENSE("GPL"); 102MODULE_DEVICE_TABLE(pci, uli_pci_tbl); 103MODULE_VERSION(DRV_VERSION); 104 105static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg) 106{ 107 struct uli_priv *hpriv = ap->host->private_data; 108 return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg); 109} 110 111static u32 uli_scr_cfg_read(struct ata_link *link, unsigned int sc_reg) 112{ 113 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); 114 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg); 115 u32 val; 116 117 pci_read_config_dword(pdev, cfg_addr, &val); 118 return val; 119} 120 121static void uli_scr_cfg_write(struct ata_link *link, unsigned int scr, u32 val) 122{ 123 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); 124 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr); 125 126 pci_write_config_dword(pdev, cfg_addr, val); 127} 128 129static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) 130{ 131 if (sc_reg > SCR_CONTROL) 132 return -EINVAL; 133 134 *val = uli_scr_cfg_read(link, sc_reg); 135 return 0; 136} 137 138static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) 139{ 140 if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0 141 return -EINVAL; 142 143 uli_scr_cfg_write(link, sc_reg, val); 144 return 0; 145} 146 147static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 148{ 149 static int printed_version; 150 const struct ata_port_info *ppi[] = { &uli_port_info, NULL }; 151 unsigned int board_idx = (unsigned int) ent->driver_data; 152 struct ata_host *host; 153 struct uli_priv *hpriv; 154 void __iomem * const *iomap; 155 struct ata_ioports *ioaddr; 156 int n_ports, rc; 157 158 if (!printed_version++) 159 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); 160 161 rc = pcim_enable_device(pdev); 162 if (rc) 163 return rc; 164 165 n_ports = 2; 166 if (board_idx == uli_5287) 167 n_ports = 4; 168 169 /* allocate the host */ 170 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports); 171 if (!host) 172 return -ENOMEM; 173 174 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL); 175 if (!hpriv) 176 return -ENOMEM; 177 host->private_data = hpriv; 178 179 /* the first two ports are standard SFF */ 180 rc = ata_pci_sff_init_host(host); 181 if (rc) 182 return rc; 183 184 ata_pci_bmdma_init(host); 185 186 iomap = host->iomap; 187 188 switch (board_idx) { 189 case uli_5287: 190 /* If there are four, the last two live right after 191 * the standard SFF ports. 192 */ 193 hpriv->scr_cfg_addr[0] = ULI5287_BASE; 194 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS; 195 196 ioaddr = &host->ports[2]->ioaddr; 197 ioaddr->cmd_addr = iomap[0] + 8; 198 ioaddr->altstatus_addr = 199 ioaddr->ctl_addr = (void __iomem *) 200 ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4; 201 ioaddr->bmdma_addr = iomap[4] + 16; 202 hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4; 203 ata_sff_std_ports(ioaddr); 204 205 ata_port_desc(host->ports[2], 206 "cmd 0x%llx ctl 0x%llx bmdma 0x%llx", 207 (unsigned long long)pci_resource_start(pdev, 0) + 8, 208 ((unsigned long long)pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4, 209 (unsigned long long)pci_resource_start(pdev, 4) + 16); 210 211 ioaddr = &host->ports[3]->ioaddr; 212 ioaddr->cmd_addr = iomap[2] + 8; 213 ioaddr->altstatus_addr = 214 ioaddr->ctl_addr = (void __iomem *) 215 ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4; 216 ioaddr->bmdma_addr = iomap[4] + 24; 217 hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5; 218 ata_sff_std_ports(ioaddr); 219 220 ata_port_desc(host->ports[2], 221 "cmd 0x%llx ctl 0x%llx bmdma 0x%llx", 222 (unsigned long long)pci_resource_start(pdev, 2) + 9, 223 ((unsigned long long)pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4, 224 (unsigned long long)pci_resource_start(pdev, 4) + 24); 225 226 break; 227 228 case uli_5289: 229 hpriv->scr_cfg_addr[0] = ULI5287_BASE; 230 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS; 231 break; 232 233 case uli_5281: 234 hpriv->scr_cfg_addr[0] = ULI5281_BASE; 235 hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS; 236 break; 237 238 default: 239 BUG(); 240 break; 241 } 242 243 pci_set_master(pdev); 244 pci_intx(pdev, 1); 245 return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt, 246 IRQF_SHARED, &uli_sht); 247} 248 249static int __init uli_init(void) 250{ 251 return pci_register_driver(&uli_pci_driver); 252} 253 254static void __exit uli_exit(void) 255{ 256 pci_unregister_driver(&uli_pci_driver); 257} 258 259 260module_init(uli_init); 261module_exit(uli_exit); 262