1/* 2 * SH7705 Setup 3 * 4 * Copyright (C) 2006 - 2009 Paul Mundt 5 * Copyright (C) 2007 Nobuhiro Iwamatsu 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file "COPYING" in the main directory of this archive 9 * for more details. 10 */ 11#include <linux/platform_device.h> 12#include <linux/init.h> 13#include <linux/irq.h> 14#include <linux/serial.h> 15#include <linux/serial_sci.h> 16#include <linux/sh_timer.h> 17#include <asm/rtc.h> 18 19enum { 20 UNUSED = 0, 21 22 /* interrupt sources */ 23 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, 24 PINT07, PINT815, 25 26 DMAC, SCIF0, SCIF2, ADC_ADI, USB, 27 28 TPU0, TPU1, TPU2, TPU3, 29 TMU0, TMU1, TMU2, 30 31 RTC, WDT, REF_RCMI, 32}; 33 34static struct intc_vect vectors[] __initdata = { 35 /* IRQ0->5 are handled in setup-sh3.c */ 36 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720), 37 INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820), 38 INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860), 39 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0), 40 INTC_VECT(SCIF0, 0x8e0), 41 INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920), 42 INTC_VECT(SCIF2, 0x960), 43 INTC_VECT(ADC_ADI, 0x980), 44 INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40), 45 INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20), 46 INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0), 47 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 48 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460), 49 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), 50 INTC_VECT(RTC, 0x4c0), 51 INTC_VECT(WDT, 0x560), 52 INTC_VECT(REF_RCMI, 0x580), 53}; 54 55static struct intc_prio_reg prio_registers[] __initdata = { 56 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, 57 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } }, 58 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, 59 { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } }, 60 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } }, 61 { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, 0, USB } }, 62 { 0xa4080002, 0, 16, 4, /* IPRG */ { TPU0, TPU1 } }, 63 { 0xa4080004, 0, 16, 4, /* IPRH */ { TPU2, TPU3 } }, 64 65}; 66 67static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL, 68 NULL, prio_registers, NULL); 69 70static struct plat_sci_port scif0_platform_data = { 71 .mapbase = 0xa4410000, 72 .flags = UPF_BOOT_AUTOCONF, 73 .type = PORT_SCIF, 74 .irqs = { 56, 56, 56 }, 75}; 76 77static struct platform_device scif0_device = { 78 .name = "sh-sci", 79 .id = 0, 80 .dev = { 81 .platform_data = &scif0_platform_data, 82 }, 83}; 84 85static struct plat_sci_port scif1_platform_data = { 86 .mapbase = 0xa4400000, 87 .flags = UPF_BOOT_AUTOCONF, 88 .type = PORT_SCIF, 89 .irqs = { 52, 52, 52 }, 90}; 91 92static struct platform_device scif1_device = { 93 .name = "sh-sci", 94 .id = 1, 95 .dev = { 96 .platform_data = &scif1_platform_data, 97 }, 98}; 99 100static struct resource rtc_resources[] = { 101 [0] = { 102 .start = 0xfffffec0, 103 .end = 0xfffffec0 + 0x1e, 104 .flags = IORESOURCE_IO, 105 }, 106 [1] = { 107 .start = 20, 108 .flags = IORESOURCE_IRQ, 109 }, 110}; 111 112static struct sh_rtc_platform_info rtc_info = { 113 .capabilities = RTC_CAP_4_DIGIT_YEAR, 114}; 115 116static struct platform_device rtc_device = { 117 .name = "sh-rtc", 118 .id = -1, 119 .num_resources = ARRAY_SIZE(rtc_resources), 120 .resource = rtc_resources, 121 .dev = { 122 .platform_data = &rtc_info, 123 }, 124}; 125 126static struct sh_timer_config tmu0_platform_data = { 127 .channel_offset = 0x02, 128 .timer_bit = 0, 129 .clockevent_rating = 200, 130}; 131 132static struct resource tmu0_resources[] = { 133 [0] = { 134 .start = 0xfffffe94, 135 .end = 0xfffffe9f, 136 .flags = IORESOURCE_MEM, 137 }, 138 [1] = { 139 .start = 16, 140 .flags = IORESOURCE_IRQ, 141 }, 142}; 143 144static struct platform_device tmu0_device = { 145 .name = "sh_tmu", 146 .id = 0, 147 .dev = { 148 .platform_data = &tmu0_platform_data, 149 }, 150 .resource = tmu0_resources, 151 .num_resources = ARRAY_SIZE(tmu0_resources), 152}; 153 154static struct sh_timer_config tmu1_platform_data = { 155 .channel_offset = 0xe, 156 .timer_bit = 1, 157 .clocksource_rating = 200, 158}; 159 160static struct resource tmu1_resources[] = { 161 [0] = { 162 .start = 0xfffffea0, 163 .end = 0xfffffeab, 164 .flags = IORESOURCE_MEM, 165 }, 166 [1] = { 167 .start = 17, 168 .flags = IORESOURCE_IRQ, 169 }, 170}; 171 172static struct platform_device tmu1_device = { 173 .name = "sh_tmu", 174 .id = 1, 175 .dev = { 176 .platform_data = &tmu1_platform_data, 177 }, 178 .resource = tmu1_resources, 179 .num_resources = ARRAY_SIZE(tmu1_resources), 180}; 181 182static struct sh_timer_config tmu2_platform_data = { 183 .channel_offset = 0x1a, 184 .timer_bit = 2, 185}; 186 187static struct resource tmu2_resources[] = { 188 [0] = { 189 .start = 0xfffffeac, 190 .end = 0xfffffebb, 191 .flags = IORESOURCE_MEM, 192 }, 193 [1] = { 194 .start = 18, 195 .flags = IORESOURCE_IRQ, 196 }, 197}; 198 199static struct platform_device tmu2_device = { 200 .name = "sh_tmu", 201 .id = 2, 202 .dev = { 203 .platform_data = &tmu2_platform_data, 204 }, 205 .resource = tmu2_resources, 206 .num_resources = ARRAY_SIZE(tmu2_resources), 207}; 208 209static struct platform_device *sh7705_devices[] __initdata = { 210 &scif0_device, 211 &scif1_device, 212 &tmu0_device, 213 &tmu1_device, 214 &tmu2_device, 215 &rtc_device, 216}; 217 218static int __init sh7705_devices_setup(void) 219{ 220 return platform_add_devices(sh7705_devices, 221 ARRAY_SIZE(sh7705_devices)); 222} 223arch_initcall(sh7705_devices_setup); 224 225static struct platform_device *sh7705_early_devices[] __initdata = { 226 &scif0_device, 227 &scif1_device, 228 &tmu0_device, 229 &tmu1_device, 230 &tmu2_device, 231}; 232 233void __init plat_early_device_setup(void) 234{ 235 early_platform_add_devices(sh7705_early_devices, 236 ARRAY_SIZE(sh7705_early_devices)); 237} 238 239void __init plat_irq_setup(void) 240{ 241 register_intc_controller(&intc_desc); 242 plat_irq_setup_sh3(); 243} 244