1/* 2 * include/asm-sh/cpu-sh3/gpio.h 3 * 4 * Copyright (C) 2007 Markus Brunner, Mark Jonas 5 * 6 * Addresses for the Pin Function Controller 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12#ifndef _CPU_SH3_GPIO_H 13#define _CPU_SH3_GPIO_H 14 15#if defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721) 16 17/* Control registers */ 18#define PORT_PACR 0xA4050100UL 19#define PORT_PBCR 0xA4050102UL 20#define PORT_PCCR 0xA4050104UL 21#define PORT_PDCR 0xA4050106UL 22#define PORT_PECR 0xA4050108UL 23#define PORT_PFCR 0xA405010AUL 24#define PORT_PGCR 0xA405010CUL 25#define PORT_PHCR 0xA405010EUL 26#define PORT_PJCR 0xA4050110UL 27#define PORT_PKCR 0xA4050112UL 28#define PORT_PLCR 0xA4050114UL 29#define PORT_PMCR 0xA4050116UL 30#define PORT_PPCR 0xA4050118UL 31#define PORT_PRCR 0xA405011AUL 32#define PORT_PSCR 0xA405011CUL 33#define PORT_PTCR 0xA405011EUL 34#define PORT_PUCR 0xA4050120UL 35#define PORT_PVCR 0xA4050122UL 36 37/* Data registers */ 38#define PORT_PADR 0xA4050140UL 39/* Address of PORT_PBDR is wrong in the datasheet, see errata 2005-09-21 */ 40#define PORT_PBDR 0xA4050142UL 41#define PORT_PCDR 0xA4050144UL 42#define PORT_PDDR 0xA4050146UL 43#define PORT_PEDR 0xA4050148UL 44#define PORT_PFDR 0xA405014AUL 45#define PORT_PGDR 0xA405014CUL 46#define PORT_PHDR 0xA405014EUL 47#define PORT_PJDR 0xA4050150UL 48#define PORT_PKDR 0xA4050152UL 49#define PORT_PLDR 0xA4050154UL 50#define PORT_PMDR 0xA4050156UL 51#define PORT_PPDR 0xA4050158UL 52#define PORT_PRDR 0xA405015AUL 53#define PORT_PSDR 0xA405015CUL 54#define PORT_PTDR 0xA405015EUL 55#define PORT_PUDR 0xA4050160UL 56#define PORT_PVDR 0xA4050162UL 57 58/* Pin Select Registers */ 59#define PORT_PSELA 0xA4050124UL 60#define PORT_PSELB 0xA4050126UL 61#define PORT_PSELC 0xA4050128UL 62#define PORT_PSELD 0xA405012AUL 63 64#elif defined(CONFIG_CPU_SUBTYPE_SH7709) 65 66/* Control registers */ 67#define PORT_PACR 0xa4000100UL 68#define PORT_PBCR 0xa4000102UL 69#define PORT_PCCR 0xa4000104UL 70#define PORT_PFCR 0xa400010aUL 71 72/* Data registers */ 73#define PORT_PADR 0xa4000120UL 74#define PORT_PBDR 0xa4000122UL 75#define PORT_PCDR 0xa4000124UL 76#define PORT_PFDR 0xa400012aUL 77 78#endif 79 80#endif 81