1#ifndef __ASM_SH_IRQ_H 2#define __ASM_SH_IRQ_H 3 4#include <linux/cpumask.h> 5#include <asm/machvec.h> 6 7/* 8 * A sane default based on a reasonable vector table size, platforms are 9 * advised to cap this at the hard limit that they're interested in 10 * through the machvec. 11 */ 12#define NR_IRQS 256 13#define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */ 14 15/* 16 * This is a special IRQ number for indicating that no IRQ has been 17 * triggered and to simply ignore the IRQ dispatch. This is a special 18 * case that can happen with IRQ auto-distribution when multiple CPUs 19 * are woken up and signalled in parallel. 20 */ 21#define NO_IRQ_IGNORE ((unsigned int)-1) 22 23/* 24 * Convert back and forth between INTEVT and IRQ values. 25 */ 26#ifdef CONFIG_CPU_HAS_INTEVT 27#define evt2irq(evt) (((evt) >> 5) - 16) 28#define irq2evt(irq) (((irq) + 16) << 5) 29#else 30#define evt2irq(evt) (evt) 31#define irq2evt(irq) (irq) 32#endif 33 34/* 35 * Simple Mask Register Support 36 */ 37extern void make_maskreg_irq(unsigned int irq); 38extern unsigned short *irq_mask_register; 39 40/* 41 * PINT IRQs 42 */ 43void init_IRQ_pint(void); 44void make_imask_irq(unsigned int irq); 45 46static inline int generic_irq_demux(int irq) 47{ 48 return irq; 49} 50 51#define irq_demux(irq) sh_mv.mv_irq_demux(irq) 52 53void init_IRQ(void); 54void migrate_irqs(void); 55 56asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs); 57 58#ifdef CONFIG_IRQSTACKS 59extern void irq_ctx_init(int cpu); 60extern void irq_ctx_exit(int cpu); 61# define __ARCH_HAS_DO_SOFTIRQ 62#else 63# define irq_ctx_init(cpu) do { } while (0) 64# define irq_ctx_exit(cpu) do { } while (0) 65#endif 66 67#ifdef CONFIG_INTC_BALANCING 68extern unsigned int irq_lookup(unsigned int irq); 69extern void irq_finish(unsigned int irq); 70#else 71#define irq_lookup(irq) (irq) 72#define irq_finish(irq) do { } while (0) 73#endif 74 75#include <asm-generic/irq.h> 76#ifdef CONFIG_CPU_SH5 77#include <cpu/irq.h> 78#endif 79 80#endif /* __ASM_SH_IRQ_H */ 81