1/* 2 * Common prep/pmac/chrp boot and setup code. 3 */ 4 5#include <linux/module.h> 6#include <linux/string.h> 7#include <linux/sched.h> 8#include <linux/init.h> 9#include <linux/kernel.h> 10#include <linux/reboot.h> 11#include <linux/delay.h> 12#include <linux/initrd.h> 13#include <linux/tty.h> 14#include <linux/bootmem.h> 15#include <linux/seq_file.h> 16#include <linux/root_dev.h> 17#include <linux/cpu.h> 18#include <linux/console.h> 19#include <linux/memblock.h> 20 21#include <asm/io.h> 22#include <asm/prom.h> 23#include <asm/processor.h> 24#include <asm/pgtable.h> 25#include <asm/setup.h> 26#include <asm/smp.h> 27#include <asm/elf.h> 28#include <asm/cputable.h> 29#include <asm/bootx.h> 30#include <asm/btext.h> 31#include <asm/machdep.h> 32#include <asm/uaccess.h> 33#include <asm/system.h> 34#include <asm/pmac_feature.h> 35#include <asm/sections.h> 36#include <asm/nvram.h> 37#include <asm/xmon.h> 38#include <asm/time.h> 39#include <asm/serial.h> 40#include <asm/udbg.h> 41#include <asm/mmu_context.h> 42 43#include "setup.h" 44 45#define DBG(fmt...) 46 47extern void bootx_init(unsigned long r4, unsigned long phys); 48 49int boot_cpuid; 50EXPORT_SYMBOL_GPL(boot_cpuid); 51int boot_cpuid_phys; 52 53int smp_hw_index[NR_CPUS]; 54 55unsigned long ISA_DMA_THRESHOLD; 56unsigned int DMA_MODE_READ; 57unsigned int DMA_MODE_WRITE; 58 59#ifdef CONFIG_VGA_CONSOLE 60unsigned long vgacon_remap_base; 61EXPORT_SYMBOL(vgacon_remap_base); 62#endif 63 64/* 65 * These are used in binfmt_elf.c to put aux entries on the stack 66 * for each elf executable being started. 67 */ 68int dcache_bsize; 69int icache_bsize; 70int ucache_bsize; 71 72/* 73 * We're called here very early in the boot. We determine the machine 74 * type and call the appropriate low-level setup functions. 75 * -- Cort <cort@fsmlabs.com> 76 * 77 * Note that the kernel may be running at an address which is different 78 * from the address that it was linked at, so we must use RELOC/PTRRELOC 79 * to access static data (including strings). -- paulus 80 */ 81notrace unsigned long __init early_init(unsigned long dt_ptr) 82{ 83 unsigned long offset = reloc_offset(); 84 struct cpu_spec *spec; 85 86 /* First zero the BSS -- use memset_io, some platforms don't have 87 * caches on yet */ 88 memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, 89 __bss_stop - __bss_start); 90 91 /* 92 * Identify the CPU type and fix up code sections 93 * that depend on which cpu we have. 94 */ 95 spec = identify_cpu(offset, mfspr(SPRN_PVR)); 96 97 do_feature_fixups(spec->cpu_features, 98 PTRRELOC(&__start___ftr_fixup), 99 PTRRELOC(&__stop___ftr_fixup)); 100 101 do_feature_fixups(spec->mmu_features, 102 PTRRELOC(&__start___mmu_ftr_fixup), 103 PTRRELOC(&__stop___mmu_ftr_fixup)); 104 105 do_lwsync_fixups(spec->cpu_features, 106 PTRRELOC(&__start___lwsync_fixup), 107 PTRRELOC(&__stop___lwsync_fixup)); 108 109 return KERNELBASE + offset; 110} 111 112 113/* 114 * Find out what kind of machine we're on and save any data we need 115 * from the early boot process (devtree is copied on pmac by prom_init()). 116 * This is called very early on the boot process, after a minimal 117 * MMU environment has been set up but before MMU_init is called. 118 */ 119notrace void __init machine_init(unsigned long dt_ptr) 120{ 121 lockdep_init(); 122 123 /* Enable early debugging if any specified (see udbg.h) */ 124 udbg_early_init(); 125 126 /* Do some early initialization based on the flat device tree */ 127 early_init_devtree(__va(dt_ptr)); 128 129 probe_machine(); 130 131 setup_kdump_trampoline(); 132 133#ifdef CONFIG_6xx 134 if (cpu_has_feature(CPU_FTR_CAN_DOZE) || 135 cpu_has_feature(CPU_FTR_CAN_NAP)) 136 ppc_md.power_save = ppc6xx_idle; 137#endif 138 139#ifdef CONFIG_E500 140 if (cpu_has_feature(CPU_FTR_CAN_DOZE) || 141 cpu_has_feature(CPU_FTR_CAN_NAP)) 142 ppc_md.power_save = e500_idle; 143#endif 144 if (ppc_md.progress) 145 ppc_md.progress("id mach(): done", 0x200); 146} 147 148#ifdef CONFIG_BOOKE_WDT 149/* Checks wdt=x and wdt_period=xx command-line option */ 150notrace int __init early_parse_wdt(char *p) 151{ 152 if (p && strncmp(p, "0", 1) != 0) 153 booke_wdt_enabled = 1; 154 155 return 0; 156} 157early_param("wdt", early_parse_wdt); 158 159int __init early_parse_wdt_period (char *p) 160{ 161 if (p) 162 booke_wdt_period = simple_strtoul(p, NULL, 0); 163 164 return 0; 165} 166early_param("wdt_period", early_parse_wdt_period); 167#endif /* CONFIG_BOOKE_WDT */ 168 169int __init ppc_setup_l2cr(char *str) 170{ 171 if (cpu_has_feature(CPU_FTR_L2CR)) { 172 unsigned long val = simple_strtoul(str, NULL, 0); 173 printk(KERN_INFO "l2cr set to %lx\n", val); 174 _set_L2CR(0); /* force invalidate by disable cache */ 175 _set_L2CR(val); /* and enable it */ 176 } 177 return 1; 178} 179__setup("l2cr=", ppc_setup_l2cr); 180 181int __init ppc_setup_l3cr(char *str) 182{ 183 if (cpu_has_feature(CPU_FTR_L3CR)) { 184 unsigned long val = simple_strtoul(str, NULL, 0); 185 printk(KERN_INFO "l3cr set to %lx\n", val); 186 _set_L3CR(val); /* and enable it */ 187 } 188 return 1; 189} 190__setup("l3cr=", ppc_setup_l3cr); 191 192#ifdef CONFIG_GENERIC_NVRAM 193 194/* Generic nvram hooks used by drivers/char/gen_nvram.c */ 195unsigned char nvram_read_byte(int addr) 196{ 197 if (ppc_md.nvram_read_val) 198 return ppc_md.nvram_read_val(addr); 199 return 0xff; 200} 201EXPORT_SYMBOL(nvram_read_byte); 202 203void nvram_write_byte(unsigned char val, int addr) 204{ 205 if (ppc_md.nvram_write_val) 206 ppc_md.nvram_write_val(addr, val); 207} 208EXPORT_SYMBOL(nvram_write_byte); 209 210ssize_t nvram_get_size(void) 211{ 212 if (ppc_md.nvram_size) 213 return ppc_md.nvram_size(); 214 return -1; 215} 216EXPORT_SYMBOL(nvram_get_size); 217 218void nvram_sync(void) 219{ 220 if (ppc_md.nvram_sync) 221 ppc_md.nvram_sync(); 222} 223EXPORT_SYMBOL(nvram_sync); 224 225#endif /* CONFIG_NVRAM */ 226 227int __init ppc_init(void) 228{ 229 /* clear the progress line */ 230 if (ppc_md.progress) 231 ppc_md.progress(" ", 0xffff); 232 233 /* call platform init */ 234 if (ppc_md.init != NULL) { 235 ppc_md.init(); 236 } 237 return 0; 238} 239 240arch_initcall(ppc_init); 241 242static void __init irqstack_early_init(void) 243{ 244 unsigned int i; 245 246 /* interrupt stacks must be in lowmem, we get that for free on ppc32 247 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */ 248 for_each_possible_cpu(i) { 249 softirq_ctx[i] = (struct thread_info *) 250 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 251 hardirq_ctx[i] = (struct thread_info *) 252 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 253 } 254} 255 256#if defined(CONFIG_BOOKE) || defined(CONFIG_40x) 257static void __init exc_lvl_early_init(void) 258{ 259 unsigned int i, hw_cpu; 260 261 /* interrupt stacks must be in lowmem, we get that for free on ppc32 262 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */ 263 for_each_possible_cpu(i) { 264 hw_cpu = get_hard_smp_processor_id(i); 265 critirq_ctx[hw_cpu] = (struct thread_info *) 266 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 267#ifdef CONFIG_BOOKE 268 dbgirq_ctx[hw_cpu] = (struct thread_info *) 269 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 270 mcheckirq_ctx[hw_cpu] = (struct thread_info *) 271 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 272#endif 273 } 274} 275#else 276#define exc_lvl_early_init() 277#endif 278 279/* Warning, IO base is not yet inited */ 280void __init setup_arch(char **cmdline_p) 281{ 282 *cmdline_p = cmd_line; 283 284 /* so udelay does something sensible, assume <= 1000 bogomips */ 285 loops_per_jiffy = 500000000 / HZ; 286 287 unflatten_device_tree(); 288 check_for_initrd(); 289 290 if (ppc_md.init_early) 291 ppc_md.init_early(); 292 293 find_legacy_serial_ports(); 294 295 smp_setup_cpu_maps(); 296 297 /* Register early console */ 298 register_early_udbg_console(); 299 300 xmon_setup(); 301 302 /* 303 * Set cache line size based on type of cpu as a default. 304 * Systems with OF can look in the properties on the cpu node(s) 305 * for a possibly more accurate value. 306 */ 307 dcache_bsize = cur_cpu_spec->dcache_bsize; 308 icache_bsize = cur_cpu_spec->icache_bsize; 309 ucache_bsize = 0; 310 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) 311 ucache_bsize = icache_bsize = dcache_bsize; 312 313 /* reboot on panic */ 314 panic_timeout = 180; 315 316 if (ppc_md.panic) 317 setup_panic(); 318 319 init_mm.start_code = (unsigned long)_stext; 320 init_mm.end_code = (unsigned long) _etext; 321 init_mm.end_data = (unsigned long) _edata; 322 init_mm.brk = klimit; 323 324 exc_lvl_early_init(); 325 326 irqstack_early_init(); 327 328 /* set up the bootmem stuff with available memory */ 329 do_init_bootmem(); 330 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab); 331 332#ifdef CONFIG_DUMMY_CONSOLE 333 conswitchp = &dummy_con; 334#endif 335 336 if (ppc_md.setup_arch) 337 ppc_md.setup_arch(); 338 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); 339 340 paging_init(); 341 342 /* Initialize the MMU context management stuff */ 343 mmu_context_init(); 344 345} 346