1/* MN10300 On-chip serial port UART driver 2 * 3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. 4 * Written by David Howells (dhowells@redhat.com) 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public Licence 8 * as published by the Free Software Foundation; either version 9 * 2 of the Licence, or (at your option) any later version. 10 */ 11 12static const char serial_name[] = "MN10300 Serial driver"; 13static const char serial_version[] = "mn10300_serial-1.0"; 14static const char serial_revdate[] = "2007-11-06"; 15 16#if defined(CONFIG_MN10300_TTYSM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 17#define SUPPORT_SYSRQ 18#endif 19 20#include <linux/module.h> 21#include <linux/serial.h> 22#include <linux/circ_buf.h> 23#include <linux/errno.h> 24#include <linux/signal.h> 25#include <linux/sched.h> 26#include <linux/timer.h> 27#include <linux/interrupt.h> 28#include <linux/tty.h> 29#include <linux/tty_flip.h> 30#include <linux/major.h> 31#include <linux/string.h> 32#include <linux/ioport.h> 33#include <linux/mm.h> 34#include <linux/slab.h> 35#include <linux/init.h> 36#include <linux/console.h> 37#include <linux/sysrq.h> 38 39#include <asm/system.h> 40#include <asm/io.h> 41#include <asm/irq.h> 42#include <asm/bitops.h> 43#include <asm/serial-regs.h> 44#include <unit/timex.h> 45#include "mn10300-serial.h" 46 47#define kenter(FMT, ...) \ 48 printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__) 49#define _enter(FMT, ...) \ 50 no_printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__) 51#define kdebug(FMT, ...) \ 52 printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__) 53#define _debug(FMT, ...) \ 54 no_printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__) 55#define kproto(FMT, ...) \ 56 printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__) 57#define _proto(FMT, ...) \ 58 no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__) 59 60#define NR_UARTS 3 61 62#ifdef CONFIG_MN10300_TTYSM_CONSOLE 63static void mn10300_serial_console_write(struct console *co, 64 const char *s, unsigned count); 65static int __init mn10300_serial_console_setup(struct console *co, 66 char *options); 67 68static struct uart_driver mn10300_serial_driver; 69static struct console mn10300_serial_console = { 70 .name = "ttySM", 71 .write = mn10300_serial_console_write, 72 .device = uart_console_device, 73 .setup = mn10300_serial_console_setup, 74 .flags = CON_PRINTBUFFER, 75 .index = -1, 76 .data = &mn10300_serial_driver, 77}; 78#endif 79 80static struct uart_driver mn10300_serial_driver = { 81 .owner = NULL, 82 .driver_name = "mn10300-serial", 83 .dev_name = "ttySM", 84 .major = TTY_MAJOR, 85 .minor = 128, 86 .nr = NR_UARTS, 87#ifdef CONFIG_MN10300_TTYSM_CONSOLE 88 .cons = &mn10300_serial_console, 89#endif 90}; 91 92static unsigned int mn10300_serial_tx_empty(struct uart_port *); 93static void mn10300_serial_set_mctrl(struct uart_port *, unsigned int mctrl); 94static unsigned int mn10300_serial_get_mctrl(struct uart_port *); 95static void mn10300_serial_stop_tx(struct uart_port *); 96static void mn10300_serial_start_tx(struct uart_port *); 97static void mn10300_serial_send_xchar(struct uart_port *, char ch); 98static void mn10300_serial_stop_rx(struct uart_port *); 99static void mn10300_serial_enable_ms(struct uart_port *); 100static void mn10300_serial_break_ctl(struct uart_port *, int ctl); 101static int mn10300_serial_startup(struct uart_port *); 102static void mn10300_serial_shutdown(struct uart_port *); 103static void mn10300_serial_set_termios(struct uart_port *, 104 struct ktermios *new, 105 struct ktermios *old); 106static const char *mn10300_serial_type(struct uart_port *); 107static void mn10300_serial_release_port(struct uart_port *); 108static int mn10300_serial_request_port(struct uart_port *); 109static void mn10300_serial_config_port(struct uart_port *, int); 110static int mn10300_serial_verify_port(struct uart_port *, 111 struct serial_struct *); 112 113static const struct uart_ops mn10300_serial_ops = { 114 .tx_empty = mn10300_serial_tx_empty, 115 .set_mctrl = mn10300_serial_set_mctrl, 116 .get_mctrl = mn10300_serial_get_mctrl, 117 .stop_tx = mn10300_serial_stop_tx, 118 .start_tx = mn10300_serial_start_tx, 119 .send_xchar = mn10300_serial_send_xchar, 120 .stop_rx = mn10300_serial_stop_rx, 121 .enable_ms = mn10300_serial_enable_ms, 122 .break_ctl = mn10300_serial_break_ctl, 123 .startup = mn10300_serial_startup, 124 .shutdown = mn10300_serial_shutdown, 125 .set_termios = mn10300_serial_set_termios, 126 .type = mn10300_serial_type, 127 .release_port = mn10300_serial_release_port, 128 .request_port = mn10300_serial_request_port, 129 .config_port = mn10300_serial_config_port, 130 .verify_port = mn10300_serial_verify_port, 131}; 132 133static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id); 134 135/* 136 * the first on-chip serial port: ttySM0 (aka SIF0) 137 */ 138#ifdef CONFIG_MN10300_TTYSM0 139struct mn10300_serial_port mn10300_serial_port_sif0 = { 140 .uart.ops = &mn10300_serial_ops, 141 .uart.membase = (void __iomem *) &SC0CTR, 142 .uart.mapbase = (unsigned long) &SC0CTR, 143 .uart.iotype = UPIO_MEM, 144 .uart.irq = 0, 145 .uart.uartclk = 0, /* MN10300_IOCLK, */ 146 .uart.fifosize = 1, 147 .uart.flags = UPF_BOOT_AUTOCONF, 148 .uart.line = 0, 149 .uart.type = PORT_MN10300, 150 .uart.lock = 151 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif0.uart.lock), 152 .name = "ttySM0", 153 ._iobase = &SC0CTR, 154 ._control = &SC0CTR, 155 ._status = (volatile u8 *) &SC0STR, 156 ._intr = &SC0ICR, 157 ._rxb = &SC0RXB, 158 ._txb = &SC0TXB, 159 .rx_name = "ttySM0:Rx", 160 .tx_name = "ttySM0:Tx", 161#ifdef CONFIG_MN10300_TTYSM0_TIMER8 162 .tm_name = "ttySM0:Timer8", 163 ._tmxmd = &TM8MD, 164 ._tmxbr = &TM8BR, 165 ._tmicr = &TM8ICR, 166 .tm_irq = TM8IRQ, 167 .div_timer = MNSCx_DIV_TIMER_16BIT, 168#else /* CONFIG_MN10300_TTYSM0_TIMER2 */ 169 .tm_name = "ttySM0:Timer2", 170 ._tmxmd = &TM2MD, 171 ._tmxbr = (volatile u16 *) &TM2BR, 172 ._tmicr = &TM2ICR, 173 .tm_irq = TM2IRQ, 174 .div_timer = MNSCx_DIV_TIMER_8BIT, 175#endif 176 .rx_irq = SC0RXIRQ, 177 .tx_irq = SC0TXIRQ, 178 .rx_icr = &GxICR(SC0RXIRQ), 179 .tx_icr = &GxICR(SC0TXIRQ), 180 .clock_src = MNSCx_CLOCK_SRC_IOCLK, 181 .options = 0, 182#ifdef CONFIG_GDBSTUB_ON_TTYSM0 183 .gdbstub = 1, 184#endif 185}; 186#endif /* CONFIG_MN10300_TTYSM0 */ 187 188/* 189 * the second on-chip serial port: ttySM1 (aka SIF1) 190 */ 191#ifdef CONFIG_MN10300_TTYSM1 192struct mn10300_serial_port mn10300_serial_port_sif1 = { 193 .uart.ops = &mn10300_serial_ops, 194 .uart.membase = (void __iomem *) &SC1CTR, 195 .uart.mapbase = (unsigned long) &SC1CTR, 196 .uart.iotype = UPIO_MEM, 197 .uart.irq = 0, 198 .uart.uartclk = 0, /* MN10300_IOCLK, */ 199 .uart.fifosize = 1, 200 .uart.flags = UPF_BOOT_AUTOCONF, 201 .uart.line = 1, 202 .uart.type = PORT_MN10300, 203 .uart.lock = 204 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif1.uart.lock), 205 .name = "ttySM1", 206 ._iobase = &SC1CTR, 207 ._control = &SC1CTR, 208 ._status = (volatile u8 *) &SC1STR, 209 ._intr = &SC1ICR, 210 ._rxb = &SC1RXB, 211 ._txb = &SC1TXB, 212 .rx_name = "ttySM1:Rx", 213 .tx_name = "ttySM1:Tx", 214#ifdef CONFIG_MN10300_TTYSM1_TIMER9 215 .tm_name = "ttySM1:Timer9", 216 ._tmxmd = &TM9MD, 217 ._tmxbr = &TM9BR, 218 ._tmicr = &TM9ICR, 219 .tm_irq = TM9IRQ, 220 .div_timer = MNSCx_DIV_TIMER_16BIT, 221#else /* CONFIG_MN10300_TTYSM1_TIMER3 */ 222 .tm_name = "ttySM1:Timer3", 223 ._tmxmd = &TM3MD, 224 ._tmxbr = (volatile u16 *) &TM3BR, 225 ._tmicr = &TM3ICR, 226 .tm_irq = TM3IRQ, 227 .div_timer = MNSCx_DIV_TIMER_8BIT, 228#endif 229 .rx_irq = SC1RXIRQ, 230 .tx_irq = SC1TXIRQ, 231 .rx_icr = &GxICR(SC1RXIRQ), 232 .tx_icr = &GxICR(SC1TXIRQ), 233 .clock_src = MNSCx_CLOCK_SRC_IOCLK, 234 .options = 0, 235#ifdef CONFIG_GDBSTUB_ON_TTYSM1 236 .gdbstub = 1, 237#endif 238}; 239#endif /* CONFIG_MN10300_TTYSM1 */ 240 241/* 242 * the third on-chip serial port: ttySM2 (aka SIF2) 243 */ 244#ifdef CONFIG_MN10300_TTYSM2 245struct mn10300_serial_port mn10300_serial_port_sif2 = { 246 .uart.ops = &mn10300_serial_ops, 247 .uart.membase = (void __iomem *) &SC2CTR, 248 .uart.mapbase = (unsigned long) &SC2CTR, 249 .uart.iotype = UPIO_MEM, 250 .uart.irq = 0, 251 .uart.uartclk = 0, /* MN10300_IOCLK, */ 252 .uart.fifosize = 1, 253 .uart.flags = UPF_BOOT_AUTOCONF, 254 .uart.line = 2, 255#ifdef CONFIG_MN10300_TTYSM2_CTS 256 .uart.type = PORT_MN10300_CTS, 257#else 258 .uart.type = PORT_MN10300, 259#endif 260 .uart.lock = 261 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock), 262 .name = "ttySM2", 263 .rx_name = "ttySM2:Rx", 264 .tx_name = "ttySM2:Tx", 265 .tm_name = "ttySM2:Timer10", 266 ._iobase = &SC2CTR, 267 ._control = &SC2CTR, 268 ._status = &SC2STR, 269 ._intr = &SC2ICR, 270 ._rxb = &SC2RXB, 271 ._txb = &SC2TXB, 272 ._tmxmd = &TM10MD, 273 ._tmxbr = &TM10BR, 274 ._tmicr = &TM10ICR, 275 .tm_irq = TM10IRQ, 276 .div_timer = MNSCx_DIV_TIMER_16BIT, 277 .rx_irq = SC2RXIRQ, 278 .tx_irq = SC2TXIRQ, 279 .rx_icr = &GxICR(SC2RXIRQ), 280 .tx_icr = &GxICR(SC2TXIRQ), 281 .clock_src = MNSCx_CLOCK_SRC_IOCLK, 282#ifdef CONFIG_MN10300_TTYSM2_CTS 283 .options = MNSCx_OPT_CTS, 284#else 285 .options = 0, 286#endif 287#ifdef CONFIG_GDBSTUB_ON_TTYSM2 288 .gdbstub = 1, 289#endif 290}; 291#endif /* CONFIG_MN10300_TTYSM2 */ 292 293 294/* 295 * list of available serial ports 296 */ 297struct mn10300_serial_port *mn10300_serial_ports[NR_UARTS + 1] = { 298#ifdef CONFIG_MN10300_TTYSM0 299 [0] = &mn10300_serial_port_sif0, 300#endif 301#ifdef CONFIG_MN10300_TTYSM1 302 [1] = &mn10300_serial_port_sif1, 303#endif 304#ifdef CONFIG_MN10300_TTYSM2 305 [2] = &mn10300_serial_port_sif2, 306#endif 307 [NR_UARTS] = NULL, 308}; 309 310 311/* 312 * we abuse the serial ports' baud timers' interrupt lines to get the ability 313 * to deliver interrupts to userspace as we use the ports' interrupt lines to 314 * do virtual DMA on account of the ports having no hardware FIFOs 315 * 316 * we can generate an interrupt manually in the assembly stubs by writing to 317 * the enable and detect bits in the interrupt control register, so all we need 318 * to do here is disable the interrupt line 319 * 320 * note that we can't just leave the line enabled as the baud rate timer *also* 321 * generates interrupts 322 */ 323static void mn10300_serial_mask_ack(unsigned int irq) 324{ 325 u16 tmp; 326 GxICR(irq) = GxICR_LEVEL_6; 327 tmp = GxICR(irq); /* flush write buffer */ 328} 329 330static void mn10300_serial_nop(unsigned int irq) 331{ 332} 333 334static struct irq_chip mn10300_serial_pic = { 335 .name = "mnserial", 336 .ack = mn10300_serial_mask_ack, 337 .mask = mn10300_serial_mask_ack, 338 .mask_ack = mn10300_serial_mask_ack, 339 .unmask = mn10300_serial_nop, 340 .end = mn10300_serial_nop, 341}; 342 343 344/* 345 * serial virtual DMA interrupt jump table 346 */ 347struct mn10300_serial_int mn10300_serial_int_tbl[NR_IRQS]; 348 349static void mn10300_serial_dis_tx_intr(struct mn10300_serial_port *port) 350{ 351 u16 x; 352 *port->tx_icr = GxICR_LEVEL_1 | GxICR_DETECT; 353 x = *port->tx_icr; 354} 355 356static void mn10300_serial_en_tx_intr(struct mn10300_serial_port *port) 357{ 358 u16 x; 359 *port->tx_icr = GxICR_LEVEL_1 | GxICR_ENABLE; 360 x = *port->tx_icr; 361} 362 363static void mn10300_serial_dis_rx_intr(struct mn10300_serial_port *port) 364{ 365 u16 x; 366 *port->rx_icr = GxICR_LEVEL_1 | GxICR_DETECT; 367 x = *port->rx_icr; 368} 369 370/* 371 * multi-bit equivalent of test_and_clear_bit() 372 */ 373static int mask_test_and_clear(volatile u8 *ptr, u8 mask) 374{ 375 u32 epsw; 376 asm volatile(" bclr %1,(%2) \n" 377 " mov epsw,%0 \n" 378 : "=d"(epsw) : "d"(mask), "a"(ptr) 379 : "cc", "memory"); 380 return !(epsw & EPSW_FLAG_Z); 381} 382 383/* 384 * receive chars from the ring buffer for this serial port 385 * - must do break detection here (not done in the UART) 386 */ 387static void mn10300_serial_receive_interrupt(struct mn10300_serial_port *port) 388{ 389 struct uart_icount *icount = &port->uart.icount; 390 struct tty_struct *tty = port->uart.state->port.tty; 391 unsigned ix; 392 int count; 393 u8 st, ch, push, status, overrun; 394 395 _enter("%s", port->name); 396 397 push = 0; 398 399 count = CIRC_CNT(port->rx_inp, port->rx_outp, MNSC_BUFFER_SIZE); 400 count = tty_buffer_request_room(tty, count); 401 if (count == 0) { 402 if (!tty->low_latency) 403 tty_flip_buffer_push(tty); 404 return; 405 } 406 407try_again: 408 /* pull chars out of the hat */ 409 ix = port->rx_outp; 410 if (ix == port->rx_inp) { 411 if (push && !tty->low_latency) 412 tty_flip_buffer_push(tty); 413 return; 414 } 415 416 ch = port->rx_buffer[ix++]; 417 st = port->rx_buffer[ix++]; 418 smp_rmb(); 419 port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1); 420 port->uart.icount.rx++; 421 422 st &= SC01STR_FEF | SC01STR_PEF | SC01STR_OEF; 423 status = 0; 424 overrun = 0; 425 426 /* the UART doesn't detect BREAK, so we have to do that ourselves 427 * - it starts as a framing error on a NUL character 428 * - then we count another two NUL characters before issuing TTY_BREAK 429 * - then we end on a normal char or one that has all the bottom bits 430 * zero and the top bits set 431 */ 432 switch (port->rx_brk) { 433 case 0: 434 /* not breaking at the moment */ 435 break; 436 437 case 1: 438 if (st & SC01STR_FEF && ch == 0) { 439 port->rx_brk = 2; 440 goto try_again; 441 } 442 goto not_break; 443 444 case 2: 445 if (st & SC01STR_FEF && ch == 0) { 446 port->rx_brk = 3; 447 _proto("Rx Break Detected"); 448 icount->brk++; 449 if (uart_handle_break(&port->uart)) 450 goto ignore_char; 451 status |= 1 << TTY_BREAK; 452 goto insert; 453 } 454 goto not_break; 455 456 default: 457 if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF)) 458 goto try_again; /* still breaking */ 459 460 port->rx_brk = 0; /* end of the break */ 461 462 switch (ch) { 463 case 0xFF: 464 case 0xFE: 465 case 0xFC: 466 case 0xF8: 467 case 0xF0: 468 case 0xE0: 469 case 0xC0: 470 case 0x80: 471 case 0x00: 472 /* discard char at probable break end */ 473 goto try_again; 474 } 475 break; 476 } 477 478process_errors: 479 /* handle framing error */ 480 if (st & SC01STR_FEF) { 481 if (ch == 0) { 482 /* framing error with NUL char is probably a BREAK */ 483 port->rx_brk = 1; 484 goto try_again; 485 } 486 487 _proto("Rx Framing Error"); 488 icount->frame++; 489 status |= 1 << TTY_FRAME; 490 } 491 492 /* handle parity error */ 493 if (st & SC01STR_PEF) { 494 _proto("Rx Parity Error"); 495 icount->parity++; 496 status = TTY_PARITY; 497 } 498 499 /* handle normal char */ 500 if (status == 0) { 501 if (uart_handle_sysrq_char(&port->uart, ch)) 502 goto ignore_char; 503 status = (1 << TTY_NORMAL); 504 } 505 506 /* handle overrun error */ 507 if (st & SC01STR_OEF) { 508 if (port->rx_brk) 509 goto try_again; 510 511 _proto("Rx Overrun Error"); 512 icount->overrun++; 513 overrun = 1; 514 } 515 516insert: 517 status &= port->uart.read_status_mask; 518 519 if (!overrun && !(status & port->uart.ignore_status_mask)) { 520 int flag; 521 522 if (status & (1 << TTY_BREAK)) 523 flag = TTY_BREAK; 524 else if (status & (1 << TTY_PARITY)) 525 flag = TTY_PARITY; 526 else if (status & (1 << TTY_FRAME)) 527 flag = TTY_FRAME; 528 else 529 flag = TTY_NORMAL; 530 531 tty_insert_flip_char(tty, ch, flag); 532 } 533 534 /* overrun is special, since it's reported immediately, and doesn't 535 * affect the current character 536 */ 537 if (overrun) 538 tty_insert_flip_char(tty, 0, TTY_OVERRUN); 539 540 count--; 541 if (count <= 0) { 542 if (!tty->low_latency) 543 tty_flip_buffer_push(tty); 544 return; 545 } 546 547ignore_char: 548 push = 1; 549 goto try_again; 550 551not_break: 552 port->rx_brk = 0; 553 goto process_errors; 554} 555 556/* 557 * handle an interrupt from the serial transmission "virtual DMA" driver 558 * - note: the interrupt routine will disable its own interrupts when the Tx 559 * buffer is empty 560 */ 561static void mn10300_serial_transmit_interrupt(struct mn10300_serial_port *port) 562{ 563 _enter("%s", port->name); 564 565 if (!port->uart.state || !port->uart.state->port.tty) { 566 mn10300_serial_dis_tx_intr(port); 567 return; 568 } 569 570 if (uart_tx_stopped(&port->uart) || 571 uart_circ_empty(&port->uart.state->xmit)) 572 mn10300_serial_dis_tx_intr(port); 573 574 if (uart_circ_chars_pending(&port->uart.state->xmit) < WAKEUP_CHARS) 575 uart_write_wakeup(&port->uart); 576} 577 578/* 579 * deal with a change in the status of the CTS line 580 */ 581static void mn10300_serial_cts_changed(struct mn10300_serial_port *port, u8 st) 582{ 583 u16 ctr; 584 585 port->tx_cts = st; 586 port->uart.icount.cts++; 587 588 /* flip the CTS state selector flag to interrupt when it changes 589 * back */ 590 ctr = *port->_control; 591 ctr ^= SC2CTR_TWS; 592 *port->_control = ctr; 593 594 uart_handle_cts_change(&port->uart, st & SC2STR_CTS); 595 wake_up_interruptible(&port->uart.state->port.delta_msr_wait); 596} 597 598/* 599 * handle a virtual interrupt generated by the lower level "virtual DMA" 600 * routines (irq is the baud timer interrupt) 601 */ 602static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id) 603{ 604 struct mn10300_serial_port *port = dev_id; 605 u8 st; 606 607 spin_lock(&port->uart.lock); 608 609 if (port->intr_flags) { 610 _debug("INT %s: %x", port->name, port->intr_flags); 611 612 if (mask_test_and_clear(&port->intr_flags, MNSCx_RX_AVAIL)) 613 mn10300_serial_receive_interrupt(port); 614 615 if (mask_test_and_clear(&port->intr_flags, 616 MNSCx_TX_SPACE | MNSCx_TX_EMPTY)) 617 mn10300_serial_transmit_interrupt(port); 618 } 619 620 /* the only modem control line amongst the whole lot is CTS on 621 * serial port 2 */ 622 if (port->type == PORT_MN10300_CTS) { 623 st = *port->_status; 624 if ((port->tx_cts ^ st) & SC2STR_CTS) 625 mn10300_serial_cts_changed(port, st); 626 } 627 628 spin_unlock(&port->uart.lock); 629 630 return IRQ_HANDLED; 631} 632 633/* 634 * return indication of whether the hardware transmit buffer is empty 635 */ 636static unsigned int mn10300_serial_tx_empty(struct uart_port *_port) 637{ 638 struct mn10300_serial_port *port = 639 container_of(_port, struct mn10300_serial_port, uart); 640 641 _enter("%s", port->name); 642 643 return (*port->_status & (SC01STR_TXF | SC01STR_TBF)) ? 644 0 : TIOCSER_TEMT; 645} 646 647/* 648 * set the modem control lines (we don't have any) 649 */ 650static void mn10300_serial_set_mctrl(struct uart_port *_port, 651 unsigned int mctrl) 652{ 653 struct mn10300_serial_port *port = 654 container_of(_port, struct mn10300_serial_port, uart); 655 656 _enter("%s,%x", port->name, mctrl); 657} 658 659/* 660 * get the modem control line statuses 661 */ 662static unsigned int mn10300_serial_get_mctrl(struct uart_port *_port) 663{ 664 struct mn10300_serial_port *port = 665 container_of(_port, struct mn10300_serial_port, uart); 666 667 _enter("%s", port->name); 668 669 if (port->type == PORT_MN10300_CTS && !(*port->_status & SC2STR_CTS)) 670 return TIOCM_CAR | TIOCM_DSR; 671 672 return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR; 673} 674 675/* 676 * stop transmitting characters 677 */ 678static void mn10300_serial_stop_tx(struct uart_port *_port) 679{ 680 struct mn10300_serial_port *port = 681 container_of(_port, struct mn10300_serial_port, uart); 682 683 _enter("%s", port->name); 684 685 /* disable the virtual DMA */ 686 mn10300_serial_dis_tx_intr(port); 687} 688 689/* 690 * start transmitting characters 691 * - jump-start transmission if it has stalled 692 * - enable the serial Tx interrupt (used by the virtual DMA controller) 693 * - force an interrupt to happen if necessary 694 */ 695static void mn10300_serial_start_tx(struct uart_port *_port) 696{ 697 struct mn10300_serial_port *port = 698 container_of(_port, struct mn10300_serial_port, uart); 699 700 u16 x; 701 702 _enter("%s{%lu}", 703 port->name, 704 CIRC_CNT(&port->uart.state->xmit.head, 705 &port->uart.state->xmit.tail, 706 UART_XMIT_SIZE)); 707 708 /* kick the virtual DMA controller */ 709 x = *port->tx_icr; 710 x |= GxICR_ENABLE; 711 712 if (*port->_status & SC01STR_TBF) 713 x &= ~(GxICR_REQUEST | GxICR_DETECT); 714 else 715 x |= GxICR_REQUEST | GxICR_DETECT; 716 717 _debug("CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx", 718 *port->_control, *port->_intr, *port->_status, 719 *port->_tmxmd, *port->_tmxbr, *port->tx_icr); 720 721 *port->tx_icr = x; 722 x = *port->tx_icr; 723} 724 725/* 726 * transmit a high-priority XON/XOFF character 727 */ 728static void mn10300_serial_send_xchar(struct uart_port *_port, char ch) 729{ 730 struct mn10300_serial_port *port = 731 container_of(_port, struct mn10300_serial_port, uart); 732 733 _enter("%s,%02x", port->name, ch); 734 735 if (likely(port->gdbstub)) { 736 port->tx_xchar = ch; 737 if (ch) 738 mn10300_serial_en_tx_intr(port); 739 } 740} 741 742/* 743 * stop receiving characters 744 * - called whilst the port is being closed 745 */ 746static void mn10300_serial_stop_rx(struct uart_port *_port) 747{ 748 struct mn10300_serial_port *port = 749 container_of(_port, struct mn10300_serial_port, uart); 750 751 u16 ctr; 752 753 _enter("%s", port->name); 754 755 ctr = *port->_control; 756 ctr &= ~SC01CTR_RXE; 757 *port->_control = ctr; 758 759 mn10300_serial_dis_rx_intr(port); 760} 761 762/* 763 * enable modem status interrupts 764 */ 765static void mn10300_serial_enable_ms(struct uart_port *_port) 766{ 767 struct mn10300_serial_port *port = 768 container_of(_port, struct mn10300_serial_port, uart); 769 770 u16 ctr, cts; 771 772 _enter("%s", port->name); 773 774 if (port->type == PORT_MN10300_CTS) { 775 /* want to interrupt when CTS goes low if CTS is now high and 776 * vice versa 777 */ 778 port->tx_cts = *port->_status; 779 780 cts = (port->tx_cts & SC2STR_CTS) ? 781 SC2CTR_TWE : SC2CTR_TWE | SC2CTR_TWS; 782 783 ctr = *port->_control; 784 ctr &= ~SC2CTR_TWS; 785 ctr |= cts; 786 *port->_control = ctr; 787 788 mn10300_serial_en_tx_intr(port); 789 } 790} 791 792/* 793 * transmit or cease transmitting a break signal 794 */ 795static void mn10300_serial_break_ctl(struct uart_port *_port, int ctl) 796{ 797 struct mn10300_serial_port *port = 798 container_of(_port, struct mn10300_serial_port, uart); 799 800 _enter("%s,%d", port->name, ctl); 801 802 if (ctl) { 803 /* tell the virtual DMA handler to assert BREAK */ 804 port->tx_break = 1; 805 mn10300_serial_en_tx_intr(port); 806 } else { 807 port->tx_break = 0; 808 *port->_control &= ~SC01CTR_BKE; 809 mn10300_serial_en_tx_intr(port); 810 } 811} 812 813/* 814 * grab the interrupts and enable the port for reception 815 */ 816static int mn10300_serial_startup(struct uart_port *_port) 817{ 818 struct mn10300_serial_port *port = 819 container_of(_port, struct mn10300_serial_port, uart); 820 struct mn10300_serial_int *pint; 821 822 _enter("%s{%d}", port->name, port->gdbstub); 823 824 if (unlikely(port->gdbstub)) 825 return -EBUSY; 826 827 /* allocate an Rx buffer for the virtual DMA handler */ 828 port->rx_buffer = kmalloc(MNSC_BUFFER_SIZE, GFP_KERNEL); 829 if (!port->rx_buffer) 830 return -ENOMEM; 831 832 port->rx_inp = port->rx_outp = 0; 833 834 /* finally, enable the device */ 835 *port->_intr = SC01ICR_TI; 836 *port->_control |= SC01CTR_TXE | SC01CTR_RXE; 837 838 pint = &mn10300_serial_int_tbl[port->rx_irq]; 839 pint->port = port; 840 pint->vdma = mn10300_serial_vdma_rx_handler; 841 pint = &mn10300_serial_int_tbl[port->tx_irq]; 842 pint->port = port; 843 pint->vdma = mn10300_serial_vdma_tx_handler; 844 845 set_intr_level(port->rx_irq, GxICR_LEVEL_1); 846 set_intr_level(port->tx_irq, GxICR_LEVEL_1); 847 set_irq_chip(port->tm_irq, &mn10300_serial_pic); 848 849 if (request_irq(port->rx_irq, mn10300_serial_interrupt, 850 IRQF_DISABLED, port->rx_name, port) < 0) 851 goto error; 852 853 if (request_irq(port->tx_irq, mn10300_serial_interrupt, 854 IRQF_DISABLED, port->tx_name, port) < 0) 855 goto error2; 856 857 if (request_irq(port->tm_irq, mn10300_serial_interrupt, 858 IRQF_DISABLED, port->tm_name, port) < 0) 859 goto error3; 860 mn10300_serial_mask_ack(port->tm_irq); 861 862 return 0; 863 864error3: 865 free_irq(port->tx_irq, port); 866error2: 867 free_irq(port->rx_irq, port); 868error: 869 kfree(port->rx_buffer); 870 port->rx_buffer = NULL; 871 return -EBUSY; 872} 873 874/* 875 * shutdown the port and release interrupts 876 */ 877static void mn10300_serial_shutdown(struct uart_port *_port) 878{ 879 struct mn10300_serial_port *port = 880 container_of(_port, struct mn10300_serial_port, uart); 881 882 _enter("%s", port->name); 883 884 /* disable the serial port and its baud rate timer */ 885 port->tx_break = 0; 886 *port->_control &= ~(SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE); 887 *port->_tmxmd = 0; 888 889 if (port->rx_buffer) { 890 void *buf = port->rx_buffer; 891 port->rx_buffer = NULL; 892 kfree(buf); 893 } 894 895 /* disable all intrs */ 896 free_irq(port->tm_irq, port); 897 free_irq(port->rx_irq, port); 898 free_irq(port->tx_irq, port); 899 900 *port->rx_icr = GxICR_LEVEL_1; 901 *port->tx_icr = GxICR_LEVEL_1; 902} 903 904/* 905 * this routine is called to set the UART divisor registers to match the 906 * specified baud rate for a serial port. 907 */ 908static void mn10300_serial_change_speed(struct mn10300_serial_port *port, 909 struct ktermios *new, 910 struct ktermios *old) 911{ 912 unsigned long flags; 913 unsigned long ioclk = port->ioclk; 914 unsigned cflag; 915 int baud, bits, xdiv, tmp; 916 u16 tmxbr, scxctr; 917 u8 tmxmd, battempt; 918 u8 div_timer = port->div_timer; 919 920 _enter("%s{%lu}", port->name, ioclk); 921 922 /* byte size and parity */ 923 cflag = new->c_cflag; 924 switch (cflag & CSIZE) { 925 case CS7: scxctr = SC01CTR_CLN_7BIT; bits = 9; break; 926 case CS8: scxctr = SC01CTR_CLN_8BIT; bits = 10; break; 927 default: scxctr = SC01CTR_CLN_8BIT; bits = 10; break; 928 } 929 930 if (cflag & CSTOPB) { 931 scxctr |= SC01CTR_STB_2BIT; 932 bits++; 933 } 934 935 if (cflag & PARENB) { 936 bits++; 937 if (cflag & PARODD) 938 scxctr |= SC01CTR_PB_ODD; 939#ifdef CMSPAR 940 else if (cflag & CMSPAR) 941 scxctr |= SC01CTR_PB_FIXED0; 942#endif 943 else 944 scxctr |= SC01CTR_PB_EVEN; 945 } 946 947 /* Determine divisor based on baud rate */ 948 battempt = 0; 949 950 if (div_timer == MNSCx_DIV_TIMER_16BIT) 951 scxctr |= SC0CTR_CK_TM8UFLOW_8; /* ( == SC1CTR_CK_TM9UFLOW_8 952 * == SC2CTR_CK_TM10UFLOW) */ 953 else if (div_timer == MNSCx_DIV_TIMER_8BIT) 954 scxctr |= SC0CTR_CK_TM2UFLOW_8; 955 956try_alternative: 957 baud = uart_get_baud_rate(&port->uart, new, old, 0, 958 port->ioclk / 8); 959 960 _debug("ALT %d [baud %d]", battempt, baud); 961 962 if (!baud) 963 baud = 9600; /* B0 transition handled in rs_set_termios */ 964 xdiv = 1; 965 if (baud == 134) { 966 baud = 269; /* 134 is really 134.5 */ 967 xdiv = 2; 968 } 969 970 if (baud == 38400 && 971 (port->uart.flags & UPF_SPD_MASK) == UPF_SPD_CUST 972 ) { 973 _debug("CUSTOM %u", port->uart.custom_divisor); 974 975 if (div_timer == MNSCx_DIV_TIMER_16BIT) { 976 if (port->uart.custom_divisor <= 65535) { 977 tmxmd = TM8MD_SRC_IOCLK; 978 tmxbr = port->uart.custom_divisor; 979 port->uart.uartclk = ioclk; 980 goto timer_okay; 981 } 982 if (port->uart.custom_divisor / 8 <= 65535) { 983 tmxmd = TM8MD_SRC_IOCLK_8; 984 tmxbr = port->uart.custom_divisor / 8; 985 port->uart.custom_divisor = tmxbr * 8; 986 port->uart.uartclk = ioclk / 8; 987 goto timer_okay; 988 } 989 if (port->uart.custom_divisor / 32 <= 65535) { 990 tmxmd = TM8MD_SRC_IOCLK_32; 991 tmxbr = port->uart.custom_divisor / 32; 992 port->uart.custom_divisor = tmxbr * 32; 993 port->uart.uartclk = ioclk / 32; 994 goto timer_okay; 995 } 996 997 } else if (div_timer == MNSCx_DIV_TIMER_8BIT) { 998 if (port->uart.custom_divisor <= 255) { 999 tmxmd = TM2MD_SRC_IOCLK; 1000 tmxbr = port->uart.custom_divisor; 1001 port->uart.uartclk = ioclk; 1002 goto timer_okay; 1003 } 1004 if (port->uart.custom_divisor / 8 <= 255) { 1005 tmxmd = TM2MD_SRC_IOCLK_8; 1006 tmxbr = port->uart.custom_divisor / 8; 1007 port->uart.custom_divisor = tmxbr * 8; 1008 port->uart.uartclk = ioclk / 8; 1009 goto timer_okay; 1010 } 1011 if (port->uart.custom_divisor / 32 <= 255) { 1012 tmxmd = TM2MD_SRC_IOCLK_32; 1013 tmxbr = port->uart.custom_divisor / 32; 1014 port->uart.custom_divisor = tmxbr * 32; 1015 port->uart.uartclk = ioclk / 32; 1016 goto timer_okay; 1017 } 1018 } 1019 } 1020 1021 switch (div_timer) { 1022 case MNSCx_DIV_TIMER_16BIT: 1023 port->uart.uartclk = ioclk; 1024 tmxmd = TM8MD_SRC_IOCLK; 1025 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1; 1026 if (tmp > 0 && tmp <= 65535) 1027 goto timer_okay; 1028 1029 port->uart.uartclk = ioclk / 8; 1030 tmxmd = TM8MD_SRC_IOCLK_8; 1031 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1; 1032 if (tmp > 0 && tmp <= 65535) 1033 goto timer_okay; 1034 1035 port->uart.uartclk = ioclk / 32; 1036 tmxmd = TM8MD_SRC_IOCLK_32; 1037 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1; 1038 if (tmp > 0 && tmp <= 65535) 1039 goto timer_okay; 1040 break; 1041 1042 case MNSCx_DIV_TIMER_8BIT: 1043 port->uart.uartclk = ioclk; 1044 tmxmd = TM2MD_SRC_IOCLK; 1045 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1; 1046 if (tmp > 0 && tmp <= 255) 1047 goto timer_okay; 1048 1049 port->uart.uartclk = ioclk / 8; 1050 tmxmd = TM2MD_SRC_IOCLK_8; 1051 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1; 1052 if (tmp > 0 && tmp <= 255) 1053 goto timer_okay; 1054 1055 port->uart.uartclk = ioclk / 32; 1056 tmxmd = TM2MD_SRC_IOCLK_32; 1057 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1; 1058 if (tmp > 0 && tmp <= 255) 1059 goto timer_okay; 1060 break; 1061 1062 default: 1063 BUG(); 1064 return; 1065 } 1066 1067 /* refuse to change to a baud rate we can't support */ 1068 _debug("CAN'T SUPPORT"); 1069 1070 switch (battempt) { 1071 case 0: 1072 if (old) { 1073 new->c_cflag &= ~CBAUD; 1074 new->c_cflag |= (old->c_cflag & CBAUD); 1075 battempt = 1; 1076 goto try_alternative; 1077 } 1078 1079 case 1: 1080 /* as a last resort, if the quotient is zero, default to 9600 1081 * bps */ 1082 new->c_cflag &= ~CBAUD; 1083 new->c_cflag |= B9600; 1084 battempt = 2; 1085 goto try_alternative; 1086 1087 default: 1088 /* hmmm... can't seem to support 9600 either 1089 * - we could try iterating through the speeds we know about to 1090 * find the lowest 1091 */ 1092 new->c_cflag &= ~CBAUD; 1093 new->c_cflag |= B0; 1094 1095 if (div_timer == MNSCx_DIV_TIMER_16BIT) 1096 tmxmd = TM8MD_SRC_IOCLK_32; 1097 else if (div_timer == MNSCx_DIV_TIMER_8BIT) 1098 tmxmd = TM2MD_SRC_IOCLK_32; 1099 tmxbr = 1; 1100 1101 port->uart.uartclk = ioclk / 32; 1102 break; 1103 } 1104timer_okay: 1105 1106 _debug("UARTCLK: %u / %hu", port->uart.uartclk, tmxbr); 1107 1108 /* make the changes */ 1109 spin_lock_irqsave(&port->uart.lock, flags); 1110 1111 uart_update_timeout(&port->uart, new->c_cflag, baud); 1112 1113 /* set the timer to produce the required baud rate */ 1114 switch (div_timer) { 1115 case MNSCx_DIV_TIMER_16BIT: 1116 *port->_tmxmd = 0; 1117 *port->_tmxbr = tmxbr; 1118 *port->_tmxmd = TM8MD_INIT_COUNTER; 1119 *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE; 1120 break; 1121 1122 case MNSCx_DIV_TIMER_8BIT: 1123 *port->_tmxmd = 0; 1124 *(volatile u8 *) port->_tmxbr = (u8) tmxbr; 1125 *port->_tmxmd = TM2MD_INIT_COUNTER; 1126 *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE; 1127 break; 1128 } 1129 1130 /* CTS flow control flag and modem status interrupts */ 1131 scxctr &= ~(SC2CTR_TWE | SC2CTR_TWS); 1132 1133 if (port->type == PORT_MN10300_CTS && cflag & CRTSCTS) { 1134 /* want to interrupt when CTS goes low if CTS is now 1135 * high and vice versa 1136 */ 1137 port->tx_cts = *port->_status; 1138 1139 if (port->tx_cts & SC2STR_CTS) 1140 scxctr |= SC2CTR_TWE; 1141 else 1142 scxctr |= SC2CTR_TWE | SC2CTR_TWS; 1143 } 1144 1145 /* set up parity check flag */ 1146 port->uart.read_status_mask = (1 << TTY_NORMAL) | (1 << TTY_OVERRUN); 1147 if (new->c_iflag & INPCK) 1148 port->uart.read_status_mask |= 1149 (1 << TTY_PARITY) | (1 << TTY_FRAME); 1150 if (new->c_iflag & (BRKINT | PARMRK)) 1151 port->uart.read_status_mask |= (1 << TTY_BREAK); 1152 1153 /* characters to ignore */ 1154 port->uart.ignore_status_mask = 0; 1155 if (new->c_iflag & IGNPAR) 1156 port->uart.ignore_status_mask |= 1157 (1 << TTY_PARITY) | (1 << TTY_FRAME); 1158 if (new->c_iflag & IGNBRK) { 1159 port->uart.ignore_status_mask |= (1 << TTY_BREAK); 1160 /* 1161 * If we're ignoring parity and break indicators, 1162 * ignore overruns to (for real raw support). 1163 */ 1164 if (new->c_iflag & IGNPAR) 1165 port->uart.ignore_status_mask |= (1 << TTY_OVERRUN); 1166 } 1167 1168 /* Ignore all characters if CREAD is not set */ 1169 if ((new->c_cflag & CREAD) == 0) 1170 port->uart.ignore_status_mask |= (1 << TTY_NORMAL); 1171 1172 scxctr |= *port->_control & (SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE); 1173 *port->_control = scxctr; 1174 1175 spin_unlock_irqrestore(&port->uart.lock, flags); 1176} 1177 1178/* 1179 * set the terminal I/O parameters 1180 */ 1181static void mn10300_serial_set_termios(struct uart_port *_port, 1182 struct ktermios *new, 1183 struct ktermios *old) 1184{ 1185 struct mn10300_serial_port *port = 1186 container_of(_port, struct mn10300_serial_port, uart); 1187 1188 _enter("%s,%p,%p", port->name, new, old); 1189 1190 mn10300_serial_change_speed(port, new, old); 1191 1192 /* handle turning off CRTSCTS */ 1193 if (!(new->c_cflag & CRTSCTS)) { 1194 u16 ctr = *port->_control; 1195 ctr &= ~SC2CTR_TWE; 1196 *port->_control = ctr; 1197 } 1198} 1199 1200/* 1201 * return description of port type 1202 */ 1203static const char *mn10300_serial_type(struct uart_port *_port) 1204{ 1205 struct mn10300_serial_port *port = 1206 container_of(_port, struct mn10300_serial_port, uart); 1207 1208 if (port->uart.type == PORT_MN10300_CTS) 1209 return "MN10300 SIF_CTS"; 1210 1211 return "MN10300 SIF"; 1212} 1213 1214/* 1215 * release I/O and memory regions in use by port 1216 */ 1217static void mn10300_serial_release_port(struct uart_port *_port) 1218{ 1219 struct mn10300_serial_port *port = 1220 container_of(_port, struct mn10300_serial_port, uart); 1221 1222 _enter("%s", port->name); 1223 1224 release_mem_region((unsigned long) port->_iobase, 16); 1225} 1226 1227/* 1228 * request I/O and memory regions for port 1229 */ 1230static int mn10300_serial_request_port(struct uart_port *_port) 1231{ 1232 struct mn10300_serial_port *port = 1233 container_of(_port, struct mn10300_serial_port, uart); 1234 1235 _enter("%s", port->name); 1236 1237 request_mem_region((unsigned long) port->_iobase, 16, port->name); 1238 return 0; 1239} 1240 1241/* 1242 * configure the type and reserve the ports 1243 */ 1244static void mn10300_serial_config_port(struct uart_port *_port, int type) 1245{ 1246 struct mn10300_serial_port *port = 1247 container_of(_port, struct mn10300_serial_port, uart); 1248 1249 _enter("%s", port->name); 1250 1251 port->uart.type = PORT_MN10300; 1252 1253 if (port->options & MNSCx_OPT_CTS) 1254 port->uart.type = PORT_MN10300_CTS; 1255 1256 mn10300_serial_request_port(_port); 1257} 1258 1259/* 1260 * verify serial parameters are suitable for this port type 1261 */ 1262static int mn10300_serial_verify_port(struct uart_port *_port, 1263 struct serial_struct *ss) 1264{ 1265 struct mn10300_serial_port *port = 1266 container_of(_port, struct mn10300_serial_port, uart); 1267 void *mapbase = (void *) (unsigned long) port->uart.mapbase; 1268 1269 _enter("%s", port->name); 1270 1271 /* these things may not be changed */ 1272 if (ss->irq != port->uart.irq || 1273 ss->port != port->uart.iobase || 1274 ss->io_type != port->uart.iotype || 1275 ss->iomem_base != mapbase || 1276 ss->iomem_reg_shift != port->uart.regshift || 1277 ss->hub6 != port->uart.hub6 || 1278 ss->xmit_fifo_size != port->uart.fifosize) 1279 return -EINVAL; 1280 1281 /* type may be changed on a port that supports CTS */ 1282 if (ss->type != port->uart.type) { 1283 if (!(port->options & MNSCx_OPT_CTS)) 1284 return -EINVAL; 1285 1286 if (ss->type != PORT_MN10300 && 1287 ss->type != PORT_MN10300_CTS) 1288 return -EINVAL; 1289 } 1290 1291 return 0; 1292} 1293 1294/* 1295 * initialise the MN10300 on-chip UARTs 1296 */ 1297static int __init mn10300_serial_init(void) 1298{ 1299 struct mn10300_serial_port *port; 1300 int ret, i; 1301 1302 printk(KERN_INFO "%s version %s (%s)\n", 1303 serial_name, serial_version, serial_revdate); 1304 1305#ifdef CONFIG_MN10300_TTYSM2 1306 SC2TIM = 8; /* make the baud base of timer 2 IOCLK/8 */ 1307#endif 1308 1309 set_intr_stub(EXCEP_IRQ_LEVEL1, mn10300_serial_vdma_interrupt); 1310 1311 ret = uart_register_driver(&mn10300_serial_driver); 1312 if (!ret) { 1313 for (i = 0 ; i < NR_PORTS ; i++) { 1314 port = mn10300_serial_ports[i]; 1315 if (!port || port->gdbstub) 1316 continue; 1317 1318 switch (port->clock_src) { 1319 case MNSCx_CLOCK_SRC_IOCLK: 1320 port->ioclk = MN10300_IOCLK; 1321 break; 1322 1323#ifdef MN10300_IOBCLK 1324 case MNSCx_CLOCK_SRC_IOBCLK: 1325 port->ioclk = MN10300_IOBCLK; 1326 break; 1327#endif 1328 default: 1329 BUG(); 1330 } 1331 1332 ret = uart_add_one_port(&mn10300_serial_driver, 1333 &port->uart); 1334 1335 if (ret < 0) { 1336 _debug("ERROR %d", -ret); 1337 break; 1338 } 1339 } 1340 1341 if (ret) 1342 uart_unregister_driver(&mn10300_serial_driver); 1343 } 1344 1345 return ret; 1346} 1347 1348__initcall(mn10300_serial_init); 1349 1350 1351#ifdef CONFIG_MN10300_TTYSM_CONSOLE 1352 1353/* 1354 * print a string to the serial port without disturbing the real user of the 1355 * port too much 1356 * - the console must be locked by the caller 1357 */ 1358static void mn10300_serial_console_write(struct console *co, 1359 const char *s, unsigned count) 1360{ 1361 struct mn10300_serial_port *port; 1362 unsigned i; 1363 u16 scxctr, txicr, tmp; 1364 u8 tmxmd; 1365 1366 port = mn10300_serial_ports[co->index]; 1367 1368 /* firstly hijack the serial port from the "virtual DMA" controller */ 1369 txicr = *port->tx_icr; 1370 *port->tx_icr = GxICR_LEVEL_1; 1371 tmp = *port->tx_icr; 1372 1373 /* the transmitter may be disabled */ 1374 scxctr = *port->_control; 1375 if (!(scxctr & SC01CTR_TXE)) { 1376 /* restart the UART clock */ 1377 tmxmd = *port->_tmxmd; 1378 1379 switch (port->div_timer) { 1380 case MNSCx_DIV_TIMER_16BIT: 1381 *port->_tmxmd = 0; 1382 *port->_tmxmd = TM8MD_INIT_COUNTER; 1383 *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE; 1384 break; 1385 1386 case MNSCx_DIV_TIMER_8BIT: 1387 *port->_tmxmd = 0; 1388 *port->_tmxmd = TM2MD_INIT_COUNTER; 1389 *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE; 1390 break; 1391 } 1392 1393 /* enable the transmitter */ 1394 *port->_control = (scxctr & ~SC01CTR_BKE) | SC01CTR_TXE; 1395 1396 } else if (scxctr & SC01CTR_BKE) { 1397 /* stop transmitting BREAK */ 1398 *port->_control = (scxctr & ~SC01CTR_BKE); 1399 } 1400 1401 /* send the chars into the serial port (with LF -> LFCR conversion) */ 1402 for (i = 0; i < count; i++) { 1403 char ch = *s++; 1404 1405 while (*port->_status & SC01STR_TBF) 1406 continue; 1407 *(u8 *) port->_txb = ch; 1408 1409 if (ch == 0x0a) { 1410 while (*port->_status & SC01STR_TBF) 1411 continue; 1412 *(u8 *) port->_txb = 0xd; 1413 } 1414 } 1415 1416 /* can't let the transmitter be turned off if it's actually 1417 * transmitting */ 1418 while (*port->_status & (SC01STR_TXF | SC01STR_TBF)) 1419 continue; 1420 1421 /* disable the transmitter if we re-enabled it */ 1422 if (!(scxctr & SC01CTR_TXE)) 1423 *port->_control = scxctr; 1424 1425 *port->tx_icr = txicr; 1426 tmp = *port->tx_icr; 1427} 1428 1429/* 1430 * set up a serial port as a console 1431 * - construct a cflag setting for the first rs_open() 1432 * - initialize the serial port 1433 * - return non-zero if we didn't find a serial port. 1434 */ 1435static int __init mn10300_serial_console_setup(struct console *co, 1436 char *options) 1437{ 1438 struct mn10300_serial_port *port; 1439 int i, parity = 'n', baud = 9600, bits = 8, flow = 0; 1440 1441 for (i = 0 ; i < NR_PORTS ; i++) { 1442 port = mn10300_serial_ports[i]; 1443 if (port && !port->gdbstub && port->uart.line == co->index) 1444 goto found_device; 1445 } 1446 1447 return -ENODEV; 1448 1449found_device: 1450 switch (port->clock_src) { 1451 case MNSCx_CLOCK_SRC_IOCLK: 1452 port->ioclk = MN10300_IOCLK; 1453 break; 1454 1455#ifdef MN10300_IOBCLK 1456 case MNSCx_CLOCK_SRC_IOBCLK: 1457 port->ioclk = MN10300_IOBCLK; 1458 break; 1459#endif 1460 default: 1461 BUG(); 1462 } 1463 1464 if (options) 1465 uart_parse_options(options, &baud, &parity, &bits, &flow); 1466 1467 return uart_set_options(&port->uart, co, baud, parity, bits, flow); 1468} 1469 1470/* 1471 * register console 1472 */ 1473static int __init mn10300_serial_console_init(void) 1474{ 1475 register_console(&mn10300_serial_console); 1476 return 0; 1477} 1478 1479console_initcall(mn10300_serial_console_init); 1480#endif 1481