• Home
  • History
  • Annotate
  • Line#
  • Navigate
  • Raw
  • Download
  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/txx9/jmr3927/
1/*
2 *  This program is free software; you can redistribute  it and/or modify it
3 *  under  the terms of  the GNU General  Public License as published by the
4 *  Free Software Foundation;  either version 2 of the  License, or (at your
5 *  option) any later version.
6 *
7 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
8 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
9 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
10 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
11 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
12 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
13 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
14 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
15 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
16 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
17 *
18 *  You should have received a copy of the  GNU General Public License along
19 *  with this program; if not, write  to the Free Software Foundation, Inc.,
20 *  675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Copyright 2001 MontaVista Software Inc.
23 * Author: MontaVista Software, Inc.
24 *              ahennessy@mvista.com
25 *
26 * Copyright (C) 2000-2001 Toshiba Corporation
27 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
28 */
29
30#include <linux/init.h>
31#include <linux/kernel.h>
32#include <linux/types.h>
33#include <linux/ioport.h>
34#include <linux/delay.h>
35#include <linux/platform_device.h>
36#include <linux/gpio.h>
37#include <asm/reboot.h>
38#include <asm/txx9pio.h>
39#include <asm/txx9/generic.h>
40#include <asm/txx9/pci.h>
41#include <asm/txx9/jmr3927.h>
42#include <asm/mipsregs.h>
43
44static void jmr3927_machine_restart(char *command)
45{
46	local_irq_disable();
47	jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
48	jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI, JMR3927_IOC_RESET_ADDR);
49	(void)jmr3927_ioc_reg_in(JMR3927_IOC_RESET_ADDR);	/* flush WB */
50	mdelay(1);
51	jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
52	jmr3927_ioc_reg_out(JMR3927_IOC_RESET_CPU, JMR3927_IOC_RESET_ADDR);
53	/* fallback */
54	(*_machine_halt)();
55}
56
57static void __init jmr3927_time_init(void)
58{
59	tx3927_time_init(0, 1);
60}
61
62#define DO_WRITE_THROUGH
63
64static void jmr3927_board_init(void);
65
66static void __init jmr3927_mem_setup(void)
67{
68	set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);
69
70	_machine_restart = jmr3927_machine_restart;
71
72	/* cache setup */
73	{
74		unsigned int conf;
75#ifdef DO_WRITE_THROUGH
76		int mips_config_cwfon = 0;
77		int mips_config_wbon = 0;
78#else
79		int mips_config_cwfon = 1;
80		int mips_config_wbon = 1;
81#endif
82
83		conf = read_c0_conf();
84		conf &= ~(TX39_CONF_WBON | TX39_CONF_CWFON);
85		conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
86		conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0;
87
88		write_c0_conf(conf);
89		write_c0_cache(0);
90	}
91
92	/* initialize board */
93	jmr3927_board_init();
94
95	tx3927_sio_init(0, 1 << 1); /* ch1: noCTS */
96}
97
98static void __init jmr3927_pci_setup(void)
99{
100#ifdef CONFIG_PCI
101	int extarb = !(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB);
102	struct pci_controller *c;
103
104	c = txx9_alloc_pci_controller(&txx9_primary_pcic,
105				      JMR3927_PCIMEM, JMR3927_PCIMEM_SIZE,
106				      JMR3927_PCIIO, JMR3927_PCIIO_SIZE);
107	register_pci_controller(c);
108	if (!extarb) {
109		/* Reset PCI Bus */
110		jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
111		udelay(100);
112		jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
113				    JMR3927_IOC_RESET_ADDR);
114		udelay(100);
115		jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
116	}
117	tx3927_pcic_setup(c, JMR3927_SDRAM_SIZE, extarb);
118	tx3927_setup_pcierr_irq();
119#endif /* CONFIG_PCI */
120}
121
122static void __init jmr3927_board_init(void)
123{
124	txx9_cpu_clock = JMR3927_CORECLK;
125	/* SDRAMC are configured by PROM */
126
127	/* ROMC */
128	tx3927_romcptr->cr[1] = JMR3927_ROMCE1 | 0x00030048;
129	tx3927_romcptr->cr[2] = JMR3927_ROMCE2 | 0x000064c8;
130	tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698;
131	tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218;
132
133	/* Pin selection */
134	tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL;
135	tx3927_ccfgptr->pcfg |=
136		TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL |
137		(TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1));
138
139	tx3927_setup();
140
141	/* PIO[15:12] connected to LEDs */
142	__raw_writel(0x0000f000, &tx3927_pioptr->dir);
143	gpio_request(11, "dipsw1");
144	gpio_request(10, "dipsw2");
145
146	jmr3927_pci_setup();
147
148	/* SIO0 DTR on */
149	jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
150
151	jmr3927_led_set(0);
152
153	printk(KERN_INFO
154	       "JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
155	       jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
156	       jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
157	       jmr3927_dipsw1(), jmr3927_dipsw2(),
158	       jmr3927_dipsw3(), jmr3927_dipsw4());
159}
160
161/* This trick makes rtc-ds1742 driver usable as is. */
162static unsigned long jmr3927_swizzle_addr_b(unsigned long port)
163{
164	if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR)
165		return port;
166	port = (port & 0xffff0000) | (port & 0x7fff << 1);
167#ifdef __BIG_ENDIAN
168	return port;
169#else
170	return port | 1;
171#endif
172}
173
174static void __init jmr3927_rtc_init(void)
175{
176	static struct resource __initdata res = {
177		.start	= JMR3927_IOC_NVRAMB_ADDR - IO_BASE,
178		.end	= JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1,
179		.flags	= IORESOURCE_MEM,
180	};
181	platform_device_register_simple("rtc-ds1742", -1, &res, 1);
182}
183
184static void __init jmr3927_mtd_init(void)
185{
186	int i;
187
188	for (i = 0; i < 2; i++)
189		tx3927_mtd_init(i);
190}
191
192static void __init jmr3927_device_init(void)
193{
194	unsigned long iocled_base = JMR3927_IOC_LED_ADDR - IO_BASE;
195#ifdef __LITTLE_ENDIAN
196	iocled_base |= 1;
197#endif
198	__swizzle_addr_b = jmr3927_swizzle_addr_b;
199	jmr3927_rtc_init();
200	tx3927_wdt_init();
201	jmr3927_mtd_init();
202	txx9_iocled_init(iocled_base, -1, 8, 1, "green", NULL);
203}
204
205struct txx9_board_vec jmr3927_vec __initdata = {
206	.system = "Toshiba JMR_TX3927",
207	.prom_init = jmr3927_prom_init,
208	.mem_setup = jmr3927_mem_setup,
209	.irq_setup = jmr3927_irq_setup,
210	.time_init = jmr3927_time_init,
211	.device_init = jmr3927_device_init,
212#ifdef CONFIG_PCI
213	.pci_map_irq = jmr3927_pci_map_irq,
214#endif
215};
216