1/***********************license start*************** 2 * Author: Cavium Networks 3 * 4 * Contact: support@caviumnetworks.com 5 * This file is part of the OCTEON SDK 6 * 7 * Copyright (c) 2003-2008 Cavium Networks 8 * 9 * This file is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License, Version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This file is distributed in the hope that it will be useful, but 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16 * NONINFRINGEMENT. See the GNU General Public License for more 17 * details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this file; if not, write to the Free Software 21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 22 * or visit http://www.gnu.org/licenses/. 23 * 24 * This file may also be available under a different license from Cavium. 25 * Contact Cavium Networks for more information 26 ***********************license end**************************************/ 27 28#ifndef __CVMX_POW_DEFS_H__ 29#define __CVMX_POW_DEFS_H__ 30 31#define CVMX_POW_BIST_STAT \ 32 CVMX_ADD_IO_SEG(0x00016700000003F8ull) 33#define CVMX_POW_DS_PC \ 34 CVMX_ADD_IO_SEG(0x0001670000000398ull) 35#define CVMX_POW_ECC_ERR \ 36 CVMX_ADD_IO_SEG(0x0001670000000218ull) 37#define CVMX_POW_INT_CTL \ 38 CVMX_ADD_IO_SEG(0x0001670000000220ull) 39#define CVMX_POW_IQ_CNTX(offset) \ 40 CVMX_ADD_IO_SEG(0x0001670000000340ull + (((offset) & 7) * 8)) 41#define CVMX_POW_IQ_COM_CNT \ 42 CVMX_ADD_IO_SEG(0x0001670000000388ull) 43#define CVMX_POW_IQ_INT \ 44 CVMX_ADD_IO_SEG(0x0001670000000238ull) 45#define CVMX_POW_IQ_INT_EN \ 46 CVMX_ADD_IO_SEG(0x0001670000000240ull) 47#define CVMX_POW_IQ_THRX(offset) \ 48 CVMX_ADD_IO_SEG(0x00016700000003A0ull + (((offset) & 7) * 8)) 49#define CVMX_POW_NOS_CNT \ 50 CVMX_ADD_IO_SEG(0x0001670000000228ull) 51#define CVMX_POW_NW_TIM \ 52 CVMX_ADD_IO_SEG(0x0001670000000210ull) 53#define CVMX_POW_PF_RST_MSK \ 54 CVMX_ADD_IO_SEG(0x0001670000000230ull) 55#define CVMX_POW_PP_GRP_MSKX(offset) \ 56 CVMX_ADD_IO_SEG(0x0001670000000000ull + (((offset) & 15) * 8)) 57#define CVMX_POW_QOS_RNDX(offset) \ 58 CVMX_ADD_IO_SEG(0x00016700000001C0ull + (((offset) & 7) * 8)) 59#define CVMX_POW_QOS_THRX(offset) \ 60 CVMX_ADD_IO_SEG(0x0001670000000180ull + (((offset) & 7) * 8)) 61#define CVMX_POW_TS_PC \ 62 CVMX_ADD_IO_SEG(0x0001670000000390ull) 63#define CVMX_POW_WA_COM_PC \ 64 CVMX_ADD_IO_SEG(0x0001670000000380ull) 65#define CVMX_POW_WA_PCX(offset) \ 66 CVMX_ADD_IO_SEG(0x0001670000000300ull + (((offset) & 7) * 8)) 67#define CVMX_POW_WQ_INT \ 68 CVMX_ADD_IO_SEG(0x0001670000000200ull) 69#define CVMX_POW_WQ_INT_CNTX(offset) \ 70 CVMX_ADD_IO_SEG(0x0001670000000100ull + (((offset) & 15) * 8)) 71#define CVMX_POW_WQ_INT_PC \ 72 CVMX_ADD_IO_SEG(0x0001670000000208ull) 73#define CVMX_POW_WQ_INT_THRX(offset) \ 74 CVMX_ADD_IO_SEG(0x0001670000000080ull + (((offset) & 15) * 8)) 75#define CVMX_POW_WS_PCX(offset) \ 76 CVMX_ADD_IO_SEG(0x0001670000000280ull + (((offset) & 15) * 8)) 77 78union cvmx_pow_bist_stat { 79 uint64_t u64; 80 struct cvmx_pow_bist_stat_s { 81 uint64_t reserved_32_63:32; 82 uint64_t pp:16; 83 uint64_t reserved_0_15:16; 84 } s; 85 struct cvmx_pow_bist_stat_cn30xx { 86 uint64_t reserved_17_63:47; 87 uint64_t pp:1; 88 uint64_t reserved_9_15:7; 89 uint64_t cam:1; 90 uint64_t nbt1:1; 91 uint64_t nbt0:1; 92 uint64_t index:1; 93 uint64_t fidx:1; 94 uint64_t nbr1:1; 95 uint64_t nbr0:1; 96 uint64_t pend:1; 97 uint64_t adr:1; 98 } cn30xx; 99 struct cvmx_pow_bist_stat_cn31xx { 100 uint64_t reserved_18_63:46; 101 uint64_t pp:2; 102 uint64_t reserved_9_15:7; 103 uint64_t cam:1; 104 uint64_t nbt1:1; 105 uint64_t nbt0:1; 106 uint64_t index:1; 107 uint64_t fidx:1; 108 uint64_t nbr1:1; 109 uint64_t nbr0:1; 110 uint64_t pend:1; 111 uint64_t adr:1; 112 } cn31xx; 113 struct cvmx_pow_bist_stat_cn38xx { 114 uint64_t reserved_32_63:32; 115 uint64_t pp:16; 116 uint64_t reserved_10_15:6; 117 uint64_t cam:1; 118 uint64_t nbt:1; 119 uint64_t index:1; 120 uint64_t fidx:1; 121 uint64_t nbr1:1; 122 uint64_t nbr0:1; 123 uint64_t pend1:1; 124 uint64_t pend0:1; 125 uint64_t adr1:1; 126 uint64_t adr0:1; 127 } cn38xx; 128 struct cvmx_pow_bist_stat_cn38xx cn38xxp2; 129 struct cvmx_pow_bist_stat_cn31xx cn50xx; 130 struct cvmx_pow_bist_stat_cn52xx { 131 uint64_t reserved_20_63:44; 132 uint64_t pp:4; 133 uint64_t reserved_9_15:7; 134 uint64_t cam:1; 135 uint64_t nbt1:1; 136 uint64_t nbt0:1; 137 uint64_t index:1; 138 uint64_t fidx:1; 139 uint64_t nbr1:1; 140 uint64_t nbr0:1; 141 uint64_t pend:1; 142 uint64_t adr:1; 143 } cn52xx; 144 struct cvmx_pow_bist_stat_cn52xx cn52xxp1; 145 struct cvmx_pow_bist_stat_cn56xx { 146 uint64_t reserved_28_63:36; 147 uint64_t pp:12; 148 uint64_t reserved_10_15:6; 149 uint64_t cam:1; 150 uint64_t nbt:1; 151 uint64_t index:1; 152 uint64_t fidx:1; 153 uint64_t nbr1:1; 154 uint64_t nbr0:1; 155 uint64_t pend1:1; 156 uint64_t pend0:1; 157 uint64_t adr1:1; 158 uint64_t adr0:1; 159 } cn56xx; 160 struct cvmx_pow_bist_stat_cn56xx cn56xxp1; 161 struct cvmx_pow_bist_stat_cn38xx cn58xx; 162 struct cvmx_pow_bist_stat_cn38xx cn58xxp1; 163}; 164 165union cvmx_pow_ds_pc { 166 uint64_t u64; 167 struct cvmx_pow_ds_pc_s { 168 uint64_t reserved_32_63:32; 169 uint64_t ds_pc:32; 170 } s; 171 struct cvmx_pow_ds_pc_s cn30xx; 172 struct cvmx_pow_ds_pc_s cn31xx; 173 struct cvmx_pow_ds_pc_s cn38xx; 174 struct cvmx_pow_ds_pc_s cn38xxp2; 175 struct cvmx_pow_ds_pc_s cn50xx; 176 struct cvmx_pow_ds_pc_s cn52xx; 177 struct cvmx_pow_ds_pc_s cn52xxp1; 178 struct cvmx_pow_ds_pc_s cn56xx; 179 struct cvmx_pow_ds_pc_s cn56xxp1; 180 struct cvmx_pow_ds_pc_s cn58xx; 181 struct cvmx_pow_ds_pc_s cn58xxp1; 182}; 183 184union cvmx_pow_ecc_err { 185 uint64_t u64; 186 struct cvmx_pow_ecc_err_s { 187 uint64_t reserved_45_63:19; 188 uint64_t iop_ie:13; 189 uint64_t reserved_29_31:3; 190 uint64_t iop:13; 191 uint64_t reserved_14_15:2; 192 uint64_t rpe_ie:1; 193 uint64_t rpe:1; 194 uint64_t reserved_9_11:3; 195 uint64_t syn:5; 196 uint64_t dbe_ie:1; 197 uint64_t sbe_ie:1; 198 uint64_t dbe:1; 199 uint64_t sbe:1; 200 } s; 201 struct cvmx_pow_ecc_err_s cn30xx; 202 struct cvmx_pow_ecc_err_cn31xx { 203 uint64_t reserved_14_63:50; 204 uint64_t rpe_ie:1; 205 uint64_t rpe:1; 206 uint64_t reserved_9_11:3; 207 uint64_t syn:5; 208 uint64_t dbe_ie:1; 209 uint64_t sbe_ie:1; 210 uint64_t dbe:1; 211 uint64_t sbe:1; 212 } cn31xx; 213 struct cvmx_pow_ecc_err_s cn38xx; 214 struct cvmx_pow_ecc_err_cn31xx cn38xxp2; 215 struct cvmx_pow_ecc_err_s cn50xx; 216 struct cvmx_pow_ecc_err_s cn52xx; 217 struct cvmx_pow_ecc_err_s cn52xxp1; 218 struct cvmx_pow_ecc_err_s cn56xx; 219 struct cvmx_pow_ecc_err_s cn56xxp1; 220 struct cvmx_pow_ecc_err_s cn58xx; 221 struct cvmx_pow_ecc_err_s cn58xxp1; 222}; 223 224union cvmx_pow_int_ctl { 225 uint64_t u64; 226 struct cvmx_pow_int_ctl_s { 227 uint64_t reserved_6_63:58; 228 uint64_t pfr_dis:1; 229 uint64_t nbr_thr:5; 230 } s; 231 struct cvmx_pow_int_ctl_s cn30xx; 232 struct cvmx_pow_int_ctl_s cn31xx; 233 struct cvmx_pow_int_ctl_s cn38xx; 234 struct cvmx_pow_int_ctl_s cn38xxp2; 235 struct cvmx_pow_int_ctl_s cn50xx; 236 struct cvmx_pow_int_ctl_s cn52xx; 237 struct cvmx_pow_int_ctl_s cn52xxp1; 238 struct cvmx_pow_int_ctl_s cn56xx; 239 struct cvmx_pow_int_ctl_s cn56xxp1; 240 struct cvmx_pow_int_ctl_s cn58xx; 241 struct cvmx_pow_int_ctl_s cn58xxp1; 242}; 243 244union cvmx_pow_iq_cntx { 245 uint64_t u64; 246 struct cvmx_pow_iq_cntx_s { 247 uint64_t reserved_32_63:32; 248 uint64_t iq_cnt:32; 249 } s; 250 struct cvmx_pow_iq_cntx_s cn30xx; 251 struct cvmx_pow_iq_cntx_s cn31xx; 252 struct cvmx_pow_iq_cntx_s cn38xx; 253 struct cvmx_pow_iq_cntx_s cn38xxp2; 254 struct cvmx_pow_iq_cntx_s cn50xx; 255 struct cvmx_pow_iq_cntx_s cn52xx; 256 struct cvmx_pow_iq_cntx_s cn52xxp1; 257 struct cvmx_pow_iq_cntx_s cn56xx; 258 struct cvmx_pow_iq_cntx_s cn56xxp1; 259 struct cvmx_pow_iq_cntx_s cn58xx; 260 struct cvmx_pow_iq_cntx_s cn58xxp1; 261}; 262 263union cvmx_pow_iq_com_cnt { 264 uint64_t u64; 265 struct cvmx_pow_iq_com_cnt_s { 266 uint64_t reserved_32_63:32; 267 uint64_t iq_cnt:32; 268 } s; 269 struct cvmx_pow_iq_com_cnt_s cn30xx; 270 struct cvmx_pow_iq_com_cnt_s cn31xx; 271 struct cvmx_pow_iq_com_cnt_s cn38xx; 272 struct cvmx_pow_iq_com_cnt_s cn38xxp2; 273 struct cvmx_pow_iq_com_cnt_s cn50xx; 274 struct cvmx_pow_iq_com_cnt_s cn52xx; 275 struct cvmx_pow_iq_com_cnt_s cn52xxp1; 276 struct cvmx_pow_iq_com_cnt_s cn56xx; 277 struct cvmx_pow_iq_com_cnt_s cn56xxp1; 278 struct cvmx_pow_iq_com_cnt_s cn58xx; 279 struct cvmx_pow_iq_com_cnt_s cn58xxp1; 280}; 281 282union cvmx_pow_iq_int { 283 uint64_t u64; 284 struct cvmx_pow_iq_int_s { 285 uint64_t reserved_8_63:56; 286 uint64_t iq_int:8; 287 } s; 288 struct cvmx_pow_iq_int_s cn52xx; 289 struct cvmx_pow_iq_int_s cn52xxp1; 290 struct cvmx_pow_iq_int_s cn56xx; 291 struct cvmx_pow_iq_int_s cn56xxp1; 292}; 293 294union cvmx_pow_iq_int_en { 295 uint64_t u64; 296 struct cvmx_pow_iq_int_en_s { 297 uint64_t reserved_8_63:56; 298 uint64_t int_en:8; 299 } s; 300 struct cvmx_pow_iq_int_en_s cn52xx; 301 struct cvmx_pow_iq_int_en_s cn52xxp1; 302 struct cvmx_pow_iq_int_en_s cn56xx; 303 struct cvmx_pow_iq_int_en_s cn56xxp1; 304}; 305 306union cvmx_pow_iq_thrx { 307 uint64_t u64; 308 struct cvmx_pow_iq_thrx_s { 309 uint64_t reserved_32_63:32; 310 uint64_t iq_thr:32; 311 } s; 312 struct cvmx_pow_iq_thrx_s cn52xx; 313 struct cvmx_pow_iq_thrx_s cn52xxp1; 314 struct cvmx_pow_iq_thrx_s cn56xx; 315 struct cvmx_pow_iq_thrx_s cn56xxp1; 316}; 317 318union cvmx_pow_nos_cnt { 319 uint64_t u64; 320 struct cvmx_pow_nos_cnt_s { 321 uint64_t reserved_12_63:52; 322 uint64_t nos_cnt:12; 323 } s; 324 struct cvmx_pow_nos_cnt_cn30xx { 325 uint64_t reserved_7_63:57; 326 uint64_t nos_cnt:7; 327 } cn30xx; 328 struct cvmx_pow_nos_cnt_cn31xx { 329 uint64_t reserved_9_63:55; 330 uint64_t nos_cnt:9; 331 } cn31xx; 332 struct cvmx_pow_nos_cnt_s cn38xx; 333 struct cvmx_pow_nos_cnt_s cn38xxp2; 334 struct cvmx_pow_nos_cnt_cn31xx cn50xx; 335 struct cvmx_pow_nos_cnt_cn52xx { 336 uint64_t reserved_10_63:54; 337 uint64_t nos_cnt:10; 338 } cn52xx; 339 struct cvmx_pow_nos_cnt_cn52xx cn52xxp1; 340 struct cvmx_pow_nos_cnt_s cn56xx; 341 struct cvmx_pow_nos_cnt_s cn56xxp1; 342 struct cvmx_pow_nos_cnt_s cn58xx; 343 struct cvmx_pow_nos_cnt_s cn58xxp1; 344}; 345 346union cvmx_pow_nw_tim { 347 uint64_t u64; 348 struct cvmx_pow_nw_tim_s { 349 uint64_t reserved_10_63:54; 350 uint64_t nw_tim:10; 351 } s; 352 struct cvmx_pow_nw_tim_s cn30xx; 353 struct cvmx_pow_nw_tim_s cn31xx; 354 struct cvmx_pow_nw_tim_s cn38xx; 355 struct cvmx_pow_nw_tim_s cn38xxp2; 356 struct cvmx_pow_nw_tim_s cn50xx; 357 struct cvmx_pow_nw_tim_s cn52xx; 358 struct cvmx_pow_nw_tim_s cn52xxp1; 359 struct cvmx_pow_nw_tim_s cn56xx; 360 struct cvmx_pow_nw_tim_s cn56xxp1; 361 struct cvmx_pow_nw_tim_s cn58xx; 362 struct cvmx_pow_nw_tim_s cn58xxp1; 363}; 364 365union cvmx_pow_pf_rst_msk { 366 uint64_t u64; 367 struct cvmx_pow_pf_rst_msk_s { 368 uint64_t reserved_8_63:56; 369 uint64_t rst_msk:8; 370 } s; 371 struct cvmx_pow_pf_rst_msk_s cn50xx; 372 struct cvmx_pow_pf_rst_msk_s cn52xx; 373 struct cvmx_pow_pf_rst_msk_s cn52xxp1; 374 struct cvmx_pow_pf_rst_msk_s cn56xx; 375 struct cvmx_pow_pf_rst_msk_s cn56xxp1; 376 struct cvmx_pow_pf_rst_msk_s cn58xx; 377 struct cvmx_pow_pf_rst_msk_s cn58xxp1; 378}; 379 380union cvmx_pow_pp_grp_mskx { 381 uint64_t u64; 382 struct cvmx_pow_pp_grp_mskx_s { 383 uint64_t reserved_48_63:16; 384 uint64_t qos7_pri:4; 385 uint64_t qos6_pri:4; 386 uint64_t qos5_pri:4; 387 uint64_t qos4_pri:4; 388 uint64_t qos3_pri:4; 389 uint64_t qos2_pri:4; 390 uint64_t qos1_pri:4; 391 uint64_t qos0_pri:4; 392 uint64_t grp_msk:16; 393 } s; 394 struct cvmx_pow_pp_grp_mskx_cn30xx { 395 uint64_t reserved_16_63:48; 396 uint64_t grp_msk:16; 397 } cn30xx; 398 struct cvmx_pow_pp_grp_mskx_cn30xx cn31xx; 399 struct cvmx_pow_pp_grp_mskx_cn30xx cn38xx; 400 struct cvmx_pow_pp_grp_mskx_cn30xx cn38xxp2; 401 struct cvmx_pow_pp_grp_mskx_s cn50xx; 402 struct cvmx_pow_pp_grp_mskx_s cn52xx; 403 struct cvmx_pow_pp_grp_mskx_s cn52xxp1; 404 struct cvmx_pow_pp_grp_mskx_s cn56xx; 405 struct cvmx_pow_pp_grp_mskx_s cn56xxp1; 406 struct cvmx_pow_pp_grp_mskx_s cn58xx; 407 struct cvmx_pow_pp_grp_mskx_s cn58xxp1; 408}; 409 410union cvmx_pow_qos_rndx { 411 uint64_t u64; 412 struct cvmx_pow_qos_rndx_s { 413 uint64_t reserved_32_63:32; 414 uint64_t rnd_p3:8; 415 uint64_t rnd_p2:8; 416 uint64_t rnd_p1:8; 417 uint64_t rnd:8; 418 } s; 419 struct cvmx_pow_qos_rndx_s cn30xx; 420 struct cvmx_pow_qos_rndx_s cn31xx; 421 struct cvmx_pow_qos_rndx_s cn38xx; 422 struct cvmx_pow_qos_rndx_s cn38xxp2; 423 struct cvmx_pow_qos_rndx_s cn50xx; 424 struct cvmx_pow_qos_rndx_s cn52xx; 425 struct cvmx_pow_qos_rndx_s cn52xxp1; 426 struct cvmx_pow_qos_rndx_s cn56xx; 427 struct cvmx_pow_qos_rndx_s cn56xxp1; 428 struct cvmx_pow_qos_rndx_s cn58xx; 429 struct cvmx_pow_qos_rndx_s cn58xxp1; 430}; 431 432union cvmx_pow_qos_thrx { 433 uint64_t u64; 434 struct cvmx_pow_qos_thrx_s { 435 uint64_t reserved_60_63:4; 436 uint64_t des_cnt:12; 437 uint64_t buf_cnt:12; 438 uint64_t free_cnt:12; 439 uint64_t reserved_23_23:1; 440 uint64_t max_thr:11; 441 uint64_t reserved_11_11:1; 442 uint64_t min_thr:11; 443 } s; 444 struct cvmx_pow_qos_thrx_cn30xx { 445 uint64_t reserved_55_63:9; 446 uint64_t des_cnt:7; 447 uint64_t reserved_43_47:5; 448 uint64_t buf_cnt:7; 449 uint64_t reserved_31_35:5; 450 uint64_t free_cnt:7; 451 uint64_t reserved_18_23:6; 452 uint64_t max_thr:6; 453 uint64_t reserved_6_11:6; 454 uint64_t min_thr:6; 455 } cn30xx; 456 struct cvmx_pow_qos_thrx_cn31xx { 457 uint64_t reserved_57_63:7; 458 uint64_t des_cnt:9; 459 uint64_t reserved_45_47:3; 460 uint64_t buf_cnt:9; 461 uint64_t reserved_33_35:3; 462 uint64_t free_cnt:9; 463 uint64_t reserved_20_23:4; 464 uint64_t max_thr:8; 465 uint64_t reserved_8_11:4; 466 uint64_t min_thr:8; 467 } cn31xx; 468 struct cvmx_pow_qos_thrx_s cn38xx; 469 struct cvmx_pow_qos_thrx_s cn38xxp2; 470 struct cvmx_pow_qos_thrx_cn31xx cn50xx; 471 struct cvmx_pow_qos_thrx_cn52xx { 472 uint64_t reserved_58_63:6; 473 uint64_t des_cnt:10; 474 uint64_t reserved_46_47:2; 475 uint64_t buf_cnt:10; 476 uint64_t reserved_34_35:2; 477 uint64_t free_cnt:10; 478 uint64_t reserved_21_23:3; 479 uint64_t max_thr:9; 480 uint64_t reserved_9_11:3; 481 uint64_t min_thr:9; 482 } cn52xx; 483 struct cvmx_pow_qos_thrx_cn52xx cn52xxp1; 484 struct cvmx_pow_qos_thrx_s cn56xx; 485 struct cvmx_pow_qos_thrx_s cn56xxp1; 486 struct cvmx_pow_qos_thrx_s cn58xx; 487 struct cvmx_pow_qos_thrx_s cn58xxp1; 488}; 489 490union cvmx_pow_ts_pc { 491 uint64_t u64; 492 struct cvmx_pow_ts_pc_s { 493 uint64_t reserved_32_63:32; 494 uint64_t ts_pc:32; 495 } s; 496 struct cvmx_pow_ts_pc_s cn30xx; 497 struct cvmx_pow_ts_pc_s cn31xx; 498 struct cvmx_pow_ts_pc_s cn38xx; 499 struct cvmx_pow_ts_pc_s cn38xxp2; 500 struct cvmx_pow_ts_pc_s cn50xx; 501 struct cvmx_pow_ts_pc_s cn52xx; 502 struct cvmx_pow_ts_pc_s cn52xxp1; 503 struct cvmx_pow_ts_pc_s cn56xx; 504 struct cvmx_pow_ts_pc_s cn56xxp1; 505 struct cvmx_pow_ts_pc_s cn58xx; 506 struct cvmx_pow_ts_pc_s cn58xxp1; 507}; 508 509union cvmx_pow_wa_com_pc { 510 uint64_t u64; 511 struct cvmx_pow_wa_com_pc_s { 512 uint64_t reserved_32_63:32; 513 uint64_t wa_pc:32; 514 } s; 515 struct cvmx_pow_wa_com_pc_s cn30xx; 516 struct cvmx_pow_wa_com_pc_s cn31xx; 517 struct cvmx_pow_wa_com_pc_s cn38xx; 518 struct cvmx_pow_wa_com_pc_s cn38xxp2; 519 struct cvmx_pow_wa_com_pc_s cn50xx; 520 struct cvmx_pow_wa_com_pc_s cn52xx; 521 struct cvmx_pow_wa_com_pc_s cn52xxp1; 522 struct cvmx_pow_wa_com_pc_s cn56xx; 523 struct cvmx_pow_wa_com_pc_s cn56xxp1; 524 struct cvmx_pow_wa_com_pc_s cn58xx; 525 struct cvmx_pow_wa_com_pc_s cn58xxp1; 526}; 527 528union cvmx_pow_wa_pcx { 529 uint64_t u64; 530 struct cvmx_pow_wa_pcx_s { 531 uint64_t reserved_32_63:32; 532 uint64_t wa_pc:32; 533 } s; 534 struct cvmx_pow_wa_pcx_s cn30xx; 535 struct cvmx_pow_wa_pcx_s cn31xx; 536 struct cvmx_pow_wa_pcx_s cn38xx; 537 struct cvmx_pow_wa_pcx_s cn38xxp2; 538 struct cvmx_pow_wa_pcx_s cn50xx; 539 struct cvmx_pow_wa_pcx_s cn52xx; 540 struct cvmx_pow_wa_pcx_s cn52xxp1; 541 struct cvmx_pow_wa_pcx_s cn56xx; 542 struct cvmx_pow_wa_pcx_s cn56xxp1; 543 struct cvmx_pow_wa_pcx_s cn58xx; 544 struct cvmx_pow_wa_pcx_s cn58xxp1; 545}; 546 547union cvmx_pow_wq_int { 548 uint64_t u64; 549 struct cvmx_pow_wq_int_s { 550 uint64_t reserved_32_63:32; 551 uint64_t iq_dis:16; 552 uint64_t wq_int:16; 553 } s; 554 struct cvmx_pow_wq_int_s cn30xx; 555 struct cvmx_pow_wq_int_s cn31xx; 556 struct cvmx_pow_wq_int_s cn38xx; 557 struct cvmx_pow_wq_int_s cn38xxp2; 558 struct cvmx_pow_wq_int_s cn50xx; 559 struct cvmx_pow_wq_int_s cn52xx; 560 struct cvmx_pow_wq_int_s cn52xxp1; 561 struct cvmx_pow_wq_int_s cn56xx; 562 struct cvmx_pow_wq_int_s cn56xxp1; 563 struct cvmx_pow_wq_int_s cn58xx; 564 struct cvmx_pow_wq_int_s cn58xxp1; 565}; 566 567union cvmx_pow_wq_int_cntx { 568 uint64_t u64; 569 struct cvmx_pow_wq_int_cntx_s { 570 uint64_t reserved_28_63:36; 571 uint64_t tc_cnt:4; 572 uint64_t ds_cnt:12; 573 uint64_t iq_cnt:12; 574 } s; 575 struct cvmx_pow_wq_int_cntx_cn30xx { 576 uint64_t reserved_28_63:36; 577 uint64_t tc_cnt:4; 578 uint64_t reserved_19_23:5; 579 uint64_t ds_cnt:7; 580 uint64_t reserved_7_11:5; 581 uint64_t iq_cnt:7; 582 } cn30xx; 583 struct cvmx_pow_wq_int_cntx_cn31xx { 584 uint64_t reserved_28_63:36; 585 uint64_t tc_cnt:4; 586 uint64_t reserved_21_23:3; 587 uint64_t ds_cnt:9; 588 uint64_t reserved_9_11:3; 589 uint64_t iq_cnt:9; 590 } cn31xx; 591 struct cvmx_pow_wq_int_cntx_s cn38xx; 592 struct cvmx_pow_wq_int_cntx_s cn38xxp2; 593 struct cvmx_pow_wq_int_cntx_cn31xx cn50xx; 594 struct cvmx_pow_wq_int_cntx_cn52xx { 595 uint64_t reserved_28_63:36; 596 uint64_t tc_cnt:4; 597 uint64_t reserved_22_23:2; 598 uint64_t ds_cnt:10; 599 uint64_t reserved_10_11:2; 600 uint64_t iq_cnt:10; 601 } cn52xx; 602 struct cvmx_pow_wq_int_cntx_cn52xx cn52xxp1; 603 struct cvmx_pow_wq_int_cntx_s cn56xx; 604 struct cvmx_pow_wq_int_cntx_s cn56xxp1; 605 struct cvmx_pow_wq_int_cntx_s cn58xx; 606 struct cvmx_pow_wq_int_cntx_s cn58xxp1; 607}; 608 609union cvmx_pow_wq_int_pc { 610 uint64_t u64; 611 struct cvmx_pow_wq_int_pc_s { 612 uint64_t reserved_60_63:4; 613 uint64_t pc:28; 614 uint64_t reserved_28_31:4; 615 uint64_t pc_thr:20; 616 uint64_t reserved_0_7:8; 617 } s; 618 struct cvmx_pow_wq_int_pc_s cn30xx; 619 struct cvmx_pow_wq_int_pc_s cn31xx; 620 struct cvmx_pow_wq_int_pc_s cn38xx; 621 struct cvmx_pow_wq_int_pc_s cn38xxp2; 622 struct cvmx_pow_wq_int_pc_s cn50xx; 623 struct cvmx_pow_wq_int_pc_s cn52xx; 624 struct cvmx_pow_wq_int_pc_s cn52xxp1; 625 struct cvmx_pow_wq_int_pc_s cn56xx; 626 struct cvmx_pow_wq_int_pc_s cn56xxp1; 627 struct cvmx_pow_wq_int_pc_s cn58xx; 628 struct cvmx_pow_wq_int_pc_s cn58xxp1; 629}; 630 631union cvmx_pow_wq_int_thrx { 632 uint64_t u64; 633 struct cvmx_pow_wq_int_thrx_s { 634 uint64_t reserved_29_63:35; 635 uint64_t tc_en:1; 636 uint64_t tc_thr:4; 637 uint64_t reserved_23_23:1; 638 uint64_t ds_thr:11; 639 uint64_t reserved_11_11:1; 640 uint64_t iq_thr:11; 641 } s; 642 struct cvmx_pow_wq_int_thrx_cn30xx { 643 uint64_t reserved_29_63:35; 644 uint64_t tc_en:1; 645 uint64_t tc_thr:4; 646 uint64_t reserved_18_23:6; 647 uint64_t ds_thr:6; 648 uint64_t reserved_6_11:6; 649 uint64_t iq_thr:6; 650 } cn30xx; 651 struct cvmx_pow_wq_int_thrx_cn31xx { 652 uint64_t reserved_29_63:35; 653 uint64_t tc_en:1; 654 uint64_t tc_thr:4; 655 uint64_t reserved_20_23:4; 656 uint64_t ds_thr:8; 657 uint64_t reserved_8_11:4; 658 uint64_t iq_thr:8; 659 } cn31xx; 660 struct cvmx_pow_wq_int_thrx_s cn38xx; 661 struct cvmx_pow_wq_int_thrx_s cn38xxp2; 662 struct cvmx_pow_wq_int_thrx_cn31xx cn50xx; 663 struct cvmx_pow_wq_int_thrx_cn52xx { 664 uint64_t reserved_29_63:35; 665 uint64_t tc_en:1; 666 uint64_t tc_thr:4; 667 uint64_t reserved_21_23:3; 668 uint64_t ds_thr:9; 669 uint64_t reserved_9_11:3; 670 uint64_t iq_thr:9; 671 } cn52xx; 672 struct cvmx_pow_wq_int_thrx_cn52xx cn52xxp1; 673 struct cvmx_pow_wq_int_thrx_s cn56xx; 674 struct cvmx_pow_wq_int_thrx_s cn56xxp1; 675 struct cvmx_pow_wq_int_thrx_s cn58xx; 676 struct cvmx_pow_wq_int_thrx_s cn58xxp1; 677}; 678 679union cvmx_pow_ws_pcx { 680 uint64_t u64; 681 struct cvmx_pow_ws_pcx_s { 682 uint64_t reserved_32_63:32; 683 uint64_t ws_pc:32; 684 } s; 685 struct cvmx_pow_ws_pcx_s cn30xx; 686 struct cvmx_pow_ws_pcx_s cn31xx; 687 struct cvmx_pow_ws_pcx_s cn38xx; 688 struct cvmx_pow_ws_pcx_s cn38xxp2; 689 struct cvmx_pow_ws_pcx_s cn50xx; 690 struct cvmx_pow_ws_pcx_s cn52xx; 691 struct cvmx_pow_ws_pcx_s cn52xxp1; 692 struct cvmx_pow_ws_pcx_s cn56xx; 693 struct cvmx_pow_ws_pcx_s cn56xxp1; 694 struct cvmx_pow_ws_pcx_s cn58xx; 695 struct cvmx_pow_ws_pcx_s cn58xxp1; 696}; 697 698#endif 699