1/* 2 * This program is free software; you can redistribute it and/or 3 * modify it under the terms of the GNU General Public License 4 * as published by the Free Software Foundation; either version 5 * 2 of the License, or (at your option) any later version. 6 * 7 * Based on powerpc version 8 */ 9 10#ifndef __ASM_MICROBLAZE_PCI_H 11#define __ASM_MICROBLAZE_PCI_H 12#ifdef __KERNEL__ 13 14#include <linux/types.h> 15#include <linux/slab.h> 16#include <linux/string.h> 17#include <linux/dma-mapping.h> 18#include <linux/pci.h> 19 20#include <asm/scatterlist.h> 21#include <asm/io.h> 22#include <asm/prom.h> 23#include <asm/pci-bridge.h> 24 25#define PCIBIOS_MIN_IO 0x1000 26#define PCIBIOS_MIN_MEM 0x10000000 27 28struct pci_dev; 29 30/* Values for the `which' argument to sys_pciconfig_iobase syscall. */ 31#define IOBASE_BRIDGE_NUMBER 0 32#define IOBASE_MEMORY 1 33#define IOBASE_IO 2 34#define IOBASE_ISA_IO 3 35#define IOBASE_ISA_MEM 4 36 37#define pcibios_scan_all_fns(a, b) 0 38 39/* 40 * Set this to 1 if you want the kernel to re-assign all PCI 41 * bus numbers (don't do that on ppc64 yet !) 42 */ 43#define pcibios_assign_all_busses() \ 44 (pci_has_flag(PCI_REASSIGN_ALL_BUS)) 45 46static inline void pcibios_set_master(struct pci_dev *dev) 47{ 48 /* No special bus mastering setup handling */ 49} 50 51static inline void pcibios_penalize_isa_irq(int irq, int active) 52{ 53 /* We don't do dynamic PCI IRQ allocation */ 54} 55 56#ifdef CONFIG_PCI 57extern void set_pci_dma_ops(struct dma_map_ops *dma_ops); 58extern struct dma_map_ops *get_pci_dma_ops(void); 59#else /* CONFIG_PCI */ 60#define set_pci_dma_ops(d) 61#define get_pci_dma_ops() NULL 62#endif 63 64#ifdef CONFIG_PCI 65static inline void pci_dma_burst_advice(struct pci_dev *pdev, 66 enum pci_dma_burst_strategy *strat, 67 unsigned long *strategy_parameter) 68{ 69 *strat = PCI_DMA_BURST_INFINITY; 70 *strategy_parameter = ~0UL; 71} 72#endif 73 74extern int pci_domain_nr(struct pci_bus *bus); 75 76/* Decide whether to display the domain number in /proc */ 77extern int pci_proc_domain(struct pci_bus *bus); 78 79struct vm_area_struct; 80/* Map a range of PCI memory or I/O space for a device into user space */ 81int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, 82 enum pci_mmap_state mmap_state, int write_combine); 83 84/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */ 85#define HAVE_PCI_MMAP 1 86 87extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val, 88 size_t count); 89extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val, 90 size_t count); 91extern int pci_mmap_legacy_page_range(struct pci_bus *bus, 92 struct vm_area_struct *vma, 93 enum pci_mmap_state mmap_state); 94 95#define HAVE_PCI_LEGACY 1 96 97/* The PCI address space does equal the physical memory 98 * address space (no IOMMU). The IDE and SCSI device layers use 99 * this boolean for bounce buffer decisions. 100 */ 101#define PCI_DMA_BUS_IS_PHYS (1) 102 103extern void pcibios_resource_to_bus(struct pci_dev *dev, 104 struct pci_bus_region *region, 105 struct resource *res); 106 107extern void pcibios_bus_to_resource(struct pci_dev *dev, 108 struct resource *res, 109 struct pci_bus_region *region); 110 111static inline struct resource *pcibios_select_root(struct pci_dev *pdev, 112 struct resource *res) 113{ 114 struct resource *root = NULL; 115 116 if (res->flags & IORESOURCE_IO) 117 root = &ioport_resource; 118 if (res->flags & IORESOURCE_MEM) 119 root = &iomem_resource; 120 121 return root; 122} 123 124extern void pcibios_claim_one_bus(struct pci_bus *b); 125 126extern void pcibios_finish_adding_to_bus(struct pci_bus *bus); 127 128extern void pcibios_resource_survey(void); 129 130extern struct pci_controller *init_phb_dynamic(struct device_node *dn); 131extern int remove_phb_dynamic(struct pci_controller *phb); 132 133extern struct pci_dev *of_create_pci_dev(struct device_node *node, 134 struct pci_bus *bus, int devfn); 135 136extern void of_scan_pci_bridge(struct device_node *node, 137 struct pci_dev *dev); 138 139extern void of_scan_bus(struct device_node *node, struct pci_bus *bus); 140extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus); 141 142extern int pci_read_irq_line(struct pci_dev *dev); 143 144extern int pci_bus_find_capability(struct pci_bus *bus, 145 unsigned int devfn, int cap); 146 147struct file; 148extern pgprot_t pci_phys_mem_access_prot(struct file *file, 149 unsigned long pfn, 150 unsigned long size, 151 pgprot_t prot); 152 153#define HAVE_ARCH_PCI_RESOURCE_TO_USER 154extern void pci_resource_to_user(const struct pci_dev *dev, int bar, 155 const struct resource *rsrc, 156 resource_size_t *start, resource_size_t *end); 157 158extern void pcibios_setup_bus_devices(struct pci_bus *bus); 159extern void pcibios_setup_bus_self(struct pci_bus *bus); 160 161/* This part of code was originaly in xilinx-pci.h */ 162#ifdef CONFIG_PCI_XILINX 163extern void __init xilinx_pci_init(void); 164#else 165static inline void __init xilinx_pci_init(void) { return; } 166#endif 167 168#endif /* __KERNEL__ */ 169#endif /* __ASM_MICROBLAZE_PCI_H */ 170