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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m68knommu/platform/5307/
1/***************************************************************************/
2
3/*
4 *	linux/arch/m68knommu/platform/5307/config.c
5 *
6 *	Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 *	Copyright (C) 2000, Lineo (www.lineo.com)
8 */
9
10/***************************************************************************/
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/io.h>
16#include <asm/machdep.h>
17#include <asm/coldfire.h>
18#include <asm/mcfsim.h>
19#include <asm/mcfuart.h>
20#include <asm/mcfwdebug.h>
21
22/***************************************************************************/
23
24/*
25 *	Some platforms need software versions of the GPIO data registers.
26 */
27unsigned short ppdata;
28unsigned char ledbank = 0xff;
29
30/***************************************************************************/
31
32static struct mcf_platform_uart m5307_uart_platform[] = {
33	{
34		.mapbase	= MCF_MBAR + MCFUART_BASE1,
35		.irq		= 73,
36	},
37	{
38		.mapbase 	= MCF_MBAR + MCFUART_BASE2,
39		.irq		= 74,
40	},
41	{ },
42};
43
44static struct platform_device m5307_uart = {
45	.name			= "mcfuart",
46	.id			= 0,
47	.dev.platform_data	= m5307_uart_platform,
48};
49
50static struct platform_device *m5307_devices[] __initdata = {
51	&m5307_uart,
52};
53
54/***************************************************************************/
55
56static void __init m5307_uart_init_line(int line, int irq)
57{
58	if (line == 0) {
59		writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
60		writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
61		mcf_mapirq2imr(irq, MCFINTC_UART0);
62	} else if (line == 1) {
63		writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
64		writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
65		mcf_mapirq2imr(irq, MCFINTC_UART1);
66	}
67}
68
69static void __init m5307_uarts_init(void)
70{
71	const int nrlines = ARRAY_SIZE(m5307_uart_platform);
72	int line;
73
74	for (line = 0; (line < nrlines); line++)
75		m5307_uart_init_line(line, m5307_uart_platform[line].irq);
76}
77
78/***************************************************************************/
79
80static void __init m5307_timers_init(void)
81{
82	/* Timer1 is always used as system timer */
83	writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
84		MCF_MBAR + MCFSIM_TIMER1ICR);
85	mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
86
87#ifdef CONFIG_HIGHPROFILE
88	/* Timer2 is to be used as a high speed profile timer  */
89	writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
90		MCF_MBAR + MCFSIM_TIMER2ICR);
91	mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
92#endif
93}
94
95/***************************************************************************/
96
97void m5307_cpu_reset(void)
98{
99	local_irq_disable();
100	/* Set watchdog to soft reset, and enabled */
101	__raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
102	for (;;)
103		/* wait for watchdog to timeout */;
104}
105
106/***************************************************************************/
107
108void __init config_BSP(char *commandp, int size)
109{
110#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3) || \
111	defined(CONFIG_CLEOPATRA)
112	/* Copy command line from FLASH to local buffer... */
113	memcpy(commandp, (char *) 0xf0004000, size);
114	commandp[size-1] = 0;
115#endif
116
117	mach_reset = m5307_cpu_reset;
118	m5307_timers_init();
119	m5307_uarts_init();
120
121	/* Only support the external interrupts on their primary level */
122	mcf_mapirq2imr(25, MCFINTC_EINT1);
123	mcf_mapirq2imr(27, MCFINTC_EINT3);
124	mcf_mapirq2imr(29, MCFINTC_EINT5);
125	mcf_mapirq2imr(31, MCFINTC_EINT7);
126
127#ifdef CONFIG_BDM_DISABLE
128	/*
129	 * Disable the BDM clocking.  This also turns off most of the rest of
130	 * the BDM device.  This is good for EMC reasons. This option is not
131	 * incompatible with the memory protection option.
132	 */
133	wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
134#endif
135}
136
137/***************************************************************************/
138
139static int __init init_BSP(void)
140{
141	platform_add_devices(m5307_devices, ARRAY_SIZE(m5307_devices));
142	return 0;
143}
144
145arch_initcall(init_BSP);
146
147/***************************************************************************/
148