1/* 2 * Copyright 2004-2008 Analog Devices Inc. 3 * 4 * Licensed under the GPL-2 or later. 5 */ 6 7#ifndef _BFIN_PTRACE_H 8#define _BFIN_PTRACE_H 9 10/* 11 * GCC defines register number like this: 12 * ----------------------------- 13 * 0 - 7 are data registers R0-R7 14 * 8 - 15 are address registers P0-P7 15 * 16 - 31 dsp registers I/B/L0 -- I/B/L3 & M0--M3 16 * 32 - 33 A registers A0 & A1 17 * 34 - status register 18 * ----------------------------- 19 * 20 * We follows above, except: 21 * 32-33 --- Low 32-bit of A0&1 22 * 34-35 --- High 8-bit of A0&1 23 */ 24 25#ifndef __ASSEMBLY__ 26 27struct task_struct; 28 29/* this struct defines the way the registers are stored on the 30 stack during a system call. */ 31 32struct pt_regs { 33 long orig_pc; 34 long ipend; 35 long seqstat; 36 long rete; 37 long retn; 38 long retx; 39 long pc; /* PC == RETI */ 40 long rets; 41 long reserved; /* Used as scratch during system calls */ 42 long astat; 43 long lb1; 44 long lb0; 45 long lt1; 46 long lt0; 47 long lc1; 48 long lc0; 49 long a1w; 50 long a1x; 51 long a0w; 52 long a0x; 53 long b3; 54 long b2; 55 long b1; 56 long b0; 57 long l3; 58 long l2; 59 long l1; 60 long l0; 61 long m3; 62 long m2; 63 long m1; 64 long m0; 65 long i3; 66 long i2; 67 long i1; 68 long i0; 69 long usp; 70 long fp; 71 long p5; 72 long p4; 73 long p3; 74 long p2; 75 long p1; 76 long p0; 77 long r7; 78 long r6; 79 long r5; 80 long r4; 81 long r3; 82 long r2; 83 long r1; 84 long r0; 85 long orig_r0; 86 long orig_p0; 87 long syscfg; 88}; 89 90/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ 91#define PTRACE_GETREGS 12 92#define PTRACE_SETREGS 13 /* ptrace signal */ 93 94#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */ 95#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */ 96#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */ 97 98#define PS_S (0x0002) 99 100#ifdef __KERNEL__ 101 102/* user_mode returns true if only one bit is set in IPEND, other than the 103 master interrupt enable. */ 104#define user_mode(regs) (!(((regs)->ipend & ~0x10) & (((regs)->ipend & ~0x10) - 1))) 105#define instruction_pointer(regs) ((regs)->pc) 106#define user_stack_pointer(regs) ((regs)->usp) 107#define profile_pc(regs) instruction_pointer(regs) 108extern void show_regs(struct pt_regs *); 109 110#define arch_has_single_step() (1) 111extern void user_enable_single_step(struct task_struct *child); 112extern void user_disable_single_step(struct task_struct *child); 113/* common code demands this function */ 114#define ptrace_disable(child) user_disable_single_step(child) 115 116/* 117 * Get the address of the live pt_regs for the specified task. 118 * These are saved onto the top kernel stack when the process 119 * is not running. 120 * 121 * Note: if a user thread is execve'd from kernel space, the 122 * kernel stack will not be empty on entry to the kernel, so 123 * ptracing these tasks will fail. 124 */ 125#define task_pt_regs(task) \ 126 (struct pt_regs *) \ 127 ((unsigned long)task_stack_page(task) + \ 128 (THREAD_SIZE - sizeof(struct pt_regs))) 129 130#endif /* __KERNEL__ */ 131 132#endif /* __ASSEMBLY__ */ 133 134/* 135 * Offsets used by 'ptrace' system call interface. 136 */ 137 138#define PT_R0 204 139#define PT_R1 200 140#define PT_R2 196 141#define PT_R3 192 142#define PT_R4 188 143#define PT_R5 184 144#define PT_R6 180 145#define PT_R7 176 146#define PT_P0 172 147#define PT_P1 168 148#define PT_P2 164 149#define PT_P3 160 150#define PT_P4 156 151#define PT_P5 152 152#define PT_FP 148 153#define PT_USP 144 154#define PT_I0 140 155#define PT_I1 136 156#define PT_I2 132 157#define PT_I3 128 158#define PT_M0 124 159#define PT_M1 120 160#define PT_M2 116 161#define PT_M3 112 162#define PT_L0 108 163#define PT_L1 104 164#define PT_L2 100 165#define PT_L3 96 166#define PT_B0 92 167#define PT_B1 88 168#define PT_B2 84 169#define PT_B3 80 170#define PT_A0X 76 171#define PT_A0W 72 172#define PT_A1X 68 173#define PT_A1W 64 174#define PT_LC0 60 175#define PT_LC1 56 176#define PT_LT0 52 177#define PT_LT1 48 178#define PT_LB0 44 179#define PT_LB1 40 180#define PT_ASTAT 36 181#define PT_RESERVED 32 182#define PT_RETS 28 183#define PT_PC 24 184#define PT_RETX 20 185#define PT_RETN 16 186#define PT_RETE 12 187#define PT_SEQSTAT 8 188#define PT_IPEND 4 189 190#define PT_ORIG_R0 208 191#define PT_ORIG_P0 212 192#define PT_SYSCFG 216 193#define PT_TEXT_ADDR 220 194#define PT_TEXT_END_ADDR 224 195#define PT_DATA_ADDR 228 196#define PT_FDPIC_EXEC 232 197#define PT_FDPIC_INTERP 236 198 199#define PT_LAST_PSEUDO PT_FDPIC_INTERP 200 201#endif /* _BFIN_PTRACE_H */ 202