1/* 2 * Generic GPIO driver for logic cells found in the Nomadik SoC 3 * 4 * Copyright (C) 2008,2009 STMicroelectronics 5 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it> 6 * Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12#include <linux/kernel.h> 13#include <linux/module.h> 14#include <linux/init.h> 15#include <linux/device.h> 16#include <linux/platform_device.h> 17#include <linux/io.h> 18#include <linux/clk.h> 19#include <linux/err.h> 20#include <linux/gpio.h> 21#include <linux/spinlock.h> 22#include <linux/interrupt.h> 23#include <linux/irq.h> 24#include <linux/slab.h> 25 26#include <plat/pincfg.h> 27#include <mach/hardware.h> 28#include <mach/gpio.h> 29 30/* 31 * The GPIO module in the Nomadik family of Systems-on-Chip is an 32 * AMBA device, managing 32 pins and alternate functions. The logic block 33 * is currently only used in the Nomadik. 34 * 35 * Symbols in this file are called "nmk_gpio" for "nomadik gpio" 36 */ 37 38#define NMK_GPIO_PER_CHIP 32 39struct nmk_gpio_chip { 40 struct gpio_chip chip; 41 void __iomem *addr; 42 struct clk *clk; 43 unsigned int parent_irq; 44 spinlock_t lock; 45 /* Keep track of configured edges */ 46 u32 edge_rising; 47 u32 edge_falling; 48}; 49 50static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip, 51 unsigned offset, int gpio_mode) 52{ 53 u32 bit = 1 << offset; 54 u32 afunc, bfunc; 55 56 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit; 57 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit; 58 if (gpio_mode & NMK_GPIO_ALT_A) 59 afunc |= bit; 60 if (gpio_mode & NMK_GPIO_ALT_B) 61 bfunc |= bit; 62 writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA); 63 writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB); 64} 65 66static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, 67 unsigned offset, enum nmk_gpio_slpm mode) 68{ 69 u32 bit = 1 << offset; 70 u32 slpm; 71 72 slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC); 73 if (mode == NMK_GPIO_SLPM_NOCHANGE) 74 slpm |= bit; 75 else 76 slpm &= ~bit; 77 writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC); 78} 79 80static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip, 81 unsigned offset, enum nmk_gpio_pull pull) 82{ 83 u32 bit = 1 << offset; 84 u32 pdis; 85 86 pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS); 87 if (pull == NMK_GPIO_PULL_NONE) 88 pdis |= bit; 89 else 90 pdis &= ~bit; 91 writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS); 92 93 if (pull == NMK_GPIO_PULL_UP) 94 writel(bit, nmk_chip->addr + NMK_GPIO_DATS); 95 else if (pull == NMK_GPIO_PULL_DOWN) 96 writel(bit, nmk_chip->addr + NMK_GPIO_DATC); 97} 98 99static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip, 100 unsigned offset) 101{ 102 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC); 103} 104 105static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset, 106 pin_cfg_t cfg) 107{ 108 static const char *afnames[] = { 109 [NMK_GPIO_ALT_GPIO] = "GPIO", 110 [NMK_GPIO_ALT_A] = "A", 111 [NMK_GPIO_ALT_B] = "B", 112 [NMK_GPIO_ALT_C] = "C" 113 }; 114 static const char *pullnames[] = { 115 [NMK_GPIO_PULL_NONE] = "none", 116 [NMK_GPIO_PULL_UP] = "up", 117 [NMK_GPIO_PULL_DOWN] = "down", 118 [3] /* illegal */ = "??" 119 }; 120 static const char *slpmnames[] = { 121 [NMK_GPIO_SLPM_INPUT] = "input", 122 [NMK_GPIO_SLPM_NOCHANGE] = "no-change", 123 }; 124 125 int pin = PIN_NUM(cfg); 126 int pull = PIN_PULL(cfg); 127 int af = PIN_ALT(cfg); 128 int slpm = PIN_SLPM(cfg); 129 130 dev_dbg(nmk_chip->chip.dev, "pin %d: af %s, pull %s, slpm %s\n", 131 pin, afnames[af], pullnames[pull], slpmnames[slpm]); 132 133 __nmk_gpio_make_input(nmk_chip, offset); 134 __nmk_gpio_set_pull(nmk_chip, offset, pull); 135 __nmk_gpio_set_slpm(nmk_chip, offset, slpm); 136 __nmk_gpio_set_mode(nmk_chip, offset, af); 137} 138 139/** 140 * nmk_config_pin - configure a pin's mux attributes 141 * @cfg: pin confguration 142 * 143 * Configures a pin's mode (alternate function or GPIO), its pull up status, 144 * and its sleep mode based on the specified configuration. The @cfg is 145 * usually one of the SoC specific macros defined in mach/<soc>-pins.h. These 146 * are constructed using, and can be further enhanced with, the macros in 147 * plat/pincfg.h. 148 * 149 * If a pin's mode is set to GPIO, it is configured as an input to avoid 150 * side-effects. The gpio can be manipulated later using standard GPIO API 151 * calls. 152 */ 153int nmk_config_pin(pin_cfg_t cfg) 154{ 155 struct nmk_gpio_chip *nmk_chip; 156 int gpio = PIN_NUM(cfg); 157 unsigned long flags; 158 159 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); 160 if (!nmk_chip) 161 return -EINVAL; 162 163 spin_lock_irqsave(&nmk_chip->lock, flags); 164 __nmk_config_pin(nmk_chip, gpio - nmk_chip->chip.base, cfg); 165 spin_unlock_irqrestore(&nmk_chip->lock, flags); 166 167 return 0; 168} 169EXPORT_SYMBOL(nmk_config_pin); 170 171/** 172 * nmk_config_pins - configure several pins at once 173 * @cfgs: array of pin configurations 174 * @num: number of elments in the array 175 * 176 * Configures several pins using nmk_config_pin(). Refer to that function for 177 * further information. 178 */ 179int nmk_config_pins(pin_cfg_t *cfgs, int num) 180{ 181 int ret = 0; 182 int i; 183 184 for (i = 0; i < num; i++) { 185 int ret = nmk_config_pin(cfgs[i]); 186 if (ret) 187 break; 188 } 189 190 return ret; 191} 192EXPORT_SYMBOL(nmk_config_pins); 193 194/** 195 * nmk_gpio_set_slpm() - configure the sleep mode of a pin 196 * @gpio: pin number 197 * @mode: NMK_GPIO_SLPM_INPUT or NMK_GPIO_SLPM_NOCHANGE, 198 * 199 * Sets the sleep mode of a pin. If @mode is NMK_GPIO_SLPM_INPUT, the pin is 200 * changed to an input (with pullup/down enabled) in sleep and deep sleep. If 201 * @mode is NMK_GPIO_SLPM_NOCHANGE, the pin remains in the state it was 202 * configured even when in sleep and deep sleep. 203 */ 204int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode) 205{ 206 struct nmk_gpio_chip *nmk_chip; 207 unsigned long flags; 208 209 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); 210 if (!nmk_chip) 211 return -EINVAL; 212 213 spin_lock_irqsave(&nmk_chip->lock, flags); 214 __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, mode); 215 spin_unlock_irqrestore(&nmk_chip->lock, flags); 216 217 return 0; 218} 219 220/** 221 * nmk_gpio_set_pull() - enable/disable pull up/down on a gpio 222 * @gpio: pin number 223 * @pull: one of NMK_GPIO_PULL_DOWN, NMK_GPIO_PULL_UP, and NMK_GPIO_PULL_NONE 224 * 225 * Enables/disables pull up/down on a specified pin. This only takes effect if 226 * the pin is configured as an input (either explicitly or by the alternate 227 * function). 228 * 229 * NOTE: If enabling the pull up/down, the caller must ensure that the GPIO is 230 * configured as an input. Otherwise, due to the way the controller registers 231 * work, this function will change the value output on the pin. 232 */ 233int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull) 234{ 235 struct nmk_gpio_chip *nmk_chip; 236 unsigned long flags; 237 238 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); 239 if (!nmk_chip) 240 return -EINVAL; 241 242 spin_lock_irqsave(&nmk_chip->lock, flags); 243 __nmk_gpio_set_pull(nmk_chip, gpio - nmk_chip->chip.base, pull); 244 spin_unlock_irqrestore(&nmk_chip->lock, flags); 245 246 return 0; 247} 248 249/* Mode functions */ 250int nmk_gpio_set_mode(int gpio, int gpio_mode) 251{ 252 struct nmk_gpio_chip *nmk_chip; 253 unsigned long flags; 254 255 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); 256 if (!nmk_chip) 257 return -EINVAL; 258 259 spin_lock_irqsave(&nmk_chip->lock, flags); 260 __nmk_gpio_set_mode(nmk_chip, gpio - nmk_chip->chip.base, gpio_mode); 261 spin_unlock_irqrestore(&nmk_chip->lock, flags); 262 263 return 0; 264} 265EXPORT_SYMBOL(nmk_gpio_set_mode); 266 267int nmk_gpio_get_mode(int gpio) 268{ 269 struct nmk_gpio_chip *nmk_chip; 270 u32 afunc, bfunc, bit; 271 272 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); 273 if (!nmk_chip) 274 return -EINVAL; 275 276 bit = 1 << (gpio - nmk_chip->chip.base); 277 278 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit; 279 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit; 280 281 return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0); 282} 283EXPORT_SYMBOL(nmk_gpio_get_mode); 284 285 286/* IRQ functions */ 287static inline int nmk_gpio_get_bitmask(int gpio) 288{ 289 return 1 << (gpio % 32); 290} 291 292static void nmk_gpio_irq_ack(unsigned int irq) 293{ 294 int gpio; 295 struct nmk_gpio_chip *nmk_chip; 296 297 gpio = NOMADIK_IRQ_TO_GPIO(irq); 298 nmk_chip = get_irq_chip_data(irq); 299 if (!nmk_chip) 300 return; 301 writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC); 302} 303 304enum nmk_gpio_irq_type { 305 NORMAL, 306 WAKE, 307}; 308 309static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, 310 int gpio, enum nmk_gpio_irq_type which, 311 bool enable) 312{ 313 u32 rimsc = which == WAKE ? NMK_GPIO_RWIMSC : NMK_GPIO_RIMSC; 314 u32 fimsc = which == WAKE ? NMK_GPIO_FWIMSC : NMK_GPIO_FIMSC; 315 u32 bitmask = nmk_gpio_get_bitmask(gpio); 316 u32 reg; 317 318 /* we must individually set/clear the two edges */ 319 if (nmk_chip->edge_rising & bitmask) { 320 reg = readl(nmk_chip->addr + rimsc); 321 if (enable) 322 reg |= bitmask; 323 else 324 reg &= ~bitmask; 325 writel(reg, nmk_chip->addr + rimsc); 326 } 327 if (nmk_chip->edge_falling & bitmask) { 328 reg = readl(nmk_chip->addr + fimsc); 329 if (enable) 330 reg |= bitmask; 331 else 332 reg &= ~bitmask; 333 writel(reg, nmk_chip->addr + fimsc); 334 } 335} 336 337static int nmk_gpio_irq_modify(unsigned int irq, enum nmk_gpio_irq_type which, 338 bool enable) 339{ 340 int gpio; 341 struct nmk_gpio_chip *nmk_chip; 342 unsigned long flags; 343 u32 bitmask; 344 345 gpio = NOMADIK_IRQ_TO_GPIO(irq); 346 nmk_chip = get_irq_chip_data(irq); 347 bitmask = nmk_gpio_get_bitmask(gpio); 348 if (!nmk_chip) 349 return -EINVAL; 350 351 spin_lock_irqsave(&nmk_chip->lock, flags); 352 __nmk_gpio_irq_modify(nmk_chip, gpio, which, enable); 353 spin_unlock_irqrestore(&nmk_chip->lock, flags); 354 355 return 0; 356} 357 358static void nmk_gpio_irq_mask(unsigned int irq) 359{ 360 nmk_gpio_irq_modify(irq, NORMAL, false); 361} 362 363static void nmk_gpio_irq_unmask(unsigned int irq) 364{ 365 nmk_gpio_irq_modify(irq, NORMAL, true); 366} 367 368static int nmk_gpio_irq_set_wake(unsigned int irq, unsigned int on) 369{ 370 return nmk_gpio_irq_modify(irq, WAKE, on); 371} 372 373static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type) 374{ 375 struct irq_desc *desc = irq_to_desc(irq); 376 bool enabled = !(desc->status & IRQ_DISABLED); 377 bool wake = desc->wake_depth; 378 int gpio; 379 struct nmk_gpio_chip *nmk_chip; 380 unsigned long flags; 381 u32 bitmask; 382 383 gpio = NOMADIK_IRQ_TO_GPIO(irq); 384 nmk_chip = get_irq_chip_data(irq); 385 bitmask = nmk_gpio_get_bitmask(gpio); 386 if (!nmk_chip) 387 return -EINVAL; 388 389 if (type & IRQ_TYPE_LEVEL_HIGH) 390 return -EINVAL; 391 if (type & IRQ_TYPE_LEVEL_LOW) 392 return -EINVAL; 393 394 spin_lock_irqsave(&nmk_chip->lock, flags); 395 396 if (enabled) 397 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false); 398 399 if (wake) 400 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, false); 401 402 nmk_chip->edge_rising &= ~bitmask; 403 if (type & IRQ_TYPE_EDGE_RISING) 404 nmk_chip->edge_rising |= bitmask; 405 406 nmk_chip->edge_falling &= ~bitmask; 407 if (type & IRQ_TYPE_EDGE_FALLING) 408 nmk_chip->edge_falling |= bitmask; 409 410 if (enabled) 411 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, true); 412 413 if (wake) 414 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true); 415 416 spin_unlock_irqrestore(&nmk_chip->lock, flags); 417 418 return 0; 419} 420 421static struct irq_chip nmk_gpio_irq_chip = { 422 .name = "Nomadik-GPIO", 423 .ack = nmk_gpio_irq_ack, 424 .mask = nmk_gpio_irq_mask, 425 .unmask = nmk_gpio_irq_unmask, 426 .set_type = nmk_gpio_irq_set_type, 427 .set_wake = nmk_gpio_irq_set_wake, 428}; 429 430static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 431{ 432 struct nmk_gpio_chip *nmk_chip; 433 struct irq_chip *host_chip = get_irq_chip(irq); 434 unsigned int gpio_irq; 435 u32 pending; 436 unsigned int first_irq; 437 438 if (host_chip->mask_ack) 439 host_chip->mask_ack(irq); 440 else { 441 host_chip->mask(irq); 442 if (host_chip->ack) 443 host_chip->ack(irq); 444 } 445 446 nmk_chip = get_irq_data(irq); 447 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base); 448 while ( (pending = readl(nmk_chip->addr + NMK_GPIO_IS)) ) { 449 gpio_irq = first_irq + __ffs(pending); 450 generic_handle_irq(gpio_irq); 451 } 452 453 host_chip->unmask(irq); 454} 455 456static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip) 457{ 458 unsigned int first_irq; 459 int i; 460 461 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base); 462 for (i = first_irq; i < first_irq + NMK_GPIO_PER_CHIP; i++) { 463 set_irq_chip(i, &nmk_gpio_irq_chip); 464 set_irq_handler(i, handle_edge_irq); 465 set_irq_flags(i, IRQF_VALID); 466 set_irq_chip_data(i, nmk_chip); 467 set_irq_type(i, IRQ_TYPE_EDGE_FALLING); 468 } 469 set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler); 470 set_irq_data(nmk_chip->parent_irq, nmk_chip); 471 return 0; 472} 473 474/* I/O Functions */ 475static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset) 476{ 477 struct nmk_gpio_chip *nmk_chip = 478 container_of(chip, struct nmk_gpio_chip, chip); 479 480 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC); 481 return 0; 482} 483 484static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset) 485{ 486 struct nmk_gpio_chip *nmk_chip = 487 container_of(chip, struct nmk_gpio_chip, chip); 488 u32 bit = 1 << offset; 489 490 return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0; 491} 492 493static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset, 494 int val) 495{ 496 struct nmk_gpio_chip *nmk_chip = 497 container_of(chip, struct nmk_gpio_chip, chip); 498 u32 bit = 1 << offset; 499 500 if (val) 501 writel(bit, nmk_chip->addr + NMK_GPIO_DATS); 502 else 503 writel(bit, nmk_chip->addr + NMK_GPIO_DATC); 504} 505 506static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset, 507 int val) 508{ 509 struct nmk_gpio_chip *nmk_chip = 510 container_of(chip, struct nmk_gpio_chip, chip); 511 512 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS); 513 nmk_gpio_set_output(chip, offset, val); 514 515 return 0; 516} 517 518static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 519{ 520 struct nmk_gpio_chip *nmk_chip = 521 container_of(chip, struct nmk_gpio_chip, chip); 522 523 return NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base) + offset; 524} 525 526/* This structure is replicated for each GPIO block allocated at probe time */ 527static struct gpio_chip nmk_gpio_template = { 528 .direction_input = nmk_gpio_make_input, 529 .get = nmk_gpio_get_input, 530 .direction_output = nmk_gpio_make_output, 531 .set = nmk_gpio_set_output, 532 .to_irq = nmk_gpio_to_irq, 533 .ngpio = NMK_GPIO_PER_CHIP, 534 .can_sleep = 0, 535}; 536 537static int __init nmk_gpio_probe(struct platform_device *dev) 538{ 539 struct nmk_gpio_platform_data *pdata = dev->dev.platform_data; 540 struct nmk_gpio_chip *nmk_chip; 541 struct gpio_chip *chip; 542 struct resource *res; 543 struct clk *clk; 544 int irq; 545 int ret; 546 547 if (!pdata) 548 return -ENODEV; 549 550 res = platform_get_resource(dev, IORESOURCE_MEM, 0); 551 if (!res) { 552 ret = -ENOENT; 553 goto out; 554 } 555 556 irq = platform_get_irq(dev, 0); 557 if (irq < 0) { 558 ret = irq; 559 goto out; 560 } 561 562 if (request_mem_region(res->start, resource_size(res), 563 dev_name(&dev->dev)) == NULL) { 564 ret = -EBUSY; 565 goto out; 566 } 567 568 clk = clk_get(&dev->dev, NULL); 569 if (IS_ERR(clk)) { 570 ret = PTR_ERR(clk); 571 goto out_release; 572 } 573 574 clk_enable(clk); 575 576 nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL); 577 if (!nmk_chip) { 578 ret = -ENOMEM; 579 goto out_clk; 580 } 581 /* 582 * The virt address in nmk_chip->addr is in the nomadik register space, 583 * so we can simply convert the resource address, without remapping 584 */ 585 nmk_chip->clk = clk; 586 nmk_chip->addr = io_p2v(res->start); 587 nmk_chip->chip = nmk_gpio_template; 588 nmk_chip->parent_irq = irq; 589 spin_lock_init(&nmk_chip->lock); 590 591 chip = &nmk_chip->chip; 592 chip->base = pdata->first_gpio; 593 chip->label = pdata->name; 594 chip->dev = &dev->dev; 595 chip->owner = THIS_MODULE; 596 597 ret = gpiochip_add(&nmk_chip->chip); 598 if (ret) 599 goto out_free; 600 601 platform_set_drvdata(dev, nmk_chip); 602 603 nmk_gpio_init_irq(nmk_chip); 604 605 dev_info(&dev->dev, "Bits %i-%i at address %p\n", 606 nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr); 607 return 0; 608 609out_free: 610 kfree(nmk_chip); 611out_clk: 612 clk_disable(clk); 613 clk_put(clk); 614out_release: 615 release_mem_region(res->start, resource_size(res)); 616out: 617 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret, 618 pdata->first_gpio, pdata->first_gpio+31); 619 return ret; 620} 621 622static struct platform_driver nmk_gpio_driver = { 623 .driver = { 624 .owner = THIS_MODULE, 625 .name = "gpio", 626 }, 627 .probe = nmk_gpio_probe, 628 .suspend = NULL, /* to be done */ 629 .resume = NULL, 630}; 631 632static int __init nmk_gpio_init(void) 633{ 634 return platform_driver_register(&nmk_gpio_driver); 635} 636 637core_initcall(nmk_gpio_init); 638 639MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini"); 640MODULE_DESCRIPTION("Nomadik GPIO Driver"); 641MODULE_LICENSE("GPL"); 642