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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-tegra/
1/*
2 * arch/arm/mach-tegra/board-harmony.c
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20#include <linux/serial_8250.h>
21#include <linux/clk.h>
22#include <linux/dma-mapping.h>
23#include <linux/pda_power.h>
24#include <linux/io.h>
25
26#include <asm/mach-types.h>
27#include <asm/mach/arch.h>
28#include <asm/mach/time.h>
29#include <asm/setup.h>
30
31#include <mach/iomap.h>
32#include <mach/irqs.h>
33
34#include "board.h"
35#include "board-harmony.h"
36#include "clock.h"
37
38/* NVidia bootloader tags */
39#define ATAG_NVIDIA		0x41000801
40
41#define ATAG_NVIDIA_RM			0x1
42#define ATAG_NVIDIA_DISPLAY		0x2
43#define ATAG_NVIDIA_FRAMEBUFFER		0x3
44#define ATAG_NVIDIA_CHIPSHMOO		0x4
45#define ATAG_NVIDIA_CHIPSHMOOPHYS	0x5
46#define ATAG_NVIDIA_PRESERVED_MEM_0	0x10000
47#define ATAG_NVIDIA_PRESERVED_MEM_N	2
48#define ATAG_NVIDIA_FORCE_32		0x7fffffff
49
50struct tag_tegra {
51	__u32 bootarg_key;
52	__u32 bootarg_len;
53	char bootarg[1];
54};
55
56static int __init parse_tag_nvidia(const struct tag *tag)
57{
58
59	return 0;
60}
61__tagtable(ATAG_NVIDIA, parse_tag_nvidia);
62
63static struct plat_serial8250_port debug_uart_platform_data[] = {
64	{
65		.membase	= IO_ADDRESS(TEGRA_UARTD_BASE),
66		.mapbase	= TEGRA_UARTD_BASE,
67		.irq		= INT_UARTD,
68		.flags		= UPF_BOOT_AUTOCONF,
69		.iotype		= UPIO_MEM,
70		.regshift	= 2,
71		.uartclk	= 216000000,
72	}, {
73		.flags		= 0
74	}
75};
76
77static struct platform_device debug_uart = {
78	.name = "serial8250",
79	.id = PLAT8250_DEV_PLATFORM,
80	.dev = {
81		.platform_data = debug_uart_platform_data,
82	},
83};
84
85static struct platform_device *harmony_devices[] __initdata = {
86	&debug_uart,
87};
88
89static void __init tegra_harmony_fixup(struct machine_desc *desc,
90	struct tag *tags, char **cmdline, struct meminfo *mi)
91{
92	mi->nr_banks = 2;
93	mi->bank[0].start = PHYS_OFFSET;
94	mi->bank[0].size = 448 * SZ_1M;
95	mi->bank[1].start = SZ_512M;
96	mi->bank[1].size = SZ_512M;
97}
98
99static __initdata struct tegra_clk_init_table harmony_clk_init_table[] = {
100	/* name		parent		rate		enabled */
101	{ "uartd",	"pll_p",	216000000,	true },
102	{ NULL,		NULL,		0,		0},
103};
104
105static void __init tegra_harmony_init(void)
106{
107	tegra_common_init();
108
109	tegra_clk_init_from_table(harmony_clk_init_table);
110
111	harmony_pinmux_init();
112
113	platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices));
114}
115
116MACHINE_START(HARMONY, "harmony")
117	.boot_params  = 0x00000100,
118	.phys_io        = IO_APB_PHYS,
119	.io_pg_offst    = ((IO_APB_VIRT) >> 18) & 0xfffc,
120	.fixup		= tegra_harmony_fixup,
121	.init_irq       = tegra_init_irq,
122	.init_machine   = tegra_harmony_init,
123	.map_io         = tegra_map_common_io,
124	.timer          = &tegra_timer,
125MACHINE_END
126