1/* 2 * Freescale STMP378X interrupts 3 * 4 * Copyright (C) 2005 Sigmatel Inc 5 * 6 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. 7 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. 8 */ 9 10/* 11 * The code contained herein is licensed under the GNU General Public 12 * License. You may obtain a copy of the GNU General Public License 13 * Version 2 or later at the following locations: 14 * 15 * http://www.opensource.org/licenses/gpl-license.html 16 * http://www.gnu.org/copyleft/gpl.html 17 */ 18 19#define IRQ_DEBUG_UART 0 20#define IRQ_COMMS_RX 1 21#define IRQ_COMMS_TX 1 22#define IRQ_SSP2_ERROR 2 23#define IRQ_VDD5V 3 24#define IRQ_HEADPHONE_SHORT 4 25#define IRQ_DAC_DMA 5 26#define IRQ_DAC_ERROR 6 27#define IRQ_ADC_DMA 7 28#define IRQ_ADC_ERROR 8 29#define IRQ_SPDIF_DMA 9 30#define IRQ_SAIF2_DMA 9 31#define IRQ_SPDIF_ERROR 10 32#define IRQ_SAIF1_IRQ 10 33#define IRQ_SAIF2_IRQ 10 34#define IRQ_USB_CTRL 11 35#define IRQ_USB_WAKEUP 12 36#define IRQ_GPMI_DMA 13 37#define IRQ_SSP1_DMA 14 38#define IRQ_SSP_ERROR 15 39#define IRQ_GPIO0 16 40#define IRQ_GPIO1 17 41#define IRQ_GPIO2 18 42#define IRQ_SAIF1_DMA 19 43#define IRQ_SSP2_DMA 20 44#define IRQ_ECC8_IRQ 21 45#define IRQ_RTC_ALARM 22 46#define IRQ_UARTAPP_TX_DMA 23 47#define IRQ_UARTAPP_INTERNAL 24 48#define IRQ_UARTAPP_RX_DMA 25 49#define IRQ_I2C_DMA 26 50#define IRQ_I2C_ERROR 27 51#define IRQ_TIMER0 28 52#define IRQ_TIMER1 29 53#define IRQ_TIMER2 30 54#define IRQ_TIMER3 31 55#define IRQ_BATT_BRNOUT 32 56#define IRQ_VDDD_BRNOUT 33 57#define IRQ_VDDIO_BRNOUT 34 58#define IRQ_VDD18_BRNOUT 35 59#define IRQ_TOUCH_DETECT 36 60#define IRQ_LRADC_CH0 37 61#define IRQ_LRADC_CH1 38 62#define IRQ_LRADC_CH2 39 63#define IRQ_LRADC_CH3 40 64#define IRQ_LRADC_CH4 41 65#define IRQ_LRADC_CH5 42 66#define IRQ_LRADC_CH6 43 67#define IRQ_LRADC_CH7 44 68#define IRQ_LCDIF_DMA 45 69#define IRQ_LCDIF_ERROR 46 70#define IRQ_DIGCTL_DEBUG_TRAP 47 71#define IRQ_RTC_1MSEC 48 72#define IRQ_DRI_DMA 49 73#define IRQ_DRI_ATTENTION 50 74#define IRQ_GPMI_ATTENTION 51 75#define IRQ_IR 52 76#define IRQ_DCP_VMI 53 77#define IRQ_DCP 54 78#define IRQ_BCH 56 79#define IRQ_PXP 57 80#define IRQ_UARTAPP2_TX_DMA 58 81#define IRQ_UARTAPP2_INTERNAL 59 82#define IRQ_UARTAPP2_RX_DMA 60 83#define IRQ_VDAC_DETECT 61 84#define IRQ_VDD5V_DROOP 64 85#define IRQ_DCDC4P2_BO 65 86 87 88#define NR_REAL_IRQS 128 89#define NR_IRQS (NR_REAL_IRQS + 32 * 3) 90 91/* All interrupts are FIQ capable */ 92#define FIQ_START IRQ_DEBUG_UART 93 94/* Hard disk IRQ is a GPMI attention IRQ */ 95#define IRQ_HARDDISK IRQ_GPMI_ATTENTION 96