1/* 2 * arch/arm/mach-dove/include/mach/irqs.h 3 * 4 * IRQ definitions for Marvell Dove 88AP510 SoC 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without any 8 * warranty of any kind, whether express or implied. 9 */ 10 11#ifndef __ASM_ARCH_IRQS_H 12#define __ASM_ARCH_IRQS_H 13 14/* 15 * Dove Low Interrupt Controller 16 */ 17#define IRQ_DOVE_BRIDGE 0 18#define IRQ_DOVE_H2C 1 19#define IRQ_DOVE_C2H 2 20#define IRQ_DOVE_NAND 3 21#define IRQ_DOVE_PDMA 4 22#define IRQ_DOVE_SPI1 5 23#define IRQ_DOVE_SPI0 6 24#define IRQ_DOVE_UART_0 7 25#define IRQ_DOVE_UART_1 8 26#define IRQ_DOVE_UART_2 9 27#define IRQ_DOVE_UART_3 10 28#define IRQ_DOVE_I2C 11 29#define IRQ_DOVE_GPIO_0_7 12 30#define IRQ_DOVE_GPIO_8_15 13 31#define IRQ_DOVE_GPIO_16_23 14 32#define IRQ_DOVE_PCIE0_ERR 15 33#define IRQ_DOVE_PCIE0 16 34#define IRQ_DOVE_PCIE1_ERR 17 35#define IRQ_DOVE_PCIE1 18 36#define IRQ_DOVE_I2S0 19 37#define IRQ_DOVE_I2S0_ERR 20 38#define IRQ_DOVE_I2S1 21 39#define IRQ_DOVE_I2S1_ERR 22 40#define IRQ_DOVE_USB_ERR 23 41#define IRQ_DOVE_USB0 24 42#define IRQ_DOVE_USB1 25 43#define IRQ_DOVE_GE00_RX 26 44#define IRQ_DOVE_GE00_TX 27 45#define IRQ_DOVE_GE00_MISC 28 46#define IRQ_DOVE_GE00_SUM 29 47#define IRQ_DOVE_GE00_ERR 30 48#define IRQ_DOVE_CRYPTO 31 49 50/* 51 * Dove High Interrupt Controller 52 */ 53#define IRQ_DOVE_AC97 32 54#define IRQ_DOVE_PMU 33 55#define IRQ_DOVE_CAM 34 56#define IRQ_DOVE_SDIO0 35 57#define IRQ_DOVE_SDIO1 36 58#define IRQ_DOVE_SDIO0_WAKEUP 37 59#define IRQ_DOVE_SDIO1_WAKEUP 38 60#define IRQ_DOVE_XOR_00 39 61#define IRQ_DOVE_XOR_01 40 62#define IRQ_DOVE_XOR0_ERR 41 63#define IRQ_DOVE_XOR_10 42 64#define IRQ_DOVE_XOR_11 43 65#define IRQ_DOVE_XOR1_ERR 44 66#define IRQ_DOVE_LCD_DCON 45 67#define IRQ_DOVE_LCD1 46 68#define IRQ_DOVE_LCD0 47 69#define IRQ_DOVE_GPU 48 70#define IRQ_DOVE_PERFORM_MNTR 49 71#define IRQ_DOVE_VPRO_DMA1 51 72#define IRQ_DOVE_SSP_TIMER 54 73#define IRQ_DOVE_SSP 55 74#define IRQ_DOVE_MC_L2_ERR 56 75#define IRQ_DOVE_CRYPTO_ERR 59 76#define IRQ_DOVE_GPIO_24_31 60 77#define IRQ_DOVE_HIGH_GPIO 61 78#define IRQ_DOVE_SATA 62 79 80/* 81 * DOVE General Purpose Pins 82 */ 83#define IRQ_DOVE_GPIO_START 64 84#define NR_GPIO_IRQS 64 85 86/* 87 * PMU interrupts 88 */ 89#define IRQ_DOVE_PMU_START (IRQ_DOVE_GPIO_START + NR_GPIO_IRQS) 90#define NR_PMU_IRQS 7 91#define IRQ_DOVE_RTC (IRQ_DOVE_PMU_START + 5) 92 93#define NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS) 94 95/* Required for compatability with PXA AC97 driver. */ 96#define IRQ_AC97 IRQ_DOVE_AC97 97/* Required for compatability with PXA DMA driver. */ 98#define IRQ_DMA IRQ_DOVE_PDMA 99/* Required for compatability with PXA NAND driver */ 100#define IRQ_NAND IRQ_DOVE_NAND 101#endif 102