1/***************************************************************************** 2* Copyright 2003 - 2008 Broadcom Corporation. All rights reserved. 3* 4* Unless you and Broadcom execute a separate written software license 5* agreement governing use of this software, this software is licensed to you 6* under the terms of the GNU General Public License version 2, available at 7* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). 8* 9* Notwithstanding the above, under no circumstances may you combine this 10* software in any way with any other Broadcom software provided under a 11* license other than the GPL, without Broadcom's express prior written 12* consent. 13*****************************************************************************/ 14 15/****************************************************************************/ 16/** 17* @file secHw_def.h 18* 19* @brief Definitions for configuring/testing secure blocks 20* 21* @note 22* None 23*/ 24/****************************************************************************/ 25 26#ifndef SECHW_DEF_H 27#define SECHW_DEF_H 28 29#include <mach/csp/mm_io.h> 30 31/* Bit mask for various secure device */ 32#define secHw_BLK_MASK_CHIP_CONTROL 0x00000001 33#define secHw_BLK_MASK_KEY_SCAN 0x00000002 34#define secHw_BLK_MASK_TOUCH_SCREEN 0x00000004 35#define secHw_BLK_MASK_UART0 0x00000008 36#define secHw_BLK_MASK_UART1 0x00000010 37#define secHw_BLK_MASK_WATCHDOG 0x00000020 38#define secHw_BLK_MASK_SPUM 0x00000040 39#define secHw_BLK_MASK_DDR2 0x00000080 40#define secHw_BLK_MASK_EXT_MEM 0x00000100 41#define secHw_BLK_MASK_ESW 0x00000200 42#define secHw_BLK_MASK_SPU 0x00010000 43#define secHw_BLK_MASK_PKA 0x00020000 44#define secHw_BLK_MASK_RNG 0x00040000 45#define secHw_BLK_MASK_RTC 0x00080000 46#define secHw_BLK_MASK_OTP 0x00100000 47#define secHw_BLK_MASK_BOOT 0x00200000 48#define secHw_BLK_MASK_MPU 0x00400000 49#define secHw_BLK_MASK_TZCTRL 0x00800000 50#define secHw_BLK_MASK_INTR 0x01000000 51 52/* Trustzone register set */ 53typedef struct { 54 volatile uint32_t status; /* read only - reflects status of writes of 2 write registers */ 55 volatile uint32_t setUnsecure; /* write only. reads back as 0 */ 56 volatile uint32_t setSecure; /* write only. reads back as 0 */ 57} secHw_TZREG_t; 58 59/* There are 2 register sets. The first is for the lower 16 bits, the 2nd */ 60/* is for the higher 16 bits. */ 61 62typedef enum { 63 secHw_IDX_LS = 0, 64 secHw_IDX_MS = 1, 65 secHw_IDX_NUM 66} secHw_IDX_e; 67 68typedef struct { 69 volatile secHw_TZREG_t reg[secHw_IDX_NUM]; 70} secHw_REGS_t; 71 72/****************************************************************************/ 73/** 74* @brief Configures a device as a secure device 75* 76*/ 77/****************************************************************************/ 78static inline void secHw_setSecure(uint32_t mask /* mask of type secHw_BLK_MASK_XXXXXX */ 79 ); 80 81/****************************************************************************/ 82/** 83* @brief Configures a device as a non-secure device 84* 85*/ 86/****************************************************************************/ 87static inline void secHw_setUnsecure(uint32_t mask /* mask of type secHw_BLK_MASK_XXXXXX */ 88 ); 89 90/****************************************************************************/ 91/** 92* @brief Get the trustzone status for all components. 1 = non-secure, 0 = secure 93* 94*/ 95/****************************************************************************/ 96static inline uint32_t secHw_getStatus(void); 97 98#include <mach/csp/secHw_inline.h> 99 100#endif /* SECHW_DEF_H */ 101