1/* ********************************************************************* 2 * SB1250 Board Support Package 3 * 4 * Board-specific initialization File: BCM1250CPCI_INIT.S 5 * 6 * This module contains the assembly-language part of the init 7 * code for this board support package. The routine 8 * "board_earlyinit" lives here. 9 * 10 * Author: Mitch Lichtenberg (mpl@broadcom.com) 11 * 12 ********************************************************************* 13 * 14 * Copyright 2000,2001,2002,2003 15 * Broadcom Corporation. All rights reserved. 16 * 17 * This software is furnished under license and may be used and 18 * copied only in accordance with the following terms and 19 * conditions. Subject to these conditions, you may download, 20 * copy, install, use, modify and distribute modified or unmodified 21 * copies of this software in source and/or binary form. No title 22 * or ownership is transferred hereby. 23 * 24 * 1) Any source code used, modified or distributed must reproduce 25 * and retain this copyright notice and list of conditions 26 * as they appear in the source file. 27 * 28 * 2) No right is granted to use any trade name, trademark, or 29 * logo of Broadcom Corporation. The "Broadcom Corporation" 30 * name may not be used to endorse or promote products derived 31 * from this software without the prior written permission of 32 * Broadcom Corporation. 33 * 34 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 35 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 36 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 37 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 38 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 39 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 40 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 41 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 42 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 43 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 44 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 45 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 46 * THE POSSIBILITY OF SUCH DAMAGE. 47 ********************************************************************* */ 48 49 50#include "sbmips.h" 51#include "sb1250_genbus.h" 52#include "sb1250_regs.h" 53#include "sb1250_scd.h" 54#include "bsp_config.h" 55#include "mipsmacros.h" 56#include "bcm1250cpci.h" 57#include "sb1250_draminit.h" 58 59 .text 60 61 62 63/* ********************************************************************* 64 * Macros 65 ********************************************************************* */ 66 67/* 68 * Define this to send the LED messages to the serial port instead 69 * of to the LEDs. 70 */ 71 72/* #define _SERIAL_PORT_LEDS_ */ 73 74#ifdef _SERIAL_PORT_LEDS_ 75#include "sb1250_uart.h" /* need this for serial defs */ 76#endif 77 78 79/* ********************************************************************* 80 * BOARD_EARLYINIT() 81 * 82 * Initialize board registers. This is the earliest 83 * time the BSP gets control. This routine cannot assume that 84 * memory is operational, and therefore all code in this routine 85 * must run from registers only. The $ra register must not 86 * be modified, as it contains the return address. 87 * 88 * This routine will be called from uncached space, before 89 * the caches are initialized. If you want to make 90 * subroutine calls from here, you must use the CALLKSEG1 macro. 91 * 92 * Among other things, this is where the GPIO registers get 93 * programmed to make on-board LEDs function, or other startup 94 * that has to be done before anything will work. 95 * 96 * Input parameters: 97 * nothing 98 * 99 * Return value: 100 * nothing 101 ********************************************************************* */ 102 103LEAF(board_earlyinit) 104 105 106 # 107 # Configure the GPIOs 108 # 109 110 li t0,PHYS_TO_K1(A_GPIO_DIRECTION) 111 li t1,GPIO_OUTPUT_MASK 112 sd t1,0(t0) 113 114 li t0,PHYS_TO_K1(A_GPIO_INT_TYPE) 115 li t1,GPIO_INTERRUPT_MASK 116 sd t1,0(t0) 117 118 119 # 120 # Configure the alternate boot ROM 121 # 122 123 li t0,PHYS_TO_K1(A_IO_EXT_CS_BASE(ALT_BOOTROM_CS)) 124 125 li t1,ALT_BOOTROM_PHYS >> S_IO_ADDRBASE 126 sd t1,R_IO_EXT_START_ADDR(t0) 127 128 li t1,ALT_BOOTROM_SIZE-1 129 sd t1,R_IO_EXT_MULT_SIZE(t0) 130 131 li t1,ALT_BOOTROM_TIMING0 132 sd t1,R_IO_EXT_TIME_CFG0(t0) 133 134 li t1,ALT_BOOTROM_TIMING1 135 sd t1,R_IO_EXT_TIME_CFG1(t0) 136 137 li t1,ALT_BOOTROM_CONFIG 138 sd t1,R_IO_EXT_CFG(t0) 139 140 # 141 # Configure the LEDs 142 # 143 144 li t0,PHYS_TO_K1(A_IO_EXT_CS_BASE(LEDS_CS)) 145 li t1,LEDS_PHYS >> S_IO_ADDRBASE 146 sd t1,R_IO_EXT_START_ADDR(t0) 147 148 li t1,LEDS_SIZE-1 /* Needs to be 1 smaller, se UM for details */ 149 sd t1,R_IO_EXT_MULT_SIZE(t0) 150 151 li t1,LEDS_TIMING0 152 sd t1,R_IO_EXT_TIME_CFG0(t0) 153 154 li t1,LEDS_TIMING1 155 sd t1,R_IO_EXT_TIME_CFG1(t0) 156 157 li t1,LEDS_CONFIG 158 sd t1,R_IO_EXT_CFG(t0) 159 160 161 162 # 163 # Configure the IDE interface 164 # 165 166 li t0,PHYS_TO_K1(A_IO_EXT_CS_BASE(IDE_CS)) 167 168 li t1,IDE_PHYS >> S_IO_ADDRBASE 169 sd t1,R_IO_EXT_START_ADDR(t0) 170 171 li t1,IDE_SIZE-1 172 sd t1,R_IO_EXT_MULT_SIZE(t0) 173 174 li t1,IDE_TIMING0 175 sd t1,R_IO_EXT_TIME_CFG0(t0) 176 177 li t1,IDE_TIMING1 178 sd t1,R_IO_EXT_TIME_CFG1(t0) 179 180 li t1,IDE_CONFIG 181 sd t1,R_IO_EXT_CFG(t0) 182 183 184 # 185 # Configure the USB controllers 186 # 187 188 li t0,PHYS_TO_K1(A_IO_EXT_CS_BASE(USBCTL_CS)) 189 li t1,USBCTL_PHYS >> S_IO_ADDRBASE 190 sd t1,R_IO_EXT_START_ADDR(t0) 191 192 li t1,USBCTL_SIZE-1 /* Needs to be 1 smaller, se UM for details */ 193 sd t1,R_IO_EXT_MULT_SIZE(t0) 194 195 li t1,USBCTL_TIMING0 196 sd t1,R_IO_EXT_TIME_CFG0(t0) 197 198 li t1,USBCTL_TIMING1 199 sd t1,R_IO_EXT_TIME_CFG1(t0) 200 201 li t1,USBCTL_CONFIG 202 sd t1,R_IO_EXT_CFG(t0) 203 204 205 # 206 # Configure the PCMCIA 207 # 208 209 li t0,PHYS_TO_K1(A_IO_EXT_CS_BASE(PCMCIA_CS)) 210 211 li t1,PCMCIA_PHYS >> S_IO_ADDRBASE 212 sd t1,R_IO_EXT_START_ADDR(t0) 213 214 li t1,PCMCIA_SIZE-1 215 sd t1,R_IO_EXT_MULT_SIZE(t0) 216 217 li t1,PCMCIA_TIMING0 218 sd t1,R_IO_EXT_TIME_CFG0(t0) 219 220 li t1,PCMCIA_TIMING1 221 sd t1,R_IO_EXT_TIME_CFG1(t0) 222 223 li t1,PCMCIA_CONFIG 224 sd t1,R_IO_EXT_CFG(t0) 225 226 227 # 228 # Configure the CompactPCI CPLD 229 # 230 231 li t0,PHYS_TO_K1(A_IO_EXT_CS_BASE(CPCICPLD_CS)) 232 li t1,CPCICPLD_PHYS >> S_IO_ADDRBASE 233 sd t1,R_IO_EXT_START_ADDR(t0) 234 235 li t1,CPCICPLD_SIZE-1 /* Needs to be 1 smaller, se UM for details */ 236 sd t1,R_IO_EXT_MULT_SIZE(t0) 237 238 li t1,CPCICPLD_TIMING0 239 sd t1,R_IO_EXT_TIME_CFG0(t0) 240 241 li t1,CPCICPLD_TIMING1 242 sd t1,R_IO_EXT_TIME_CFG1(t0) 243 244 li t1,CPCICPLD_CONFIG 245 sd t1,R_IO_EXT_CFG(t0) 246 247 248 j ra 249 250END(board_earlyinit) 251 252 253/* ********************************************************************* 254 * BOARD_DRAMINFO 255 * 256 * Return the address of the DRAM information table 257 * 258 * Input parameters: 259 * nothing 260 * 261 * Return value: 262 * v0 - DRAM info table, return 0 to use default table 263 ********************************************************************* */ 264 265 266LEAF(board_draminfo) 267 268 # 269 # This board has soldered-down memory. 270 # 271 272 move t0,ra 273 274 LOADREL(v0,dramtab) 275 276 move ra,t0 277 j ra 278 279dramtab: 280 281 /* 282 * DDR SDRAMs 283 * 284 * Channel interleaving is allowed. 285 */ 286 287 DRAM_GLOBALS(CFG_DRAM_INTERLEAVE) 288 289 /* 290 * 128MB on MC 0 (JEDEC SDRAM) 291 * Samsung K4H561638B - 16Mx16 chips 292 * 293 * Minimum tMEMCLK: 8.0ns (125Mhz max freq) 294 * 295 * CS0 Geometry: 13 rows, 9 columns, 2 bankbits 296 * 297 * 64khz refresh, CAS Latency 2.5 298 * Timing (ns): tCK=7.50 tRAS=45 tRP=20.00 tRRD=15.0 tRCD=20.0 tRFC=auto tRC=auto 299 * 300 * Clock Config: Default 301 */ 302 303 304 DRAM_CHAN_CFG(MC_CHAN0, DRT10(8,0), JEDEC, CASCHECK, BLKSIZE32, CFG_DRAM_CSINTERLEAVE, CFG_DRAM_ECC, 0) 305 DRAM_CS_GEOM(MC_CS0, 13, 9, 2) 306 DRAM_CS_TIMING(DRT10(7,5), JEDEC_RFSH_64khz, JEDEC_CASLAT_25, 0, 45, DRT4(20,0), DRT4(15,0), DRT4(20,0), 0, 0) 307 308 /* 309 * 128MB on MC 1 (JEDEC SDRAM) 310 * Samsung K4H561638B - 16Mx16 chips 311 * 312 * Minimum tMEMCLK: 8.0ns (125Mhz max freq) 313 * 314 * CS0 Geometry: 13 rows, 9 columns, 2 bankbits 315 * 316 * 64khz refresh, CAS Latency 2.5 317 * Timing (ns): tCK=7.50 tRAS=45 tRP=20.00 tRRD=15.0 tRCD=20.0 tRFC=auto tRC=auto 318 * 319 * Clock Config: Default 320 */ 321 322 DRAM_CHAN_CFG(MC_CHAN1, DRT10(8,0), JEDEC, CASCHECK, BLKSIZE32, CFG_DRAM_CSINTERLEAVE, CFG_DRAM_ECC, 0) 323 DRAM_CS_GEOM(MC_CS0, 13, 9, 2) 324 DRAM_CS_TIMING(DRT10(7,5), JEDEC_RFSH_64khz, JEDEC_CASLAT_25, 0, 45, DRT4(20,0), DRT4(15,0), DRT4(20,0), 0, 0) 325 326 DRAM_EOT 327 328END(board_draminfo) 329 330 331/* ********************************************************************* 332 * BOARD_UARTA_TXCHAR 333 * 334 * Transmit a single character via UART A 335 * 336 * Input parameters: 337 * a0 - character to transmit (low-order 8 bits) 338 * 339 * Return value: 340 * nothing 341 * 342 * Registers used: 343 * t0,t1 344 ********************************************************************* */ 345#ifdef _SERIAL_PORT_LEDS_ 346LEAF(board_uarta_txchar) 347 348 # Wait until there is space in the transmit buffer 349 3501: li t0,PHYS_TO_K1(A_DUART_STATUS_A) 351 ld t1,(t0) # Get status bits 352 and t1,M_DUART_TX_RDY # test for ready 353 beq t1,0,1b # keep going till ready 354 355 # Okay, now send the character. 356 357 li t0,PHYS_TO_K1(A_DUART_TX_HOLD_A) 358 sd a0,(t0) 359 360 # done! 361 362 j ra 363 364END(board_uarta_txchar) 365#endif 366 367/* ********************************************************************* 368 * BOARD_SETLEDS(x) 369 * 370 * Set LEDs for boot-time progress indication. Not used if 371 * the board does not have progress LEDs. This routine 372 * must not call any other routines, since it may be invoked 373 * either from KSEG0 or KSEG1 and it may be invoked 374 * whether or not the icache is operational. 375 * 376 * Input parameters: 377 * a0 - LED value (8 bits per character, 4 characters) 378 * 379 * Return value: 380 * nothing 381 * 382 * Registers used: 383 * t0,t1,t2,t3 384 ********************************************************************* */ 385 386 387#define LED_CHAR0 (32+8*3) 388#define LED_CHAR1 (32+8*2) 389#define LED_CHAR2 (32+8*1) 390#define LED_CHAR3 (32+8*0) 391 392LEAF(board_setleds) 393 394#ifdef _SERIAL_PORT_LEDS_ 395 396 /* 397 * Sending to serial port 398 */ 399 move t3,ra 400 move t2,a0 401 402 li a0,'[' 403 bal board_uarta_txchar 404 405 move a0,t2 406 rol a0,8 407 bal board_uarta_txchar 408 rol a0,8 409 bal board_uarta_txchar 410 rol a0,8 411 bal board_uarta_txchar 412 rol a0,8 413 bal board_uarta_txchar 414 415 li a0,']' 416 bal board_uarta_txchar 417 418 move ra,t3 419 j ra 420 421#else 422 423 /* 424 * Sending to LEDs 425 */ 426 li t0,PHYS_TO_K1(LEDS_PHYS) 427 428 rol a0,a0,8 429 and t1,a0,0xFF 430 sb t1,LED_CHAR0(t0) 431 432 rol a0,a0,8 433 and t1,a0,0xFF 434 sb t1,LED_CHAR1(t0) 435 436 rol a0,a0,8 437 and t1,a0,0xFF 438 sb t1,LED_CHAR2(t0) 439 440 rol a0,a0,8 441 and t1,a0,0xFF 442 sb t1,LED_CHAR3(t0) 443 444 j ra 445#endif 446 447END(board_setleds) 448 449