1 2#GCC = mips64-sb1sim-gcc -DDBG -DBCMDBG 3GCC = mips64-sb1sim-gcc 4GLD = mips64-sb1sim-ld 5AR = mips64-sb1sim-ar 6OBJDUMP = mips64-sb1sim-objdump 7OBJCOPY = mips64-sb1sim-objcopy 8RANLIB = mips64-sb1sim-ranlib 9 10CFG_MLONG64 ?= 0 11 12# Note: Big endian is not likely to work without some 13# major source changes in the drivers. 14# Note: this configuration is for loading into FLASH via 15# Epidiag via "s flashutl.tcl" and "flwritefile cfe.bin" 16# Link and Run cached (Note: will not work from Epidiag) 17CFG_LITTLE ?= 1 18CFG_RELOC ?= 1 19CFG_UNCACHED ?= 0 20CFG_VAPI ?= 0 21CFG_BOOTRAM ?= 0 22CFG_BOARDNAME = "BCM5365_FPGA" 23CFG_PCI = 0 24CFG_MSYS = 0 25CFG_MINIMAL_SIZE=0 26 27# This configuration will allow you to use Epidiag with "s mipsutls.tcl" 28# and "loadcfe" which loads the cfe_boot.S stub and loads cfe ELF file. 29# Link & Run uncached (FPGA, 5365FPGA ala Epidiag/JTAG) 30# For JTAG Boot, uncomment these lines 31#CFG_LITTLE ?= 1 32#CFG_RELOC ?= 0 33#CFG_UNCACHED ?= 1 34#CFG_VAPI ?= 0 35#CFG_BOOTRAM ?= 1 36#CFG_UNCACHED_RAMAPP ?= 1 37#CFG_BOARDNAME = "BCM5365_FPGA" 38#CFLAGS += -DJTAG_RAM_BOOT 39 40# Define the CPU family 41CFLAGS += -DMIPS33xx 42 43# Define the chip (-DBCM4704, -DBCM5365) 44CFLAGS += -DBCM5365 45 46# Disable Flow control on UART 47CFLAGS += -DNS16550_NO_FLOW 48 49# SDRAM Type (comment out for DDR default) 50CFLAGS += -DSDRAM_MODE 51 52CFG_PCI = 0 53CFG_ZLIB=1 54CFG_MSYS= 0 55 56# 57# Set the path HND_TOP, below, to the 'src' 58# directory checked out from the HND's CVS repository. 59# 60# Below this directory should be the "shared" and "et/sys" 61# directories. 62# 63# The CFE build procedure will pull in sources required 64# for the Ethernet driver from this location. 65# 66HND_TOP=../../../.. 67 68TOP = ../../../cfe 69ARCH = mips 70CPU = bcmcore 71BOARD = bcm4x5x 72 73include ${TOP}/main/cfe.mk 74 75#LDLIBS += -lgcc 76 77ALL : cfe cfe.flash 78 echo done 79 80include ${TOP}/main/cfe_link.mk 81