1 2#GCC = mips64-sb1sim-gcc -DDBG -DBCMDBG 3GCC = mips64-sb1sim-gcc 4GLD = mips64-sb1sim-ld 5AR = mips64-sb1sim-ar 6OBJDUMP = mips64-sb1sim-objdump 7OBJCOPY = mips64-sb1sim-objcopy 8RANLIB = mips64-sb1sim-ranlib 9 10CFG_MLONG64 ?= 0 11 12# Uncomment to boot from PCI/JTAG 13#CFG_EPIBOOT=1 14 15# Note: Big endian is not likely to work without some 16# major source changes in the drivers. 17# Note: this configuration is for loading into FLASH via 18# Epidiag 19 20# Link & Run uncached (Quickturn ala Epidiag/JTAG) 21ifeq ($(CFG_EPIBOOT),1) 22CFG_LITTLE ?= 1 23CFG_RELOC ?= 0 24CFG_UNCACHED ?= 1 25CFG_VAPI ?= 0 26CFG_BOOTRAM ?= 1 27CFG_UNCACHED_RAMAPP ?= 1 28CFG_BOARDNAME = "BU4704" 29# For JTAG Boot, uncomment this line 30CFLAGS += -DJTAG_RAM_BOOT 31#CFG_MINIMAL_SIZE=1 32CFG_MINIMAL_SIZE=0 33 34else 35 36# Note: this configuration is for loading into FLASH via 37# Epidiag via "s flashutl.tcl" and "flwritefile cfe.bin" 38# Link and Run cached (Note: will not work from Epidiag) 39 40CFG_LITTLE ?= 1 41CFG_RELOC ?= 1 42CFG_UNCACHED ?= 0 43CFG_VAPI ?= 0 44CFG_BOOTRAM ?= 0 45CFG_BOARDNAME = "BU4704" 46CFG_PCI = 0 47CFG_MSYS = 0 48CFG_MINIMAL_SIZE=0 49endif 50 51# Define the CPU family 52CFLAGS += -DMIPS33xx 53CFLAGS += -DBCM4704 54 55# Define for building 4704 56CFG_4704 = 1 57 58# For DDR SDRAM 59CFLAGS += -DDDRAM 60 61# Disable Flow control on UART 62CFLAGS += -DNS16550_NO_FLOW 63 64CFG_PCI = 0 65CFG_ZLIB=1 66CFG_MSYS= 0 67 68 69# 70# Set the path HND_TOP, below, to the 'src' 71# directory checked out from the HND's CVS repository. 72# 73# Below this directory should be the "shared" and "et/sys" 74# directories. 75# 76# The CFE build procedure will pull in sources required 77# for the Ethernet driver from this location. 78# 79HND_TOP=../../../.. 80 81TOP = ../../../cfe 82ARCH = mips 83CPU = bcmcore 84BOARD = bcm4x5x 85 86include ${TOP}/main/cfe.mk 87 88#LDLIBS += -lgcc 89 90ALL : cfe cfe.flash 91 echo done 92 93include ${TOP}/main/cfe_link.mk 94