1#include <asm/io.h> 2 3//JY#define PARPORT_IRQ IRQ_GPIO19 4#define PARPORT_IRQ 0x02 5//#define PARPORT_GPIO GPIO_GPIO19 6#define PARPORT_GPIO GPIO_GPIO2 7 8/* --- register definitions ------------------------------- */ 9//#define CONTROL(p) ((p)->base + (0x2<<1)) 10//#define STATUS(p) ((p)->base + (0x1<<1)) 11//#define DATA(p) ((p)->base + 0x0) 12#define CONTROL(p) ((p)->base + (0x2))//JY 13#define STATUS(p) ((p)->base + (0x1))//JY 14#define DATA(p) ((p)->base + 0x0)//JY 15 16#define MAX_CLASS_NAME 16 17#define MAX_MFR 16 18#define MAX_MODEL 32 19#define MAX_DESCRIPT 64 20 21struct parport_splink_device_info { 22 const char class_name[MAX_CLASS_NAME]; 23 const char mfr[MAX_MFR]; 24 const char model[MAX_MODEL]; 25 const char description[MAX_DESCRIPT]; 26#ifdef PRNSTATUS//JY20021224 27 const char status[4]; 28#endif 29}; 30 31 32struct parport_splink_private { 33 /* Contents of CTR. */ 34 unsigned char ctr; 35 36 /* Bitmask of writable CTR bits. */ 37 unsigned char ctr_writable; 38 39 /* Whether or not there's an ECR. */ 40 int ecr; 41 42 /* Number of PWords that FIFO will hold. */ 43 int fifo_depth; 44 45 /* Number of bytes per portword. */ 46 int pword; 47 48 /* Not used yet. */ 49 int readIntrThreshold; 50 int writeIntrThreshold; 51 52 /* buffer suitable for DMA, if DMA enabled */ 53 char *dma_buf; 54 dma_addr_t dma_handle; 55 struct pci_dev *dev; 56}; 57 58extern __inline__ void parport_splink_write_data(struct parport *p, unsigned char d) 59{ 60 outb(d, DATA(p)); 61} 62 63extern __inline__ unsigned char parport_splink_read_data(struct parport *p) 64{ 65 return inb (DATA (p)); 66} 67 68#define dump_parport_state(args...) 69 70/* __parport_splink_frob_control differs from parport_splink_frob_control in that 71 * it doesn't do any extra masking. */ 72static __inline__ unsigned char __parport_splink_frob_control (struct parport *p, 73 unsigned char mask, 74 unsigned char val) 75{ 76 struct parport_splink_private *priv = p->physport->private_data; 77 unsigned char ctr = priv->ctr; 78 79 ctr = (ctr & ~mask) ^ val; 80 ctr &= priv->ctr_writable; /* only write writable bits. */ 81 outb (ctr, CONTROL (p)); 82 priv->ctr = ctr; /* Update soft copy */ 83 return ctr; 84} 85 86extern __inline__ void parport_splink_data_reverse (struct parport *p) 87{ 88 __parport_splink_frob_control (p, 0x20, 0x20); 89} 90 91extern __inline__ void parport_splink_data_forward (struct parport *p) 92{ 93 __parport_splink_frob_control (p, 0x20, 0x00); 94} 95 96extern __inline__ void parport_splink_write_control (struct parport *p, 97 unsigned char d) 98{ 99 const unsigned char wm = (PARPORT_CONTROL_STROBE | 100 PARPORT_CONTROL_AUTOFD | 101 PARPORT_CONTROL_INIT | 102 PARPORT_CONTROL_SELECT); 103// Neo 104printk("write_control: parport_splink.h\n"); 105 106 /* Take this out when drivers have adapted to newer interface. */ 107 if (d & 0x20) { 108 printk (KERN_DEBUG "%s (%s): use data_reverse for this!\n", 109 p->name, p->cad->name); 110 parport_splink_data_reverse (p); 111 } 112 113 __parport_splink_frob_control (p, wm, d & wm); 114} 115 116extern __inline__ unsigned char parport_splink_read_control(struct parport *p) 117{ 118 const unsigned char rm = (PARPORT_CONTROL_STROBE | 119 PARPORT_CONTROL_AUTOFD | 120 PARPORT_CONTROL_INIT | 121 PARPORT_CONTROL_SELECT); 122 const struct parport_splink_private *priv = p->physport->private_data; 123 return priv->ctr & rm; /* Use soft copy */ 124} 125 126extern __inline__ unsigned char parport_splink_frob_control (struct parport *p, 127 unsigned char mask, 128 unsigned char val) 129{ 130 const unsigned char wm = (PARPORT_CONTROL_STROBE | 131 PARPORT_CONTROL_AUTOFD | 132 PARPORT_CONTROL_INIT | 133 PARPORT_CONTROL_SELECT); 134 135 /* Take this out when drivers have adapted to newer interface. */ 136 if (mask & 0x20) { 137 printk (KERN_DEBUG "%s (%s): use data_%s for this!\n", 138 p->name, p->cad->name, 139 (val & 0x20) ? "reverse" : "forward"); 140 if (val & 0x20) 141 parport_splink_data_reverse (p); 142 else 143 parport_splink_data_forward (p); 144 } 145 146 /* Restrict mask and val to control lines. */ 147 mask &= wm; 148 val &= wm; 149 150 return __parport_splink_frob_control (p, mask, val); 151} 152 153extern __inline__ unsigned char parport_splink_read_status(struct parport *p) 154{ 155 return inb(STATUS(p)); 156} 157 158 159extern void parport_splink_release_resources(struct parport *p); 160extern int parport_splink_claim_resources(struct parport *p); 161 162/* PCMCIA code will want to get us to look at a port. Provide a mechanism. */ 163extern struct parport *parport_splink_probe_port (unsigned int base); 164extern void parport_splink_unregister_port (struct parport *p); 165 166