1/*
2 *  linux/include/linux/mtd/nand.h
3 *
4 *  Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
5 *                     Steven J. Hill <sjhill@cotw.com>
6 *
7 * $Id: nand.h,v 1.1.1.1 2008/10/15 03:29:28 james26_jang Exp $
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 *  Info:
14 *   Contains standard defines and IDs for NAND flash devices
15 *
16 *  Changelog:
17 *   01-31-2000 DMW     Created
18 *   09-18-2000 SJH     Moved structure out of the Disk-On-Chip drivers
19 *			so it can be used by other NAND flash device
20 *			drivers. I also changed the copyright since none
21 *			of the original contents of this file are specific
22 *			to DoC devices. David can whack me with a baseball
23 *			bat later if I did something naughty.
24 *   10-11-2000 SJH     Added private NAND flash structure for driver
25 *   10-24-2000 SJH     Added prototype for 'nand_scan' function
26 */
27#ifndef __LINUX_MTD_NAND_H
28#define __LINUX_MTD_NAND_H
29
30#include <linux/config.h>
31#include <linux/sched.h>
32
33/*
34 * Searches for a NAND device
35 */
36extern int nand_scan (struct mtd_info *mtd);
37
38/*
39 * Standard NAND flash commands
40 */
41#define NAND_CMD_READ0		0
42#define NAND_CMD_READ1		1
43#define NAND_CMD_PAGEPROG	0x10
44#define NAND_CMD_READOOB	0x50
45#define NAND_CMD_ERASE1		0x60
46#define NAND_CMD_STATUS		0x70
47#define NAND_CMD_SEQIN		0x80
48#define NAND_CMD_READID		0x90
49#define NAND_CMD_ERASE2		0xd0
50#define NAND_CMD_RESET		0xff
51
52/*
53 * Enumeration for NAND flash chip state
54 */
55typedef enum {
56	FL_READY,
57	FL_READING,
58	FL_WRITING,
59	FL_ERASING,
60	FL_SYNCING
61} nand_state_t;
62
63/*
64 * NAND Private Flash Chip Data
65 *
66 * Structure overview:
67 *
68 *  IO_ADDR - address to access the 8 I/O lines to the flash device
69 *
70 *  CTRL_ADDR - address where ALE, CLE and CE control bits are accessed
71 *
72 *  CLE - location in control word for Command Latch Enable bit
73 *
74 *  ALE - location in control word for Address Latch Enable bit
75 *
76 *  NCE - location in control word for nChip Enable bit
77 *
78 *  chip_lock - spinlock used to protect access to this structure
79 *
80 *  wq - wait queue to sleep on if a NAND operation is in progress
81 *
82 *  state - give the current state of the NAND device
83 *
84 *  page_shift - number of address bits in a page (column address bits)
85 *
86 *  data_buf - data buffer passed to/from MTD user modules
87 *
88 *  ecc_code_buf - used only for holding calculated or read ECCs for
89 *                 a page read or written when ECC is in use
90 *
91 *  reserved - padding to make structure fall on word boundary if
92 *             when ECC is in use
93 */
94struct nand_chip {
95	unsigned long IO_ADDR;
96	unsigned long CTRL_ADDR;
97	unsigned int CLE;
98	unsigned int ALE;
99	unsigned int NCE;
100	spinlock_t chip_lock;
101	wait_queue_head_t wq;
102	nand_state_t state;
103	int page_shift;
104	u_char *data_buf;
105#ifdef CONFIG_MTD_NAND_ECC
106	u_char ecc_code_buf[6];
107	u_char reserved[2];
108#endif
109};
110
111/*
112 * NAND Flash Manufacturer ID Codes
113 */
114#define NAND_MFR_TOSHIBA	0x98
115#define NAND_MFR_SAMSUNG	0xec
116
117/*
118 * NAND Flash Device ID Structure
119 *
120 * Structure overview:
121 *
122 *  name - Complete name of device
123 *
124 *  manufacture_id - manufacturer ID code of device.
125 *
126 *  model_id - model ID code of device.
127 *
128 *  chipshift - total number of address bits for the device which
129 *              is used to calculate address offsets and the total
130 *              number of bytes the device is capable of.
131 *
132 *  page256 - denotes if flash device has 256 byte pages or not.
133 *
134 *  pageadrlen - number of bytes minus one needed to hold the
135 *               complete address into the flash array. Keep in
136 *               mind that when a read or write is done to a
137 *               specific address, the address is input serially
138 *               8 bits at a time. This structure member is used
139 *               by the read/write routines as a loop index for
140 *               shifting the address out 8 bits at a time.
141 *
142 *  erasesize - size of an erase block in the flash device.
143 */
144struct nand_flash_dev {
145	char * name;
146	int manufacture_id;
147	int model_id;
148	int chipshift;
149	char page256;
150	char pageadrlen;
151	unsigned long erasesize;
152};
153
154#endif /* __LINUX_MTD_NAND_H */
155