1/* DMA.h - DMA functions and definitions*/
2
3/* Copyright Galileo Technology. */
4
5#ifndef __INCdmah
6#define __INCdmah
7
8/* includes */
9
10#include "core.h"
11
12/* defines */
13
14#define FIRST_DMA_ENGINE   0
15#define LAST_DMA_ENGINE    3
16
17#define FLY_BY						BIT0
18#define RD_WR_FLY					BIT1
19#define DECREMENT_SOURCE_ADDRESS	BIT2
20#define HOLD_SOURCE_ADDRESS			BIT3
21#define DECREMENT_DEST_ADDRESS		BIT4
22#define HOLD_DEST_ADDRESS			BIT5
23#define DTL_1BYTE					BIT6 | BIT8
24#define DTL_2BYTES					BIT7 | BIT8
25#define DTL_4BYTES					BIT7
26#define DTL_8BYTES					NO_BIT
27#define DTL_16BYTES					BIT6
28#define DTL_32BYTES					BIT6 | BIT7
29#define DTL_64BYTES					BIT6 | BIT7 | BIT8
30#define NON_CHAIN_MOD				BIT9
31#define INT_EVERY_NULL_POINTER		BIT10
32#define BLOCK_TRANSFER_MODE			BIT11
33#define CHANNEL_ENABLE				BIT12
34#define FETCH_NEXT_RECORED			BIT13
35#define DMA_ACTIVITY_STATUS         BIT14
36#define ALIGN_TOWARD_DEST			BIT15
37#define MASK_DMA_REQ				BIT16
38#define ENABLE_DESCRIPTOR			BIT17
39#define ENABLE_EOT					BIT18
40#define ENABLE_EOT_INTERRUPT		BIT19
41#define ABORT_DMA					BIT20
42#define SOURCE_ADDR_IN_PCI0			BIT21
43#define SOURCE_ADDR_IN_PCI1			BIT22
44#define DEST_ADDR_IN_PCI0			BIT23
45#define DEST_ADDR_IN_PCI1			BIT24
46#define REC_ADDR_IN_PCI0			BIT25
47#define REC_ADDR_IN_PCI1			BIT26
48#define REQ_FROM_TIMER_COUNTER		BIT28
49
50/* typedefs */
51
52typedef enum dmaEngine{DMA_ENG_0,DMA_ENG_1,DMA_ENG_2,DMA_ENG_3} DMA_ENGINE;
53
54/* priority definitions */
55typedef enum prioChan01{ROUND_ROBIN01,CH_1,CH_0} PRIO_CHAN_0_1;
56typedef enum prioChan23{ROUND_ROBIN23,CH_3,CH_2} PRIO_CHAN_2_3;
57typedef enum prioGroup{ROUND_ROBIN,CH_2_3,CH_0_1} PRIO_GROUP;
58typedef enum prioOpt{RETURN_BUS,KEEP_BUS} PRIO_OPT;
59
60typedef struct dmaRecored
61{
62    unsigned int    ByteCnt;
63    unsigned int    SrcAdd;
64    unsigned int    DestAdd;
65    unsigned int    NextRecPtr;
66} DMA_RECORED;
67
68typedef enum __dma_status{CHANNEL_BUSY,NO_SUCH_CHANNEL,DMA_OK,
69                            GENERAL_ERROR} DMA_STATUS;
70
71DMA_STATUS dmaTransfer (DMA_ENGINE engine,unsigned int sourceAddr,
72                        unsigned int destAddr,unsigned int numOfBytes,
73                        unsigned int command,DMA_RECORED * nextRecoredPointer);
74bool	dmaCommand (DMA_ENGINE channel,unsigned int command);
75bool    isDmaChannelActive (DMA_ENGINE channel);
76
77bool    changeDmaPriority(PRIO_CHAN_0_1 prio_01, PRIO_CHAN_2_3 prio_23,
78                          PRIO_GROUP prioGrp, PRIO_OPT prioOpt);
79
80#endif /* __INCdmah */
81