1/* $Id: ide.h,v 1.1.1.1 2008/10/15 03:29:17 james26_jang Exp $ 2 * ide.h: SPARC PCI specific IDE glue. 3 * 4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) 5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) 6 * Adaptation from sparc64 version to sparc by Pete Zaitcev. 7 */ 8 9#ifndef _SPARC_IDE_H 10#define _SPARC_IDE_H 11 12#ifdef __KERNEL__ 13 14#include <linux/config.h> 15#include <asm/pgtable.h> 16#include <asm/io.h> 17#include <asm/hdreg.h> 18#include <asm/psr.h> 19 20#undef MAX_HWIFS 21#define MAX_HWIFS 2 22 23#define ide__sti() __sti() 24 25static __inline__ int ide_default_irq(ide_ioreg_t base) 26{ 27 return 0; 28} 29 30static __inline__ ide_ioreg_t ide_default_io_base(int index) 31{ 32 return 0; 33} 34 35/* 36 * Doing any sort of ioremap() here does not work 37 * because this function may be called with null aguments. 38 */ 39static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq) 40{ 41 ide_ioreg_t reg = data_port; 42 int i; 43 44 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { 45 hw->io_ports[i] = reg; 46 reg += 1; 47 } 48 if (ctrl_port) { 49 hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port; 50 } else { 51 hw->io_ports[IDE_CONTROL_OFFSET] = 0; 52 } 53 if (irq != NULL) 54 *irq = 0; 55 hw->io_ports[IDE_IRQ_OFFSET] = 0; 56} 57 58/* 59 * This registers the standard ports for this architecture with the IDE 60 * driver. 61 */ 62static __inline__ void ide_init_default_hwifs(void) 63{ 64#ifndef CONFIG_BLK_DEV_IDEPCI 65 hw_regs_t hw; 66 int index; 67 68 for (index = 0; index < MAX_HWIFS; index++) { 69 ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, NULL); 70 hw.irq = ide_default_irq(ide_default_io_base(index)); 71 ide_register_hw(&hw, NULL); 72 } 73#endif /* CONFIG_BLK_DEV_IDEPCI */ 74} 75 76typedef union { 77 unsigned int all : 8; /* all of the bits together */ 78 struct { 79 unsigned int bit7 : 1; 80 unsigned int lba : 1; 81 unsigned int bit5 : 1; 82 unsigned int unit : 1; 83 unsigned int head : 4; 84 } b; 85} select_t; 86 87typedef union { 88 unsigned int all : 8; /* all of the bits together */ 89 struct { 90 unsigned int HOB : 1; /* 48-bit address ordering */ 91 unsigned int reserved456: 3; 92 unsigned bit3 : 1; /* ATA-2 thingy */ 93 unsigned int SRST : 1; /* host soft reset bit */ 94 unsigned int nIEN : 1; /* device INTRQ to host */ 95 unsigned int bit0 : 1; 96 } b; 97} control_t; 98 99static __inline__ int ide_request_irq(unsigned int irq, 100 void (*handler)(int, void *, struct pt_regs *), 101 unsigned long flags, const char *name, void *devid) 102{ 103 return request_irq(irq, handler, SA_SHIRQ, name, devid); 104} 105 106static __inline__ void ide_free_irq(unsigned int irq, void *dev_id) 107{ 108 free_irq(irq, dev_id); 109} 110 111static __inline__ int ide_check_region(ide_ioreg_t base, unsigned int size) 112{ 113 /* We leave these empty because pcic.c calls sparc_alloc_io() */ 114 return 0; 115} 116 117static __inline__ void ide_request_region(ide_ioreg_t base, unsigned int size, 118 const char *name) 119{ 120} 121 122static __inline__ void ide_release_region(ide_ioreg_t base, unsigned int size) 123{ 124} 125 126#undef SUPPORT_SLOW_DATA_PORTS 127#define SUPPORT_SLOW_DATA_PORTS 0 128 129#undef SUPPORT_VLB_SYNC 130#define SUPPORT_VLB_SYNC 0 131 132#undef HD_DATA 133#define HD_DATA ((ide_ioreg_t)0) 134 135/* From m68k code... */ 136 137#ifdef insl 138#undef insl 139#endif 140#ifdef outsl 141#undef outsl 142#endif 143#ifdef insw 144#undef insw 145#endif 146#ifdef outsw 147#undef outsw 148#endif 149 150#define insl(data_reg, buffer, wcount) insw(data_reg, buffer, (wcount)<<1) 151#define outsl(data_reg, buffer, wcount) outsw(data_reg, buffer, (wcount)<<1) 152 153#define insw(port, buf, nr) ide_insw((port), (buf), (nr)) 154#define outsw(port, buf, nr) ide_outsw((port), (buf), (nr)) 155 156static __inline__ void ide_insw(unsigned long port, 157 void *dst, 158 unsigned long count) 159{ 160 volatile unsigned short *data_port; 161 /* unsigned long end = (unsigned long)dst + (count << 1); */ /* P3 */ 162 u16 *ps = dst; 163 u32 *pi; 164 165 data_port = (volatile unsigned short *)port; 166 167 if(((unsigned long)ps) & 0x2) { 168 *ps++ = *data_port; 169 count--; 170 } 171 pi = (u32 *)ps; 172 while(count >= 2) { 173 u32 w; 174 175 w = (*data_port) << 16; 176 w |= (*data_port); 177 *pi++ = w; 178 count -= 2; 179 } 180 ps = (u16 *)pi; 181 if(count) 182 *ps++ = *data_port; 183 184 /* __flush_dcache_range((unsigned long)dst, end); */ /* P3 see hme */ 185} 186 187static __inline__ void ide_outsw(unsigned long port, 188 const void *src, 189 unsigned long count) 190{ 191 volatile unsigned short *data_port; 192 /* unsigned long end = (unsigned long)src + (count << 1); */ 193 const u16 *ps = src; 194 const u32 *pi; 195 196 data_port = (volatile unsigned short *)port; 197 198 if(((unsigned long)src) & 0x2) { 199 *data_port = *ps++; 200 count--; 201 } 202 pi = (const u32 *)ps; 203 while(count >= 2) { 204 u32 w; 205 206 w = *pi++; 207 *data_port = (w >> 16); 208 *data_port = w; 209 count -= 2; 210 } 211 ps = (const u16 *)pi; 212 if(count) 213 *data_port = *ps; 214 215 /* __flush_dcache_range((unsigned long)src, end); */ /* P3 see hme */ 216} 217 218static __inline__ void ide_fix_driveid(struct hd_driveid *id) 219{ 220 int i; 221 u16 *stringcast; 222 223 id->config = __le16_to_cpu(id->config); 224 id->cyls = __le16_to_cpu(id->cyls); 225 id->reserved2 = __le16_to_cpu(id->reserved2); 226 id->heads = __le16_to_cpu(id->heads); 227 id->track_bytes = __le16_to_cpu(id->track_bytes); 228 id->sector_bytes = __le16_to_cpu(id->sector_bytes); 229 id->sectors = __le16_to_cpu(id->sectors); 230 id->vendor0 = __le16_to_cpu(id->vendor0); 231 id->vendor1 = __le16_to_cpu(id->vendor1); 232 id->vendor2 = __le16_to_cpu(id->vendor2); 233 stringcast = (u16 *)&id->serial_no[0]; 234 for (i = 0; i < (20/2); i++) 235 stringcast[i] = __le16_to_cpu(stringcast[i]); 236 id->buf_type = __le16_to_cpu(id->buf_type); 237 id->buf_size = __le16_to_cpu(id->buf_size); 238 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes); 239 stringcast = (u16 *)&id->fw_rev[0]; 240 for (i = 0; i < (8/2); i++) 241 stringcast[i] = __le16_to_cpu(stringcast[i]); 242 stringcast = (u16 *)&id->model[0]; 243 for (i = 0; i < (40/2); i++) 244 stringcast[i] = __le16_to_cpu(stringcast[i]); 245 id->dword_io = __le16_to_cpu(id->dword_io); 246 id->reserved50 = __le16_to_cpu(id->reserved50); 247 id->field_valid = __le16_to_cpu(id->field_valid); 248 id->cur_cyls = __le16_to_cpu(id->cur_cyls); 249 id->cur_heads = __le16_to_cpu(id->cur_heads); 250 id->cur_sectors = __le16_to_cpu(id->cur_sectors); 251 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0); 252 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1); 253 id->lba_capacity = __le32_to_cpu(id->lba_capacity); 254 id->dma_1word = __le16_to_cpu(id->dma_1word); 255 id->dma_mword = __le16_to_cpu(id->dma_mword); 256 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes); 257 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min); 258 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time); 259 id->eide_pio = __le16_to_cpu(id->eide_pio); 260 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy); 261 for (i = 0; i < 2; i++) 262 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]); 263 for (i = 0; i < 4; i++) 264 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]); 265 id->queue_depth = __le16_to_cpu(id->queue_depth); 266 for (i = 0; i < 4; i++) 267 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]); 268 id->major_rev_num = __le16_to_cpu(id->major_rev_num); 269 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num); 270 id->command_set_1 = __le16_to_cpu(id->command_set_1); 271 id->command_set_2 = __le16_to_cpu(id->command_set_2); 272 id->cfsse = __le16_to_cpu(id->cfsse); 273 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1); 274 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2); 275 id->csf_default = __le16_to_cpu(id->csf_default); 276 id->dma_ultra = __le16_to_cpu(id->dma_ultra); 277 id->word89 = __le16_to_cpu(id->word89); 278 id->word90 = __le16_to_cpu(id->word90); 279 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues); 280 id->word92 = __le16_to_cpu(id->word92); 281 id->hw_config = __le16_to_cpu(id->hw_config); 282 id->acoustic = __le16_to_cpu(id->acoustic); 283 for (i = 0; i < 5; i++) 284 id->words95_99[i] = __le16_to_cpu(id->words95_99[i]); 285 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2); 286 for (i = 0; i < 22; i++) 287 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]); 288 id->last_lun = __le16_to_cpu(id->last_lun); 289 id->word127 = __le16_to_cpu(id->word127); 290 id->dlf = __le16_to_cpu(id->dlf); 291 id->csfo = __le16_to_cpu(id->csfo); 292 for (i = 0; i < 26; i++) 293 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]); 294 id->word156 = __le16_to_cpu(id->word156); 295 for (i = 0; i < 3; i++) 296 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]); 297 id->cfa_power = __le16_to_cpu(id->cfa_power); 298 for (i = 0; i < 14; i++) 299 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]); 300 for (i = 0; i < 31; i++) 301 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]); 302 for (i = 0; i < 48; i++) 303 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]); 304 id->integrity_word = __le16_to_cpu(id->integrity_word); 305} 306 307/* 308 * The following are not needed for the non-m68k ports 309 */ 310#define ide_ack_intr(hwif) (1) 311/* #define ide_ack_intr(hwif) ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1) */ 312#define ide_release_lock(lock) do {} while (0) 313#define ide_get_lock(lock, hdlr, data) do {} while (0) 314 315#endif /* __KERNEL__ */ 316 317#endif /* _SPARC_IDE_H */ 318