1#ifndef __ASM_SH_PGTABLE_H 2#define __ASM_SH_PGTABLE_H 3 4/* Copyright (C) 1999 Niibe Yutaka */ 5 6#include <asm/pgtable-2level.h> 7 8/* 9 * This file contains the functions and defines necessary to modify and use 10 * the SuperH page table tree. 11 */ 12#ifndef __ASSEMBLY__ 13#include <asm/processor.h> 14#include <asm/addrspace.h> 15#include <linux/threads.h> 16 17extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; 18extern void paging_init(void); 19 20#if defined(__sh3__) 21/* Cache flushing: 22 * 23 * - flush_cache_all() flushes entire cache 24 * - flush_cache_mm(mm) flushes the specified mm context's cache lines 25 * - flush_cache_page(mm, vmaddr) flushes a single page 26 * - flush_cache_range(mm, start, end) flushes a range of pages 27 * 28 * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache 29 * - flush_page_to_ram(page) write back kernel page to ram 30 * - flush_icache_range(start, end) flushes(invalidates) a range for icache 31 * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache 32 * 33 * Caches are indexed (effectively) by physical address on SH-3, so 34 * we don't need them. 35 */ 36#define flush_cache_all() do { } while (0) 37#define flush_cache_mm(mm) do { } while (0) 38#define flush_cache_range(mm, start, end) do { } while (0) 39#define flush_cache_page(vma, vmaddr) do { } while (0) 40#define flush_page_to_ram(page) do { } while (0) 41#define flush_dcache_page(page) do { } while (0) 42#define flush_icache_range(start, end) do { } while (0) 43#define flush_icache_page(vma,pg) do { } while (0) 44#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) 45#define flush_cache_sigtramp(vaddr) do { } while (0) 46 47#define p3_cache_init() do { } while (0) 48 49#elif defined(__SH4__) 50/* 51 * Caches are broken on SH-4, so we need them. 52 */ 53 54/* Page is 4K, OC size is 16K, there are four lines. */ 55#define CACHE_ALIAS 0x00003000 56 57extern void flush_cache_all(void); 58extern void flush_cache_mm(struct mm_struct *mm); 59extern void flush_cache_range(struct mm_struct *mm, unsigned long start, 60 unsigned long end); 61extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr); 62extern void flush_dcache_page(struct page *pg); 63extern void flush_icache_range(unsigned long start, unsigned long end); 64extern void flush_cache_sigtramp(unsigned long addr); 65 66#define flush_page_to_ram(page) do { } while (0) 67#define flush_icache_page(vma,pg) do { } while (0) 68#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) 69 70/* Initialization of P3 area for copy_user_page */ 71extern void p3_cache_init(void); 72 73#define PG_mapped PG_arch_1 74 75/* We provide our own get_unmapped_area to avoid cache alias issue */ 76#define HAVE_ARCH_UNMAPPED_AREA 77#endif 78 79/* Flush (write-back only) a region (smaller than a page) */ 80extern void __flush_wback_region(void *start, int size); 81/* Flush (write-back & invalidate) a region (smaller than a page) */ 82extern void __flush_purge_region(void *start, int size); 83/* Flush (invalidate only) a region (smaller than a page) */ 84extern void __flush_invalidate_region(void *start, int size); 85 86 87/* 88 * Basically we have the same two-level (which is the logical three level 89 * Linux page table layout folded) page tables as the i386. 90 */ 91 92/* 93 * ZERO_PAGE is a global shared page that is always zero: used 94 * for zero-mapped memory areas etc.. 95 */ 96extern unsigned long empty_zero_page[1024]; 97#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 98 99#endif /* !__ASSEMBLY__ */ 100 101#define __beep() asm("") 102 103#define PMD_SIZE (1UL << PMD_SHIFT) 104#define PMD_MASK (~(PMD_SIZE-1)) 105#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 106#define PGDIR_MASK (~(PGDIR_SIZE-1)) 107 108#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) 109#define FIRST_USER_PGD_NR 0 110 111#define PTE_PHYS_MASK 0x1ffff000 112 113#ifndef __ASSEMBLY__ 114/* 115 * First 1MB map is used by fixed purpose. 116 * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c) 117 */ 118#define VMALLOC_START (P3SEG+0x00100000) 119#define VMALLOC_VMADDR(x) ((unsigned long)(x)) 120#define VMALLOC_END P4SEG 121 122/* 0x001 WT-bit on SH-4, 0 on SH-3 */ 123#define _PAGE_HW_SHARED 0x002 /* SH-bit : page is shared among processes */ 124#define _PAGE_DIRTY 0x004 /* D-bit : page changed */ 125#define _PAGE_CACHABLE 0x008 /* C-bit : cachable */ 126/* 0x010 SZ0-bit : Size of page */ 127#define _PAGE_RW 0x020 128#define _PAGE_USER 0x040 129/* 0x080 SZ1-bit : Size of page (on SH-4) */ 130#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */ 131#define _PAGE_PROTNONE 0x200 /* software: if not present */ 132#define _PAGE_ACCESSED 0x400 /* software: page referenced */ 133#define _PAGE_U0_SHARED 0x800 /* software: page is shared in user space */ 134 135 136/* software: moves to PTEA.TC (Timing Control) */ 137#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */ 138#define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */ 139 140/* software: moves to PTEA.SA[2:0] (Space Attributes) */ 141#define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */ 142#define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */ 143#define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */ 144#define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */ 145#define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */ 146#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ 147#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ 148 149 150/* Mask which drop software flags */ 151#if defined(__sh3__) 152/* 153 * MMU on SH-3 has bug on SH-bit: We can't use it if MMUCR.IX=1. 154 * Work around: Just drop SH-bit. 155 */ 156#define _PAGE_FLAGS_HARDWARE_MASK 0x1ffff1fc 157#else 158#define _PAGE_FLAGS_HARDWARE_MASK 0x1ffff1fe 159#endif 160/* Hardware flags: SZ=1 (4k-byte) */ 161#define _PAGE_FLAGS_HARD 0x00000010 162 163#define _PAGE_SHARED _PAGE_U0_SHARED 164 165#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY) 166#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY) 167#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_SHARED) 168 169#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD) 170#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_SHARED | _PAGE_FLAGS_HARD) 171#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 172#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 173#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) 174#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) 175#define PAGE_KERNEL_PCC(slot, type) \ 176 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_FLAGS_HARD | (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | (type)) 177 178/* 179 * As i386 and MIPS, SuperH can't do page protection for execute, and 180 * considers that the same as a read. Also, write permissions imply 181 * read permissions. This is the closest we can get.. 182 */ 183 184#define __P000 PAGE_NONE 185#define __P001 PAGE_READONLY 186#define __P010 PAGE_COPY 187#define __P011 PAGE_COPY 188#define __P100 PAGE_READONLY 189#define __P101 PAGE_READONLY 190#define __P110 PAGE_COPY 191#define __P111 PAGE_COPY 192 193#define __S000 PAGE_NONE 194#define __S001 PAGE_READONLY 195#define __S010 PAGE_SHARED 196#define __S011 PAGE_SHARED 197#define __S100 PAGE_READONLY 198#define __S101 PAGE_READONLY 199#define __S110 PAGE_SHARED 200#define __S111 PAGE_SHARED 201 202#define pte_none(x) (!pte_val(x)) 203#define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE)) 204#define pte_clear(xp) do { set_pte(xp, __pte(0)); } while (0) 205 206#define pmd_none(x) (!pmd_val(x)) 207#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) 208#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) 209#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) 210 211#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) 212#define pte_page(x) phys_to_page(pte_val(x)&PTE_PHYS_MASK) 213 214/* 215 * The following only work if pte_present() is true. 216 * Undefined behaviour if not.. 217 */ 218static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; } 219static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_USER; } 220static inline int pte_dirty(pte_t pte){ return pte_val(pte) & _PAGE_DIRTY; } 221static inline int pte_young(pte_t pte){ return pte_val(pte) & _PAGE_ACCESSED; } 222static inline int pte_write(pte_t pte){ return pte_val(pte) & _PAGE_RW; } 223static inline int pte_not_present(pte_t pte){ return !(pte_val(pte) & _PAGE_PRESENT); } 224 225static inline pte_t pte_rdprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; } 226static inline pte_t pte_exprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; } 227static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; } 228static inline pte_t pte_mkold(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; } 229static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; } 230static inline pte_t pte_mkread(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; } 231static inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; } 232static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; } 233static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; } 234static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; } 235 236/* 237 * Conversion functions: convert a page and protection to a page entry, 238 * and a page entry and page directory to the page they refer to. 239 * 240 * extern pte_t mk_pte(struct page *page, pgprot_t pgprot) 241 */ 242#define mk_pte(page,pgprot) \ 243({ pte_t __pte; \ 244 \ 245 set_pte(&__pte, __pte(PHYSADDR(page_address(page)) \ 246 +pgprot_val(pgprot))); \ 247 __pte; \ 248}) 249 250/* This takes a physical page address that is used by the remapping functions */ 251#define mk_pte_phys(physpage, pgprot) \ 252({ pte_t __pte; set_pte(&__pte, __pte(physpage + pgprot_val(pgprot))); __pte; }) 253 254static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 255{ set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; } 256 257#define page_pte(page) page_pte_prot(page, __pgprot(0)) 258 259#define pmd_page(pmd) \ 260((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) 261 262/* to find an entry in a page-table-directory. */ 263#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) 264#define __pgd_offset(address) pgd_index(address) 265#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) 266 267/* to find an entry in a kernel page-table-directory */ 268#define pgd_offset_k(address) pgd_offset(&init_mm, address) 269 270/* Find an entry in the third-level page table.. */ 271#define __pte_offset(address) \ 272 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) 273#define pte_offset(dir, address) ((pte_t *) pmd_page(*(dir)) + \ 274 __pte_offset(address)) 275 276extern void update_mmu_cache(struct vm_area_struct * vma, 277 unsigned long address, pte_t pte); 278 279/* Encode and de-code a swap entry */ 280/* 281 * NOTE: We should set ZEROs at the position of _PAGE_PRESENT 282 * and _PAGE_PROTONOE bits 283 */ 284#define SWP_TYPE(x) ((x).val & 0xff) 285#define SWP_OFFSET(x) ((x).val >> 10) 286#define SWP_ENTRY(type, offset) ((swp_entry_t) { (type) | ((offset) << 10) }) 287#define pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 288#define swp_entry_to_pte(x) ((pte_t) { (x).val }) 289 290/* 291 * Routines for update of PTE 292 * 293 * We just can use generic implementation, as SuperH has no SMP feature. 294 * (We needed atomic implementation for SMP) 295 * 296 */ 297 298#define pte_same(A,B) (pte_val(A) == pte_val(B)) 299 300#endif /* !__ASSEMBLY__ */ 301 302/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ 303#define PageSkip(page) (0) 304#define kern_addr_valid(addr) (1) 305 306#define io_remap_page_range remap_page_range 307 308/* 309 * No page table caches to initialise 310 */ 311#define pgtable_cache_init() do { } while (0) 312 313#endif /* __ASM_SH_PAGE_H */ 314