1#ifndef _ASM_IRQ_H 2#define _ASM_IRQ_H 3 4#include <linux/config.h> 5#ifdef __KERNEL__ 6#include <asm/hardirq.h> 7 8/* 9 * How many IRQ's for S390 ?!? 10 */ 11#define __MAX_SUBCHANNELS 65536 12#define NR_IRQS __MAX_SUBCHANNELS 13#define NR_CHPIDS 256 14 15#define LPM_ANYPATH 0xff /* doesn't really belong here, Ingo? */ 16 17#define INVALID_STORAGE_AREA ((void *)(-1 - 0x3FFF )) 18 19extern int disable_irq(unsigned int); 20extern int enable_irq(unsigned int); 21 22/* 23 * path management control word 24 */ 25typedef struct { 26 __u32 intparm; /* interruption parameter */ 27 __u32 qf : 1; /* qdio facility */ 28 __u32 res0 : 1; /* reserved zeros */ 29 __u32 isc : 3; /* interruption sublass */ 30 __u32 res5 : 3; /* reserved zeros */ 31 __u32 ena : 1; /* enabled */ 32 __u32 lm : 2; /* limit mode */ 33 __u32 mme : 2; /* measurement-mode enable */ 34 __u32 mp : 1; /* multipath mode */ 35 __u32 tf : 1; /* timing facility */ 36 __u32 dnv : 1; /* device number valid */ 37 __u32 dev : 16; /* device number */ 38 __u8 lpm; /* logical path mask */ 39 __u8 pnom; /* path not operational mask */ 40 __u8 lpum; /* last path used mask */ 41 __u8 pim; /* path installed mask */ 42 __u16 mbi; /* measurement-block index */ 43 __u8 pom; /* path operational mask */ 44 __u8 pam; /* path available mask */ 45 __u8 chpid[8]; /* CHPID 0-7 (if available) */ 46 __u32 unused1 : 8; /* reserved zeros */ 47 __u32 st : 3; /* subchannel type */ 48 __u32 unused2 : 20; /* reserved zeros */ 49 __u32 csense : 1; /* concurrent sense; can be enabled ...*/ 50 /* ... per MSCH, however, if facility */ 51 /* ... is not installed, this results */ 52 /* ... in an operand exception. */ 53 } __attribute__ ((packed)) pmcw_t; 54 55#endif /* __KERNEL__ */ 56/* 57 * subchannel status word 58 */ 59typedef struct { 60 __u32 key : 4; /* subchannel key */ 61 __u32 sctl : 1; /* suspend control */ 62 __u32 eswf : 1; /* ESW format */ 63 __u32 cc : 2; /* deferred condition code */ 64 __u32 fmt : 1; /* format */ 65 __u32 pfch : 1; /* prefetch */ 66 __u32 isic : 1; /* initial-status interruption control */ 67 __u32 alcc : 1; /* address-limit checking control */ 68 __u32 ssi : 1; /* supress-suspended interruption */ 69 __u32 zcc : 1; /* zero condition code */ 70 __u32 ectl : 1; /* extended control */ 71 __u32 pno : 1; /* path not operational */ 72 __u32 res : 1; /* reserved */ 73 __u32 fctl : 3; /* function control */ 74 __u32 actl : 7; /* activity control */ 75 __u32 stctl : 5; /* status control */ 76 __u32 cpa; /* channel program address */ 77 __u32 dstat : 8; /* device status */ 78 __u32 cstat : 8; /* subchannel status */ 79 __u32 count : 16; /* residual count */ 80 } __attribute__ ((packed)) scsw_t; 81 82#define SCSW_FCTL_CLEAR_FUNC 0x1 83#define SCSW_FCTL_HALT_FUNC 0x2 84#define SCSW_FCTL_START_FUNC 0x4 85 86#define SCSW_ACTL_SUSPENDED 0x1 87#define SCSW_ACTL_DEVACT 0x2 88#define SCSW_ACTL_SCHACT 0x4 89#define SCSW_ACTL_CLEAR_PEND 0x8 90#define SCSW_ACTL_HALT_PEND 0x10 91#define SCSW_ACTL_START_PEND 0x20 92#define SCSW_ACTL_RESUME_PEND 0x40 93 94#define SCSW_STCTL_STATUS_PEND 0x1 95#define SCSW_STCTL_SEC_STATUS 0x2 96#define SCSW_STCTL_PRIM_STATUS 0x4 97#define SCSW_STCTL_INTER_STATUS 0x8 98#define SCSW_STCTL_ALERT_STATUS 0x10 99 100#define DEV_STAT_ATTENTION 0x80 101#define DEV_STAT_STAT_MOD 0x40 102#define DEV_STAT_CU_END 0x20 103#define DEV_STAT_BUSY 0x10 104#define DEV_STAT_CHN_END 0x08 105#define DEV_STAT_DEV_END 0x04 106#define DEV_STAT_UNIT_CHECK 0x02 107#define DEV_STAT_UNIT_EXCEP 0x01 108 109#define SCHN_STAT_PCI 0x80 110#define SCHN_STAT_INCORR_LEN 0x40 111#define SCHN_STAT_PROG_CHECK 0x20 112#define SCHN_STAT_PROT_CHECK 0x10 113#define SCHN_STAT_CHN_DATA_CHK 0x08 114#define SCHN_STAT_CHN_CTRL_CHK 0x04 115#define SCHN_STAT_INTF_CTRL_CHK 0x02 116#define SCHN_STAT_CHAIN_CHECK 0x01 117 118/* 119 * architectured values for first sense byte 120 */ 121#define SNS0_CMD_REJECT 0x80 122#define SNS_CMD_REJECT SNS0_CMD_REJECT 123#define SNS0_INTERVENTION_REQ 0x40 124#define SNS0_BUS_OUT_CHECK 0x20 125#define SNS0_EQUIPMENT_CHECK 0x10 126#define SNS0_DATA_CHECK 0x08 127#define SNS0_OVERRUN 0x04 128/* 0x02 reserved */ 129#define SNS0_INCOMPL_DOMAIN 0x01 130 131/* 132 * architectured values for second sense byte 133 */ 134#define SNS1_PERM_ERR 0x80 135#define SNS1_INV_TRACK_FORMAT 0x40 136#define SNS1_EOC 0x20 137#define SNS1_MESSAGE_TO_OPER 0x10 138#define SNS1_NO_REC_FOUND 0x08 139#define SNS1_FILE_PROTECTED 0x04 140#define SNS1_WRITE_INHIBITED 0x02 141#define SNS1_INPRECISE_END 0x01 142 143/* 144 * architectured values for third sense byte 145 */ 146#define SNS2_REQ_INH_WRITE 0x80 147#define SNS2_CORRECTABLE 0x40 148#define SNS2_FIRST_LOG_ERR 0x20 149#define SNS2_ENV_DATA_PRESENT 0x10 150/* 0x08 reserved */ 151#define SNS2_INPRECISE_END 0x04 152/* 0x02 reserved */ 153/* 0x01 reserved */ 154 155#ifdef __KERNEL__ 156/* 157 * subchannel information block 158 */ 159typedef struct { 160 pmcw_t pmcw; /* path management control word */ 161 scsw_t scsw; /* subchannel status word */ 162 __u8 mda[12]; /* model dependent area */ 163 } __attribute__ ((packed,aligned(4))) schib_t; 164#endif /* __KERNEL__ */ 165 166typedef struct { 167 __u8 cmd_code;/* command code */ 168 __u8 flags; /* flags, like IDA adressing, etc. */ 169 __u16 count; /* byte count */ 170 __u32 cda; /* data address */ 171 } __attribute__ ((packed,aligned(8))) ccw1_t; 172 173#define CCW_FLAG_DC 0x80 174#define CCW_FLAG_CC 0x40 175#define CCW_FLAG_SLI 0x20 176#define CCW_FLAG_SKIP 0x10 177#define CCW_FLAG_PCI 0x08 178#define CCW_FLAG_IDA 0x04 179#define CCW_FLAG_SUSPEND 0x02 180 181#define CCW_CMD_READ_IPL 0x02 182#define CCW_CMD_NOOP 0x03 183#define CCW_CMD_BASIC_SENSE 0x04 184#define CCW_CMD_TIC 0x08 185#define CCW_CMD_SENSE_PGID 0x34 186#define CCW_CMD_SUSPEND_RECONN 0x5B 187#define CCW_CMD_RDC 0x64 188#define CCW_CMD_SET_PGID 0xAF 189#define CCW_CMD_SENSE_ID 0xE4 190#define CCW_CMD_DCTL 0xF3 191 192#ifdef __KERNEL__ 193#define SENSE_MAX_COUNT 0x20 194 195/* 196 * architectured values for first sense byte 197 */ 198#define SNS0_CMD_REJECT 0x80 199#define SNS_CMD_REJECT SNS0_CMD_REJECT 200#define SNS0_INTERVENTION_REQ 0x40 201#define SNS0_BUS_OUT_CHECK 0x20 202#define SNS0_EQUIPMENT_CHECK 0x10 203#define SNS0_DATA_CHECK 0x08 204#define SNS0_OVERRUN 0x04 205 206/* 207 * operation request block 208 */ 209typedef struct { 210 __u32 intparm; /* interruption parameter */ 211 __u32 key : 4; /* flags, like key, suspend control, etc. */ 212 __u32 spnd : 1; /* suspend control */ 213 __u32 res1 : 1; /* reserved */ 214 __u32 mod : 1; /* modification control */ 215 __u32 sync : 1; /* synchronize control */ 216 __u32 fmt : 1; /* format control */ 217 __u32 pfch : 1; /* prefetch control */ 218 __u32 isic : 1; /* initial-status-interruption control */ 219 __u32 alcc : 1; /* address-limit-checking control */ 220 __u32 ssic : 1; /* suppress-suspended-interr. control */ 221 __u32 res2 : 1; /* reserved */ 222 __u32 c64 : 1; /* IDAW/QDIO 64 bit control */ 223 __u32 i2k : 1; /* IDAW 2/4kB block size control */ 224 __u32 lpm : 8; /* logical path mask */ 225 __u32 ils : 1; /* incorrect length */ 226 __u32 zero : 6; /* reserved zeros */ 227 __u32 orbx : 1; /* ORB extension control */ 228 __u32 cpa; /* channel program address */ 229 } __attribute__ ((packed,aligned(4))) orb_t; 230 231#endif /* __KERNEL__ */ 232typedef struct { 233 __u32 res0 : 4; /* reserved */ 234 __u32 pvrf : 1; /* path-verification-required flag */ 235 __u32 cpt : 1; /* channel-path timeout */ 236 __u32 fsavf : 1; /* Failing storage address validity flag */ 237 __u32 cons : 1; /* concurrent-sense */ 238 __u32 res8 : 2; /* reserved */ 239 __u32 scnt : 6; /* sense count if cons == 1 */ 240 __u32 res16 : 16; /* reserved */ 241 } __attribute__ ((packed)) erw_t; 242 243/* 244 * subchannel logout area 245 */ 246typedef struct { 247 __u32 res0 : 1; /* reserved */ 248 __u32 esf : 7; /* extended status flags */ 249 __u32 lpum : 8; /* last path used mask */ 250 __u32 res16 : 1; /* reserved */ 251 __u32 fvf : 5; /* field-validity flags */ 252 __u32 sacc : 2; /* storage access code */ 253 __u32 termc : 2; /* termination code */ 254 __u32 devsc : 1; /* device-status check */ 255 __u32 serr : 1; /* secondary error */ 256 __u32 ioerr : 1; /* i/o-error alert */ 257 __u32 seqc : 3; /* sequence code */ 258 } __attribute__ ((packed)) sublog_t ; 259 260/* 261 * Format 0 Extended Status Word (ESW) 262 */ 263typedef struct { 264 sublog_t sublog; /* subchannel logout */ 265 erw_t erw; /* extended report word */ 266 __u32 faddr; /* failing address */ 267 __u32 zeros[2]; /* 2 fullwords of zeros */ 268 } __attribute__ ((packed)) esw0_t; 269 270/* 271 * Format 1 Extended Status Word (ESW) 272 */ 273typedef struct { 274 __u8 zero0; /* reserved zeros */ 275 __u8 lpum; /* last path used mask */ 276 __u16 zero16; /* reserved zeros */ 277 erw_t erw; /* extended report word */ 278 __u32 zeros[3]; /* 2 fullwords of zeros */ 279 } __attribute__ ((packed)) esw1_t; 280 281/* 282 * Format 2 Extended Status Word (ESW) 283 */ 284typedef struct { 285 __u8 zero0; /* reserved zeros */ 286 __u8 lpum; /* last path used mask */ 287 __u16 dcti; /* device-connect-time interval */ 288 erw_t erw; /* extended report word */ 289 __u32 zeros[3]; /* 2 fullwords of zeros */ 290 } __attribute__ ((packed)) esw2_t; 291 292/* 293 * Format 3 Extended Status Word (ESW) 294 */ 295typedef struct { 296 __u8 zero0; /* reserved zeros */ 297 __u8 lpum; /* last path used mask */ 298 __u16 res; /* reserved */ 299 erw_t erw; /* extended report word */ 300 __u32 zeros[3]; /* 2 fullwords of zeros */ 301 } __attribute__ ((packed)) esw3_t; 302 303typedef union { 304 esw0_t esw0; 305 esw1_t esw1; 306 esw2_t esw2; 307 esw3_t esw3; 308 } __attribute__ ((packed)) esw_t; 309 310/* 311 * interruption response block 312 */ 313typedef struct { 314 scsw_t scsw; /* subchannel status word */ 315 esw_t esw; /* extended status word */ 316 __u8 ecw[32]; /* extended control word */ 317 } __attribute__ ((packed,aligned(4))) irb_t; 318#ifdef __KERNEL__ 319 320/* 321 * TPI info structure 322 */ 323typedef struct { 324 __u32 reserved1 : 16; /* reserved 0x00000001 */ 325 __u32 irq : 16; /* aka. subchannel number */ 326 __u32 intparm; /* interruption parameter */ 327 __u32 adapter_IO : 1; 328 __u32 reserved2 : 1; 329 __u32 isc : 3; 330 __u32 reserved3 : 12; 331 __u32 int_type : 3; 332 __u32 reserved4 : 12; 333 } __attribute__ ((packed)) tpi_info_t; 334 335 336// 337// command information word (CIW) layout 338// 339typedef struct _ciw { 340 __u32 et : 2; // entry type 341 __u32 reserved : 2; // reserved 342 __u32 ct : 4; // command type 343 __u32 cmd : 8; // command 344 __u32 count : 16; // count 345 } __attribute__ ((packed)) ciw_t; 346 347#define CIW_TYPE_RCD 0x0 // read configuration data 348#define CIW_TYPE_SII 0x1 // set interface identifier 349#define CIW_TYPE_RNI 0x2 // read node identifier 350 351#define MAX_CIWS 8 352// 353// sense-id response buffer layout 354// 355typedef struct { 356 /* common part */ 357 __u8 reserved; /* always 0x'FF' */ 358 __u16 cu_type; /* control unit type */ 359 __u8 cu_model; /* control unit model */ 360 __u16 dev_type; /* device type */ 361 __u8 dev_model; /* device model */ 362 __u8 unused; /* padding byte */ 363 /* extended part */ 364 ciw_t ciw[MAX_CIWS]; /* variable # of CIWs */ 365 } __attribute__ ((packed,aligned(4))) senseid_t; 366 367/* 368 * where we put the ssd info 369 */ 370typedef struct _ssd_info { 371 __u8 valid:1; 372 __u8 type:7; /* subchannel type */ 373 __u8 chpid[8]; /* chpids */ 374 __u16 fla[8]; /* full link addresses */ 375} __attribute__ ((packed)) ssd_info_t; 376 377/* 378 * area for store event information 379 */ 380typedef struct chsc_area_t { 381 struct { 382 /* word 0 */ 383 __u16 command_code1; 384 __u16 command_code2; 385 union { 386 struct { 387 /* word 1 */ 388 __u32 reserved1; 389 /* word 2 */ 390 __u32 reserved2; 391 } __attribute__ ((packed,aligned(8))) sei_req; 392 struct { 393 /* word 1 */ 394 __u16 reserved1; 395 __u16 f_sch; /* first subchannel */ 396 /* word 2 */ 397 __u16 reserved2; 398 __u16 l_sch; /* last subchannel */ 399 } __attribute__ ((packed,aligned(8))) ssd_req; 400 } request_block_data; 401 /* word 3 */ 402 __u32 reserved3; 403 } __attribute__ ((packed,aligned(8))) request_block; 404 struct { 405 /* word 0 */ 406 __u16 length; 407 __u16 response_code; 408 /* word 1 */ 409 __u32 reserved1; 410 union { 411 struct { 412 /* word 2 */ 413 __u8 flags; 414 __u8 vf; /* validity flags */ 415 __u8 rs; /* reporting source */ 416 __u8 cc; /* content code */ 417 /* word 3 */ 418 __u16 fla; /* full link address */ 419 __u16 rsid; /* reporting source id */ 420 /* word 4 */ 421 __u32 reserved2; 422 /* word 5 */ 423 __u32 reserved3; 424 /* word 6 */ 425 __u32 ccdf; /* content-code dependent field */ 426 /* word 7 */ 427 __u32 reserved4; 428 /* word 8 */ 429 __u32 reserved5; 430 /* word 9 */ 431 __u32 reserved6; 432 } __attribute__ ((packed,aligned(8))) sei_res; 433 struct { 434 /* word 2 */ 435 __u8 sch_valid : 1; 436 __u8 dev_valid : 1; 437 __u8 st : 3; /* subchannel type */ 438 __u8 zeroes : 3; 439 __u8 unit_addr; /* unit address */ 440 __u16 devno; /* device number */ 441 /* word 3 */ 442 __u8 path_mask; 443 __u8 fla_valid_mask; 444 __u16 sch; /* subchannel */ 445 /* words 4-5 */ 446 __u8 chpid[8]; /* chpids 0-7 */ 447 /* words 6-9 */ 448 __u16 fla[8]; /* full link addresses 0-7 */ 449 } __attribute__ ((packed,aligned(8))) ssd_res; 450 } response_block_data; 451 } __attribute__ ((packed,aligned(8))) response_block; 452} __attribute__ ((packed,aligned(PAGE_SIZE))) chsc_area_t; 453 454#endif /* __KERNEL__ */ 455/* 456 * sense data 457 */ 458typedef struct { 459 __u8 res[32]; /* reserved */ 460 __u8 data[32]; /* sense data */ 461 } __attribute__ ((packed)) sense_t; 462 463/* 464 * device status area, to be provided by the device driver 465 * when calling request_irq() as parameter "dev_id", later 466 * tied to the "action" control block. 467 * 468 * Note : No data area must be added after union ii or the 469 * effective devstat size calculation will fail ! 470 */ 471typedef struct { 472 __u16 devno; /* device number, aka. "cuu" from irb */ 473 unsigned long intparm; /* interrupt parameter */ 474 __u8 cstat; /* channel status - accumulated */ 475 __u8 dstat; /* device status - accumulated */ 476 __u8 lpum; /* last path used mask from irb */ 477 __u8 unused; /* not used - reserved */ 478 unsigned int flag; /* flag : see below */ 479 __u32 cpa; /* CCW address from irb at primary status */ 480 __u32 rescnt; /* res. count from irb at primary status */ 481 __u32 scnt; /* sense count, if DEVSTAT_FLAG_SENSE_AVAIL */ 482 union { 483 irb_t irb; /* interruption response block */ 484 sense_t sense; /* sense information */ 485 } ii; /* interrupt information */ 486 } devstat_t; 487 488#define DEVSTAT_FLAG_SENSE_AVAIL 0x00000001 489#define DEVSTAT_NOT_OPER 0x00000002 490#define DEVSTAT_START_FUNCTION 0x00000004 491#define DEVSTAT_HALT_FUNCTION 0x00000008 492#define DEVSTAT_STATUS_PENDING 0x00000010 493#define DEVSTAT_REVALIDATE 0x00000020 494#define DEVSTAT_DEVICE_GONE 0x00000040 495#define DEVSTAT_DEVICE_OWNED 0x00000080 496#define DEVSTAT_CLEAR_FUNCTION 0x00000100 497#define DEVSTAT_PCI 0x00000200 498#define DEVSTAT_SUSPENDED 0x00000400 499#define DEVSTAT_UNKNOWN_DEV 0x00000800 500#define DEVSTAT_UNFRIENDLY_DEV 0x00001000 501#define DEVSTAT_FINAL_STATUS 0x80000000 502 503#define DEVINFO_NOT_OPER DEVSTAT_NOT_OPER 504#define DEVINFO_UNKNOWN_DEV DEVSTAT_UNKNOWN_DEV 505#define DEVINFO_DEVICE_OWNED DEVSTAT_DEVICE_OWNED 506#define DEVINFO_QDIO_CAPABLE 0x40000000 507#define DEVINFO_UNFRIENDLY_DEV DEVSTAT_UNFRIENDLY_DEV 508 509#define INTPARM_STATUS_PENDING 0xFFFFFFFF 510#ifdef __KERNEL__ 511 512#define IO_INTERRUPT_TYPE 0 /* I/O interrupt type */ 513 514typedef void (* io_handler_func1_t) ( int irq, 515 devstat_t *devstat, 516 struct pt_regs *rgs); 517 518typedef void (* io_handler_func_t) ( int irq, 519 void *devstat, 520 struct pt_regs *rgs); 521 522typedef void ( * not_oper_handler_func_t)( int irq, 523 int status ); 524 525typedef int (* adapter_int_handler_t)( __u32 intparm ); 526 527typedef struct { 528 io_handler_func_t handler; /* interrupt handler routine */ 529 const char *name; /* device name */ 530 devstat_t *dev_id; /* device status block */ 531 } irq_desc_t; 532 533typedef struct { 534 __u8 state1 : 2; /* path state value 1 */ 535 __u8 state2 : 2; /* path state value 2 */ 536 __u8 state3 : 1; /* path state value 3 */ 537 __u8 resvd : 3; /* reserved */ 538 } __attribute__ ((packed)) path_state_t; 539 540typedef struct { 541 union { 542 __u8 fc; /* SPID function code */ 543 path_state_t ps; /* SNID path state */ 544 } inf; 545 __u32 cpu_addr : 16; /* CPU address */ 546 __u32 cpu_id : 24; /* CPU identification */ 547 __u32 cpu_model : 16; /* CPU model */ 548 __u32 tod_high; /* high word TOD clock */ 549 } __attribute__ ((packed)) pgid_t; 550 551#define SPID_FUNC_SINGLE_PATH 0x00 552#define SPID_FUNC_MULTI_PATH 0x80 553#define SPID_FUNC_ESTABLISH 0x00 554#define SPID_FUNC_RESIGN 0x40 555#define SPID_FUNC_DISBAND 0x20 556 557#define SNID_STATE1_RESET 0 558#define SNID_STATE1_UNGROUPED 2 559#define SNID_STATE1_GROUPED 3 560 561#define SNID_STATE2_NOT_RESVD 0 562#define SNID_STATE2_RESVD_ELSE 2 563#define SNID_STATE2_RESVD_SELF 3 564 565#define SNID_STATE3_MULTI_PATH 1 566#define SNID_STATE3_SINGLE_PATH 0 567 568/* 569 * Flags used as input parameters for do_IO() 570 */ 571#define DOIO_EARLY_NOTIFICATION 0x0001 /* allow for I/O completion ... */ 572 /* ... notification after ... */ 573 /* ... primary interrupt status */ 574#define DOIO_RETURN_CHAN_END DOIO_EARLY_NOTIFICATION 575#define DOIO_VALID_LPM 0x0002 /* LPM input parameter is valid */ 576#define DOIO_WAIT_FOR_INTERRUPT 0x0004 /* wait synchronously for interrupt */ 577#define DOIO_REPORT_ALL 0x0008 /* report all interrupt conditions */ 578#define DOIO_ALLOW_SUSPEND 0x0010 /* allow for channel prog. suspend */ 579#define DOIO_DENY_PREFETCH 0x0020 /* don't allow for CCW prefetch */ 580#define DOIO_SUPPRESS_INTER 0x0040 /* suppress intermediate inter. */ 581 /* ... for suspended CCWs */ 582#define DOIO_TIMEOUT 0x0080 /* 3 secs. timeout for sync. I/O */ 583#define DOIO_DONT_CALL_INTHDLR 0x0100 /* don't call interrupt handler */ 584#define DOIO_CANCEL_ON_TIMEOUT 0x0200 /* cancel I/O if it timed out */ 585 586/* 587 * do_IO() 588 * 589 * Start a S/390 channel program. When the interrupt arrives, the 590 * IRQ handler is called, either immediately, delayed (dev-end missing, 591 * or sense required) or never (no IRQ handler registered - 592 * should never occur, as the IRQ (subchannel ID) should be 593 * disabled if no handler is present. Depending on the action 594 * taken, do_IO() returns : 0 - Success 595 * -EIO - Status pending 596 * see : action->dev_id->cstat 597 * action->dev_id->dstat 598 * -EBUSY - Device busy 599 * -ENODEV - Device not operational 600 */ 601int do_IO( int irq, /* IRQ aka. subchannel number */ 602 ccw1_t *cpa, /* logical channel program address */ 603 unsigned long intparm, /* interruption parameter */ 604 __u8 lpm, /* logical path mask */ 605 unsigned long flag); /* flags : see above */ 606 607int start_IO( int irq, /* IRQ aka. subchannel number */ 608 ccw1_t *cpa, /* logical channel program address */ 609 unsigned long intparm, /* interruption parameter */ 610 __u8 lpm, /* logical path mask */ 611 unsigned int flag); /* flags : see above */ 612 613void do_crw_pending( void ); /* CRW handler */ 614 615int resume_IO( int irq); /* IRQ aka. subchannel number */ 616 617int halt_IO( int irq, /* IRQ aka. subchannel number */ 618 unsigned long intparm, /* dummy intparm */ 619 unsigned long flag); /* possible DOIO_WAIT_FOR_INTERRUPT */ 620 621int clear_IO( int irq, /* IRQ aka. subchannel number */ 622 unsigned long intparm, /* dummy intparm */ 623 unsigned long flag); /* possible DOIO_WAIT_FOR_INTERRUPT */ 624 625int process_IRQ( struct pt_regs regs, 626 unsigned int irq, 627 unsigned int intparm); 628 629 630int enable_cpu_sync_isc ( int irq ); 631int disable_cpu_sync_isc( int irq ); 632 633typedef struct { 634 int irq; /* irq, aka. subchannel */ 635 __u16 devno; /* device number */ 636 unsigned int status; /* device status */ 637 senseid_t sid_data; /* senseID data */ 638 } s390_dev_info_t; 639 640int get_dev_info( int irq, s390_dev_info_t *); /* to be eliminated - don't use */ 641 642int get_dev_info_by_irq ( int irq, s390_dev_info_t *pdi); 643int get_dev_info_by_devno( __u16 devno, s390_dev_info_t *pdi); 644 645int get_irq_by_devno( __u16 devno ); 646unsigned int get_devno_by_irq( int irq ); 647 648int get_irq_first( void ); 649int get_irq_next ( int irq ); 650 651int read_dev_chars( int irq, void **buffer, int length ); 652int read_conf_data( int irq, void **buffer, int *length, __u8 lpm ); 653 654int s390_DevicePathVerification( int irq, __u8 domask ); 655 656int s390_trigger_resense(int irq); 657 658int s390_request_irq_special( int irq, 659 io_handler_func_t io_handler, 660 not_oper_handler_func_t not_oper_handler, 661 unsigned long irqflags, 662 const char *devname, 663 void *dev_id); 664 665extern int set_cons_dev(int irq); 666extern int reset_cons_dev(int irq); 667extern int wait_cons_dev(int irq); 668extern schib_t *s390_get_schib( int irq ); 669 670extern int s390_register_adapter_interrupt(adapter_int_handler_t handler); 671extern int s390_unregister_adapter_interrupt(adapter_int_handler_t handler); 672 673/* 674 * Some S390 specific IO instructions as inline 675 */ 676 677extern __inline__ int stsch(int irq, volatile schib_t *addr) 678{ 679 int ccode; 680 681 __asm__ __volatile__( 682 " lr 1,%1\n" 683 " stsch 0(%2)\n" 684 " ipm %0\n" 685 " srl %0,28" 686 : "=d" (ccode) 687 : "d" (irq | 0x10000), "a" (addr) 688 : "cc", "1" ); 689 return ccode; 690} 691 692extern __inline__ int msch(int irq, volatile schib_t *addr) 693{ 694 int ccode; 695 696 __asm__ __volatile__( 697 " lr 1,%1\n" 698 " msch 0(%2)\n" 699 " ipm %0\n" 700 " srl %0,28" 701 : "=d" (ccode) 702 : "d" (irq | 0x10000L), "a" (addr) 703 : "cc", "1" ); 704 return ccode; 705} 706 707extern __inline__ int msch_err(int irq, volatile schib_t *addr) 708{ 709 int ccode; 710 711 __asm__ __volatile__( 712 " lr 1,%1\n" 713 " msch 0(%2)\n" 714 "0: ipm %0\n" 715 " srl %0,28\n" 716 "1:\n" 717#ifdef CONFIG_ARCH_S390X 718 ".section .fixup,\"ax\"\n" 719 "2: l %0,%3\n" 720 " jg 1b\n" 721 ".previous\n" 722 ".section __ex_table,\"a\"\n" 723 " .align 8\n" 724 " .quad 0b,2b\n" 725 ".previous" 726#else 727 ".section .fixup,\"ax\"\n" 728 "2: l %0,%3\n" 729 " bras 1,3f\n" 730 " .long 1b\n" 731 "3: l 1,0(1)\n" 732 " br 1\n" 733 ".previous\n" 734 ".section __ex_table,\"a\"\n" 735 " .align 4\n" 736 " .long 0b,2b\n" 737 ".previous" 738#endif 739 : "=d" (ccode) 740 : "d" (irq | 0x10000L), "a" (addr), "i" (__LC_PGM_ILC) 741 : "cc", "1" ); 742 return ccode; 743} 744 745extern __inline__ int tsch(int irq, volatile irb_t *addr) 746{ 747 int ccode; 748 749 __asm__ __volatile__( 750 " lr 1,%1\n" 751 " tsch 0(%2)\n" 752 " ipm %0\n" 753 " srl %0,28" 754 : "=d" (ccode) 755 : "d" (irq | 0x10000L), "a" (addr) 756 : "cc", "1" ); 757 return ccode; 758} 759 760extern __inline__ int tpi( volatile tpi_info_t *addr) 761{ 762 int ccode; 763 764 __asm__ __volatile__( 765 " tpi 0(%1)\n" 766 " ipm %0\n" 767 " srl %0,28" 768 : "=d" (ccode) 769 : "a" (addr) 770 : "cc", "1" ); 771 return ccode; 772} 773 774extern __inline__ int ssch(int irq, volatile orb_t *addr) 775{ 776 int ccode; 777 778 __asm__ __volatile__( 779 " lr 1,%1\n" 780 " ssch 0(%2)\n" 781 " ipm %0\n" 782 " srl %0,28" 783 : "=d" (ccode) 784 : "d" (irq | 0x10000L), "a" (addr) 785 : "cc", "1" ); 786 return ccode; 787} 788 789extern __inline__ int rsch(int irq) 790{ 791 int ccode; 792 793 __asm__ __volatile__( 794 " lr 1,%1\n" 795 " rsch\n" 796 " ipm %0\n" 797 " srl %0,28" 798 : "=d" (ccode) 799 : "d" (irq | 0x10000L) 800 : "cc", "1" ); 801 return ccode; 802} 803 804extern __inline__ int csch(int irq) 805{ 806 int ccode; 807 808 __asm__ __volatile__( 809 " lr 1,%1\n" 810 " csch\n" 811 " ipm %0\n" 812 " srl %0,28" 813 : "=d" (ccode) 814 : "d" (irq | 0x10000L) 815 : "cc", "1" ); 816 return ccode; 817} 818 819extern __inline__ int hsch(int irq) 820{ 821 int ccode; 822 823 __asm__ __volatile__( 824 " lr 1,%1\n" 825 " hsch\n" 826 " ipm %0\n" 827 " srl %0,28" 828 : "=d" (ccode) 829 : "d" (irq | 0x10000L) 830 : "cc", "1" ); 831 return ccode; 832} 833 834extern __inline__ int xsch(int irq) 835{ 836 int ccode; 837 838 __asm__ __volatile__( 839 " lr 1,%1\n" 840 " .insn rre,0xb2760000,%1,0\n" 841 " ipm %0\n" 842 " srl %0,28" 843 : "=d" (ccode) 844 : "d" (irq | 0x10000L) 845 : "cc", "1" ); 846 return ccode; 847} 848 849extern __inline__ int iac( void) 850{ 851 int ccode; 852 853 __asm__ __volatile__( 854 " iac 1\n" 855 " ipm %0\n" 856 " srl %0,28" 857 : "=d" (ccode) : : "cc", "1" ); 858 return ccode; 859} 860 861extern __inline__ int rchp(int chpid) 862{ 863 int ccode; 864 865 __asm__ __volatile__( 866 " lr 1,%1\n" 867 " rchp\n" 868 " ipm %0\n" 869 " srl %0,28" 870 : "=d" (ccode) 871 : "d" (chpid) 872 : "cc", "1" ); 873 return ccode; 874} 875 876typedef struct { 877 __u16 vrdcdvno : 16; /* device number (input) */ 878 __u16 vrdclen : 16; /* data block length (input) */ 879 __u32 vrdcvcla : 8; /* virtual device class (output) */ 880 __u32 vrdcvtyp : 8; /* virtual device type (output) */ 881 __u32 vrdcvsta : 8; /* virtual device status (output) */ 882 __u32 vrdcvfla : 8; /* virtual device flags (output) */ 883 __u32 vrdcrccl : 8; /* real device class (output) */ 884 __u32 vrdccrty : 8; /* real device type (output) */ 885 __u32 vrdccrmd : 8; /* real device model (output) */ 886 __u32 vrdccrft : 8; /* real device feature (output) */ 887 } __attribute__ ((packed,aligned(4))) diag210_t; 888 889void VM_virtual_device_info( __u16 devno, /* device number */ 890 senseid_t *ps ); /* ptr to senseID data */ 891 892extern __inline__ int diag210( diag210_t * addr) 893{ 894 int ccode; 895 896 __asm__ __volatile__( 897#ifdef CONFIG_ARCH_S390X 898 " sam31\n" 899 " diag %1,0,0x210\n" 900 " sam64\n" 901#else 902 " diag %1,0,0x210\n" 903#endif 904 " ipm %0\n" 905 " srl %0,28" 906 : "=d" (ccode) 907 : "a" (addr) 908 : "cc" ); 909 return ccode; 910} 911 912extern __inline__ int chsc( chsc_area_t * chsc_area) 913{ 914 int cc; 915 916 __asm__ __volatile__ ( 917 ".insn rre,0xb25f0000,%1,0 \n\t" 918 "ipm %0 \n\t" 919 "srl %0,28 \n\t" 920 : "=d" (cc) 921 : "d" (chsc_area) 922 : "cc" ); 923 924 return cc; 925} 926 927/* 928 * Various low-level irq details needed by irq.c, process.c, 929 * time.c, io_apic.c and smp.c 930 * 931 * Interrupt entry/exit code at both C and assembly level 932 */ 933 934void mask_irq(unsigned int irq); 935void unmask_irq(unsigned int irq); 936 937#define MAX_IRQ_SOURCES 128 938 939extern spinlock_t irq_controller_lock; 940 941#ifdef CONFIG_SMP 942 943#include <asm/atomic.h> 944 945static inline void irq_enter(int cpu, unsigned int irq) 946{ 947 hardirq_enter(cpu); 948 while (atomic_read(&global_irq_lock) != 0) { 949 eieio(); 950 } 951} 952 953static inline void irq_exit(int cpu, unsigned int irq) 954{ 955 hardirq_exit(cpu); 956 release_irqlock(cpu); 957} 958 959 960#else 961 962#define irq_enter(cpu, irq) (++local_irq_count(cpu)) 963#define irq_exit(cpu, irq) (--local_irq_count(cpu)) 964 965#endif 966 967#define __STR(x) #x 968#define STR(x) __STR(x) 969 970#ifdef CONFIG_SMP 971 972/* 973 * SMP has a few special interrupts for IPI messages 974 */ 975 976#endif /* CONFIG_SMP */ 977 978/* 979 * x86 profiling function, SMP safe. We might want to do this in 980 * assembly totally? 981 */ 982extern char _stext; 983static inline void s390_do_profile (unsigned long addr) 984{ 985 if (prof_buffer && current->pid) { 986#ifndef CONFIG_ARCH_S390X 987 addr &= 0x7fffffff; 988#endif 989 addr -= (unsigned long) &_stext; 990 addr >>= prof_shift; 991 /* 992 * Don't ignore out-of-bounds EIP values silently, 993 * put them into the last histogram slot, so if 994 * present, they will show up as a sharp peak. 995 */ 996 if (addr > prof_len-1) 997 addr = prof_len-1; 998 atomic_inc((atomic_t *)&prof_buffer[addr]); 999 } 1000} 1001 1002#include <asm/s390io.h> 1003 1004#define s390irq_spin_lock(irq) \ 1005 spin_lock(&(ioinfo[irq]->irq_lock)) 1006 1007#define s390irq_spin_unlock(irq) \ 1008 spin_unlock(&(ioinfo[irq]->irq_lock)) 1009 1010#define s390irq_spin_lock_irqsave(irq,flags) \ 1011 spin_lock_irqsave(&(ioinfo[irq]->irq_lock), flags) 1012#define s390irq_spin_unlock_irqrestore(irq,flags) \ 1013 spin_unlock_irqrestore(&(ioinfo[irq]->irq_lock), flags) 1014 1015#define touch_nmi_watchdog() do { } while(0) 1016 1017#endif /* __KERNEL__ */ 1018#endif 1019 1020