1#ifndef __PPC64_PCI_H 2#define __PPC64_PCI_H 3#ifdef __KERNEL__ 4 5/* 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 12/* Values for the `which' argument to sys_pciconfig_iobase syscall. */ 13#define IOBASE_BRIDGE_NUMBER 0 14#define IOBASE_MEMORY 1 15#define IOBASE_IO 2 16#define IOBASE_ISA_IO 3 17#define IOBASE_ISA_MEM 4 18 19/* Can be used to override the logic in pci_scan_bus for skipping 20 * already-configured bus numbers - to be used for buggy BIOSes 21 * or architectures with incomplete PCI setup by the loader. 22 */ 23extern int pcibios_assign_all_busses(void); 24 25#define PCIBIOS_MIN_IO 0x1000 26#define PCIBIOS_MIN_MEM 0x10000000 27 28static inline void pcibios_set_master(struct pci_dev *dev) 29{ 30 /* No special bus mastering setup handling */ 31} 32 33static inline void pcibios_penalize_isa_irq(int irq) 34{ 35 /* We don't do dynamic PCI IRQ allocation */ 36} 37 38#include <linux/types.h> 39#include <linux/slab.h> 40#include <linux/string.h> 41#include <asm/scatterlist.h> 42#include <asm/io.h> 43#include <asm/prom.h> 44 45struct pci_dev; 46#define REG_SAVE_SIZE 64 47/************************************************************************ 48 * Structure to hold the data for PCI Register Save/Restore functions. * 49 ************************************************************************/ 50struct pci_config_reg_save_area { 51 struct pci_dev* PciDev; /* Pointer to device(Sanity Check) */ 52 int Flags; /* Control & Info Flags */ 53 int RCode; /* Return Code on Save/Restore */ 54 int Register; /* Pointer to current register. */ 55 u8 Regs[REG_SAVE_SIZE]; /* Save Area */ 56}; 57/************************************************************************ 58 * Functions to support device reset * 59 ************************************************************************/ 60extern int pci_reset_device(struct pci_dev*, int, int); 61extern int pci_save_config_regs(struct pci_dev*,struct pci_config_reg_save_area*); 62extern int pci_restore_config_regs(struct pci_dev*,struct pci_config_reg_save_area*); 63extern char* pci_card_location(struct pci_dev*); 64 65extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, 66 dma_addr_t *dma_handle); 67extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, 68 void *vaddr, dma_addr_t dma_handle); 69 70extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, 71 size_t size, int direction); 72extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, 73 size_t size, int direction); 74extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, 75 int nents, int direction); 76extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, 77 int nents, int direction); 78 79extern void pSeries_pcibios_init_early(void); 80 81static inline void pci_dma_sync_single(struct pci_dev *hwdev, 82 dma_addr_t dma_handle, 83 size_t size, int direction) 84{ 85 if (direction == PCI_DMA_NONE) 86 BUG(); 87 /* nothing to do */ 88} 89 90static inline void pci_dma_sync_sg(struct pci_dev *hwdev, 91 struct scatterlist *sg, 92 int nelems, int direction) 93{ 94 if (direction == PCI_DMA_NONE) 95 BUG(); 96 /* nothing to do */ 97} 98 99/* Return whether the given PCI device DMA address mask can 100 * be supported properly. For example, if your device can 101 * only drive the low 24-bits during PCI bus mastering, then 102 * you would pass 0x00ffffff as the mask to this function. 103 */ 104static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) 105{ 106 return 1; 107} 108 109/* Return the index of the PCI controller for device PDEV. */ 110extern int pci_controller_num(struct pci_dev *pdev); 111 112struct vm_area_struct; 113/* Map a range of PCI memory or I/O space for a device into user space */ 114int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, 115 enum pci_mmap_state mmap_state, int write_combine); 116 117/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */ 118#define HAVE_PCI_MMAP 1 119 120#define sg_dma_address(sg) ((sg)->dma_address) 121#define sg_dma_len(sg) ((sg)->dma_length) 122 123#define pci_map_page(dev, page, off, size, dir) \ 124 pci_map_single(dev, (page_address(page) + (off)), size, dir) 125#define pci_unmap_page(dev,addr,sz,dir) pci_unmap_single(dev,addr,sz,dir) 126 127/* pci_unmap_{single,page} is not a nop, thus... */ 128#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ 129 dma_addr_t ADDR_NAME; 130#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ 131 __u32 LEN_NAME; 132#define pci_unmap_addr(PTR, ADDR_NAME) \ 133 ((PTR)->ADDR_NAME) 134#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ 135 (((PTR)->ADDR_NAME) = (VAL)) 136#define pci_unmap_len(PTR, LEN_NAME) \ 137 ((PTR)->LEN_NAME) 138#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ 139 (((PTR)->LEN_NAME) = (VAL)) 140 141#define pci_dac_dma_supported(pci_dev, mask) (0) 142 143/* The PCI address space does equal the physical memory 144 * address space. The networking and block device layers use 145 * this boolean for bounce buffer decisions. 146 */ 147#define PCI_DMA_BUS_IS_PHYS (0) 148 149#endif /* __KERNEL__ */ 150 151#endif /* __PPC64_PCI_H */ 152