1/*
2 * BK Id: SCCS/s.ppc4xx_serial.h 1.3 05/17/01 18:14:25 cort
3 */
4/*
5 *    Copyright 2000 MontaVista Software Inc.
6 *	PPC405GP modifications
7 * 	Author: MontaVista Software, Inc.
8 *         	frank_rowand@mvista.com or source@mvista.com
9 * 	   	debbie_chu@mvista.com
10 *
11 *    Module name: ppc405_serial.h
12 *
13 *    Description:
14 *      Macros, definitions, and data structures specific to the IBM PowerPC
15 *      405 on-chip serial port devices.
16 */
17
18#ifdef __KERNEL__
19#ifndef __ASMPPC_PPC4xx_SERIAL_H
20#define __ASMPPC_PPC4xx_SERIAL_H
21
22#include <linux/config.h>
23
24#ifdef CONFIG_SERIAL_MANY_PORTS
25#define RS_TABLE_SIZE	64
26#else
27#define RS_TABLE_SIZE	4
28#endif
29
30#define PPC405GP_UART0_INT	0
31#define PPC405GP_UART1_INT	1
32
33/*
34** 405GP UARTs are *not* PCI devices, so need to specify a non-pci memory
35** address and an io_type of SERIAL_IO_MEM.
36*/
37
38#define PPC405GP_UART0_IO_BASE	(u8 *) 0xef600300
39#define PPC405GP_UART1_IO_BASE	(u8 *) 0xef600400
40
41/*
42**  - there is no config option for this
43**  - this name could be more informative
44**  - also see arch/ppc/kernel/ppc405_serial.c
45**
46** #define CONFIG_PPC405GP_INTERNAL_CLOCK
47*/
48#ifdef	CONFIG_PPC405GP_INTERNAL_CLOCK
49#define BASE_BAUD		201600
50#else
51#define BASE_BAUD		691200
52#endif
53
54
55#ifdef CONFIG_SERIAL_DETECT_IRQ
56#define STD_COM_FLAGS	(ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
57#define STD_COM4_FLAGS	(ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
58#else
59#define STD_COM_FLAGS	(ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
60#define STD_COM4_FLAGS	(ASYNC_BOOT_AUTOCONF)
61#endif
62
63
64#ifdef CONFIG_STB03XXX
65
66#define UART0_IO_BASE 0x40040000
67#define UART0_INT     20
68
69#define STD_SERIAL_PORT_DFNS \
70    /* ttyS0 */ \
71    { 0, BASE_BAUD, 0, UART0_INT, STD_COM_FLAGS, 0, 0, 0, 0, 0, 0, 0, \
72    UART0_IO_BASE, 0, 0, 0, {}, {}, {}, SERIAL_IO_MEM, NULL },
73
74#elif defined(CONFIG_UART1_DFLT_CONSOLE)
75
76#define STD_SERIAL_PORT_DFNS \
77    /* ttyS1 */ \
78    { 0, BASE_BAUD, 0, PPC405GP_UART1_INT, STD_COM_FLAGS, 0, 0, 0, 0, 0, 0, 0, \
79    PPC405GP_UART1_IO_BASE, 0, 0, 0, {}, {}, {}, SERIAL_IO_MEM, NULL },        \
80    /* ttyS0 */ \
81    { 0, BASE_BAUD, 0, PPC405GP_UART0_INT, STD_COM_FLAGS, 0, 0, 0, 0, 0, 0, 0, \
82    PPC405GP_UART0_IO_BASE, 0, 0, 0, {}, {}, {}, SERIAL_IO_MEM, NULL },
83
84#else
85
86#define STD_SERIAL_PORT_DFNS \
87    /* ttyS0 */ \
88    { 0, BASE_BAUD, 0, PPC405GP_UART0_INT, STD_COM_FLAGS, 0, 0, 0, 0, 0, 0, 0, \
89    PPC405GP_UART0_IO_BASE, 0, 0, 0, {}, {}, {}, SERIAL_IO_MEM, NULL },        \
90    /* ttyS1 */ \
91    { 0, BASE_BAUD, 0, PPC405GP_UART1_INT, STD_COM_FLAGS, 0, 0, 0, 0, 0, 0, 0, \
92    PPC405GP_UART1_IO_BASE, 0, 0, 0, {}, {}, {}, SERIAL_IO_MEM, NULL },
93
94#endif
95
96
97#define SERIAL_PORT_DFNS     \
98	STD_SERIAL_PORT_DFNS \
99	{}
100
101
102
103#endif	/* __ASMPPC_PPC4xx_SERIAL_H */
104#endif /* __KERNEL__ */
105