1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1999 by Ralf Baechle 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 */ 9#ifndef _ASM_SERIAL_H 10#define _ASM_SERIAL_H 11 12#include <linux/config.h> 13 14/* 15 * This assumes you have a 1.8432 MHz clock for your UART. 16 * 17 * It'd be nice if someone built a serial card with a 24.576 MHz 18 * clock, since the 16550A is capable of handling a top speed of 1.5 19 * megabits/second; but this requires the faster clock. 20 */ 21#define BASE_BAUD (1843200 / 16) 22 23#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT 24 25/* Standard COM flags (except for COM4, because of the 8514 problem) */ 26#ifdef CONFIG_SERIAL_DETECT_IRQ 27#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ) 28#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ) 29#else 30#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) 31#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF 32#endif 33 34#define STD_SERIAL_PORT_DEFNS \ 35 /* UART CLK PORT IRQ FLAGS */ \ 36 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ 37 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \ 38 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \ 39 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */ 40 41#else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ 42#define STD_SERIAL_PORT_DEFNS 43#endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ 44 45#ifdef CONFIG_MIPS_SEAD 46#include <asm/mips-boards/sead.h> 47#include <asm/mips-boards/seadint.h> 48#define SEAD_SERIAL_PORT_DEFNS \ 49 /* UART CLK PORT IRQ FLAGS */ \ 50 { 0, SEAD_BASE_BAUD, SEAD_UART0_REGS_BASE, SEADINT_UART0, STD_COM_FLAGS }, /* ttyS0 */ 51#else 52#define SEAD_SERIAL_PORT_DEFNS 53#endif 54 55 56#ifdef CONFIG_SGI_IP27 57 58/* 59 * Note about serial ports and consoles: 60 * For console output, everyone uses the IOC3 UARTA (offset 0x178) 61 * connected to the master node (look in ip27_setup_console() and 62 * ip27prom_console_write()). 63 * 64 * For serial (/dev/ttyS0 etc), we can not have hardcoded serial port 65 * addresses on a partitioned machine. Since we currently use the ioc3 66 * serial ports, we use dynamic serial port discovery that the serial.c 67 * driver uses for pci/pnp ports (there is an entry for the SGI ioc3 68 * boards in pci_boards[]). Unfortunately, UARTA's pio address is greater 69 * than UARTB's, although UARTA on o200s has traditionally been known as 70 * port 0. So, we just use one serial port from each ioc3 (since the 71 * serial driver adds addresses to get to higher ports). 72 * 73 * The first one to do a register_console becomes the preferred console 74 * (if there is no kernel command line console= directive). /dev/console 75 * (ie 5, 1) is then "aliased" into the device number returned by the 76 * "device" routine referred to in this console structure 77 * (ip27prom_console_dev). 78 * 79 * Also look in ip27-pci.c:pci_fixuop_ioc3() for some comments on working 80 * around ioc3 oddities in this respect. 81 * 82 * The IOC3 serials use a 22MHz clock rate with an additional divider by 3. 83 * (IOC3_BAUD = (22000000 / (3*16))) 84 * 85 * At the moment this is only a skeleton definition as we register all serials 86 * at runtime. 87 */ 88 89#define IP27_SERIAL_PORT_DEFNS 90#else 91#define IP27_SERIAL_PORT_DEFNS 92#endif /* CONFIG_SGI_IP27 */ 93 94#ifdef CONFIG_SGI_IP32 95 96#include <asm/ip32/ip32_ints.h> 97 98/* 99 * The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory 100 */ 101 102/* Standard COM flags (except for COM4, because of the 8514 problem) */ 103#ifdef CONFIG_SERIAL_DETECT_IRQ 104#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ) 105#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ) 106#else 107#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF/* | ASYNC_SKIP_TEST*/) 108#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF 109#endif 110 111#define IP32_SERIAL_PORT_DEFNS \ 112 { .baud_base = BASE_BAUD, \ 113 .irq = MACEISA_SERIAL1_IRQ, \ 114 .flags = STD_COM_FLAGS, \ 115 .iomem_base = (u8*)MACE_BASE+MACEISA_SER1_BASE, \ 116 .iomem_reg_shift = 8, \ 117 .io_type = SERIAL_IO_MEM}, \ 118 { .baud_base = BASE_BAUD, \ 119 .irq = MACEISA_SERIAL2_IRQ, \ 120 .flags = STD_COM_FLAGS, \ 121 .iomem_base = (u8*)MACE_BASE+MACEISA_SER2_BASE, \ 122 .iomem_reg_shift = 8, \ 123 .io_type = SERIAL_IO_MEM}, 124#else 125#define IP32_SERIAL_PORT_DEFNS 126#endif /* CONFIG_SGI_IP31 */ 127 128#define SERIAL_PORT_DFNS \ 129 IP27_SERIAL_PORT_DEFNS \ 130 IP32_SERIAL_PORT_DEFNS \ 131 SEAD_SERIAL_PORT_DEFNS \ 132 STD_SERIAL_PORT_DEFNS 133 134#define RS_TABLE_SIZE 64 135 136#endif /* _ASM_SERIAL_H */ 137