1/* 2 * Carsten Langgaard, carstenl@mips.com 3 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. 4 * 5 * ######################################################################## 6 * 7 * This program is free software; you can distribute it and/or modify it 8 * under the terms of the GNU General Public License (Version 2) as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 * for more details. 15 * 16 * You should have received a copy of the GNU General Public License along 17 * with this program; if not, write to the Free Software Foundation, Inc., 18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 20 * ######################################################################## 21 * 22 * Defines of the Malta board specific address-MAP, registers, etc. 23 * 24 */ 25#ifndef _MIPS_MALTA_H 26#define _MIPS_MALTA_H 27 28#include <asm/addrspace.h> 29#include <asm/io.h> 30 31/* 32 * Malta I/O ports base address for the Galileo GT64120 and Algorithmics 33 * Bonito system controllers. 34 */ 35#define MALTA_GT_PORT_BASE get_gt_port_base(GT_PCI0IOLD_OFS) 36#define MALTA_BONITO_PORT_BASE (KSEG1ADDR(0x1fd00000)) 37#define MALTA_MSC_PORT_BASE get_msc_port_base(MSC01_PCI_SC2PIOBASL) 38 39static inline unsigned long get_gt_port_base(unsigned long reg) 40{ 41 unsigned long addr; 42 GT_READ(reg, addr); 43 return KSEG1ADDR((addr & 0xffff) << 21); 44} 45 46static inline unsigned long get_msc_port_base(unsigned long reg) 47{ 48 unsigned long addr; 49 MSC_READ(reg, addr); 50 return KSEG1ADDR(addr); 51} 52 53/* 54 * Malta RTC-device indirect register access. 55 */ 56#define MALTA_RTC_ADR_REG 0x70 57#define MALTA_RTC_DAT_REG 0x71 58 59/* 60 * Malta SMSC FDC37M817 Super I/O Controller register. 61 */ 62#define SMSC_CONFIG_REG 0x3f0 63#define SMSC_DATA_REG 0x3f1 64 65#define SMSC_CONFIG_DEVNUM 0x7 66#define SMSC_CONFIG_ACTIVATE 0x30 67#define SMSC_CONFIG_ENTER 0x55 68#define SMSC_CONFIG_EXIT 0xaa 69 70#define SMSC_CONFIG_DEVNUM_FLOPPY 0 71 72#define SMSC_CONFIG_ACTIVATE_ENABLE 1 73 74#define SMSC_WRITE(x,a) outb(x,a) 75 76#define MALTA_JMPRS_REG (KSEG1ADDR(0x1f000210)) 77 78#endif /* !(_MIPS_MALTA_H) */ 79