1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
4 *
5 * ########################################################################
6 *
7 *  This program is free software; you can distribute it and/or modify it
8 *  under the terms of the GNU General Public License (Version 2) as
9 *  published by the Free Software Foundation.
10 *
11 *  This program is distributed in the hope it will be useful, but WITHOUT
12 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
14 *  for more details.
15 *
16 *  You should have received a copy of the GNU General Public License along
17 *  with this program; if not, write to the Free Software Foundation, Inc.,
18 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 *
20 * ########################################################################
21 *
22 * Defines for the Atlas interrupt controller.
23 *
24 */
25#ifndef _MIPS_ATLASINT_H
26#define _MIPS_ATLASINT_H
27
28/* Number of IRQ supported on hw interrupt 0. */
29#define ATLASINT_UART      0
30#define ATLASINT_END      32
31
32/*
33 * Atlas registers are memory mapped on 64-bit aligned boundaries and
34 * only word access are allowed.
35 */
36struct atlas_ictrl_regs {
37        volatile unsigned long intraw;
38        long dummy1;
39        volatile unsigned long intseten;
40        long dummy2;
41        volatile unsigned long intrsten;
42        long dummy3;
43        volatile unsigned long intenable;
44        long dummy4;
45        volatile unsigned long intstatus;
46        long dummy5;
47};
48
49extern void atlasint_init(void);
50
51#endif /* !(_MIPS_ATLASINT_H) */
52