1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License.  See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (c) 1997, 1999 by Ralf Baechle
7 * Copyright (c) 1999 Silicon Graphics, Inc.
8 */
9#ifndef _ASM_BCACHE_H
10#define _ASM_BCACHE_H
11
12#include <linux/config.h>
13
14/* Some R4000 / R4400 / R4600 / R5000 machines may have a non-dma-coherent,
15   chipset implemented caches.  On machines with other CPUs the CPU does the
16   cache thing itself. */
17struct bcache_ops {
18	void (*bc_enable)(void);
19	void (*bc_disable)(void);
20	void (*bc_wback_inv)(unsigned long page, unsigned long size);
21	void (*bc_inv)(unsigned long page, unsigned long size);
22};
23
24extern void indy_sc_init(void);
25extern void sni_pcimt_sc_init(void);
26
27#ifdef CONFIG_BOARD_SCACHE
28
29extern struct bcache_ops *bcops;
30
31static inline void bc_enable(void)
32{
33	bcops->bc_enable();
34}
35
36static inline void bc_disable(void)
37{
38	bcops->bc_disable();
39}
40
41static inline void bc_wback_inv(unsigned long page, unsigned long size)
42{
43	bcops->bc_wback_inv(page, size);
44}
45
46static inline void bc_inv(unsigned long page, unsigned long size)
47{
48	bcops->bc_inv(page, size);
49}
50
51#else /* !defined(CONFIG_BOARD_SCACHE) */
52
53/* Not R4000 / R4400 / R4600 / R5000.  */
54
55#define bc_enable() do { } while (0)
56#define bc_disable() do { } while (0)
57#define bc_wback_inv(page, size) do { } while (0)
58#define bc_inv(page, size) do { } while (0)
59
60#endif /* !defined(CONFIG_BOARD_SCACHE) */
61
62#endif /* _ASM_BCACHE_H */
63