1/***********************************************************************
2 *
3 * Copyright 2001 MontaVista Software Inc.
4 * Author: MontaVista Software, Inc.
5 *              ahennessy@mvista.com
6 *
7 * include/asm-mips/jmr3927/pci.h
8 * Based on include/asm-mips/ddb5xxx/pci.h
9 *
10 * This file essentially defines the interface between board
11 * specific PCI code and MIPS common PCI code.  Should potentially put
12 * into include/asm/pci.h file.
13 *
14 *  This program is free software; you can redistribute  it and/or modify it
15 *  under  the terms of  the GNU General  Public License as published by the
16 *  Free Software Foundation;  either version 2 of the  License, or (at your
17 *  option) any later version.
18 *
19 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
20 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
21 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
22 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
23 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
25 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
27 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 *  You should have received a copy of the  GNU General Public License along
31 *  with this program; if not, write  to the Free Software Foundation, Inc.,
32 *  675 Mass Ave, Cambridge, MA 02139, USA.
33 *
34 ***********************************************************************
35 */
36
37#ifndef __ASM_TX3927_PCI_H
38#define __ASM_TX3927__PCI_H
39
40#include <linux/ioport.h>
41#include <linux/pci.h>
42
43/*
44 * Each pci channel is a top-level PCI bus seem by CPU.  A machine  with
45 * multiple PCI channels may have multiple PCI host controllers or a
46 * single controller supporting multiple channels.
47 */
48struct pci_channel {
49	struct pci_ops *pci_ops;
50	struct resource *io_resource;
51	struct resource *mem_resource;
52};
53
54/*
55 * each board defines an array of pci_channels, that ends with all NULL entry
56 */
57extern struct pci_channel mips_pci_channels[];
58
59/*
60 * board supplied pci irq fixup routine
61 */
62extern void pcibios_fixup_irqs(void);
63
64#endif  /* __ASM_TX3927_PCI_H */
65