1#ifndef _ASM_IA64_SN_SN1_SYNERGY_H 2#define _ASM_IA64_SN_SN1_SYNERGY_H 3 4#include <asm/io.h> 5#include <asm/sn/hcl.h> 6#include <asm/sn/addrs.h> 7#include <asm/sn/intr_public.h> 8 9 10/* 11 * Definitions for the synergy asic driver 12 * 13 * These are for SGI platforms only. 14 * 15 * This file is subject to the terms and conditions of the GNU General Public 16 * License. See the file "COPYING" in the main directory of this archive 17 * for more details. 18 * 19 * Copyright (c) 2000-2002 Silicon Graphics, Inc. All rights reserved. 20 */ 21 22 23#define SYNERGY_L4_BYTES (64UL*1024*1024) 24#define SYNERGY_L4_WAYS 8 25#define SYNERGY_L4_BYTES_PER_WAY (SYNERGY_L4_BYTES/SYNERGY_L4_WAYS) 26#define SYNERGY_BLOCK_SIZE 512UL 27 28 29#define SSPEC_BASE (0xe0000000000UL) 30#define LB_REG_BASE (SSPEC_BASE + 0x0) 31 32#define VEC_MASK3A_ADDR (0x2a0 + LB_REG_BASE + __IA64_UNCACHED_OFFSET) 33#define VEC_MASK3B_ADDR (0x2a8 + LB_REG_BASE + __IA64_UNCACHED_OFFSET) 34#define VEC_MASK3A (0x2a0) 35#define VEC_MASK3B (0x2a8) 36 37#define VEC_MASK2A_ADDR (0x2b0 + LB_REG_BASE + __IA64_UNCACHED_OFFSET) 38#define VEC_MASK2B_ADDR (0x2b8 + LB_REG_BASE + __IA64_UNCACHED_OFFSET) 39#define VEC_MASK2A (0x2b0) 40#define VEC_MASK2B (0x2b8) 41 42#define VEC_MASK1A_ADDR (0x2c0 + LB_REG_BASE + __IA64_UNCACHED_OFFSET) 43#define VEC_MASK1B_ADDR (0x2c8 + LB_REG_BASE + __IA64_UNCACHED_OFFSET) 44#define VEC_MASK1A (0x2c0) 45#define VEC_MASK1B (0x2c8) 46 47#define VEC_MASK0A_ADDR (0x2d0 + LB_REG_BASE + __IA64_UNCACHED_OFFSET) 48#define VEC_MASK0B_ADDR (0x2d8 + LB_REG_BASE + __IA64_UNCACHED_OFFSET) 49#define VEC_MASK0A (0x2d0) 50#define VEC_MASK0B (0x2d8) 51 52#define GBL_PERF_A_ADDR (0x330 + LB_REG_BASE + __IA64_UNCACHED_OFFSET) 53#define GBL_PERF_B_ADDR (0x338 + LB_REG_BASE + __IA64_UNCACHED_OFFSET) 54 55#define WRITE_LOCAL_SYNERGY_REG(addr, value) __synergy_out(addr, value) 56 57#define HUB_L(_a) *(_a) 58#define HUB_S(_a, _d) *(_a) = (_d) 59 60#define HSPEC_SYNERGY0_0 0x04000000 /* Synergy0 Registers */ 61#define HSPEC_SYNERGY1_0 0x05000000 /* Synergy1 Registers */ 62#define HS_SYNERGY_STRIDE (HSPEC_SYNERGY1_0 - HSPEC_SYNERGY0_0) 63#define REMOTE_HSPEC(_n, _x) (HUBREG_CAST (RREG_BASE(_n) + (_x))) 64 65#define RREG_BASE(_n) (NODE_LREG_BASE(_n)) 66#define NODE_LREG_BASE(_n) (NODE_HSPEC_BASE(_n) + 0x30000000) 67#define NODE_HSPEC_BASE(_n) (HSPEC_BASE + NODE_OFFSET(_n)) 68#ifndef HSPEC_BASE 69#define HSPEC_BASE (SYN_UNCACHED_SPACE | HSPEC_BASE_SYN) 70#endif 71#define SYN_UNCACHED_SPACE 0xc000000000000000 72#define HSPEC_BASE_SYN 0x00000b0000000000 73#define NODE_OFFSET(_n) (UINT64_CAST (_n) << NODE_SIZE_BITS) 74#define NODE_SIZE_BITS 33 75 76#define SYN_TAG_DISABLE_WAY (SSPEC_BASE+0xae0) 77 78 79#define RSYN_REG_OFFSET(fsb, reg) (((fsb) ? HSPEC_SYNERGY1_0 : HSPEC_SYNERGY0_0) | (reg)) 80 81#define REMOTE_SYNERGY_LOAD(nasid, fsb, reg) __remote_synergy_in(nasid, fsb, reg) 82#define REMOTE_SYNERGY_STORE(nasid, fsb, reg, val) __remote_synergy_out(nasid, fsb, reg, val) 83 84static inline uint64_t 85__remote_synergy_in(int nasid, int fsb, uint64_t reg) { 86 volatile uint64_t *addr; 87 88 addr = (uint64_t *)(RREG_BASE(nasid) + RSYN_REG_OFFSET(fsb, reg)); 89 return (*addr); 90} 91 92static inline void 93__remote_synergy_out(int nasid, int fsb, uint64_t reg, uint64_t value) { 94 volatile uint64_t *addr; 95 96 addr = (uint64_t *)(RREG_BASE(nasid) + RSYN_REG_OFFSET(fsb, (reg<<2))); 97 *(addr+0) = value >> 48; 98 *(addr+1) = value >> 32; 99 *(addr+2) = value >> 16; 100 *(addr+3) = value; 101 __ia64_mf_a(); 102} 103 104/* XX this doesn't make a lot of sense. Which fsb? */ 105static inline void 106__synergy_out(unsigned long addr, unsigned long value) 107{ 108 volatile unsigned long *adr = (unsigned long *) 109 (addr | __IA64_UNCACHED_OFFSET); 110 111 *adr = value; 112 __ia64_mf_a(); 113} 114 115#define READ_LOCAL_SYNERGY_REG(addr) __synergy_in(addr) 116 117/* XX this doesn't make a lot of sense. Which fsb? */ 118static inline unsigned long 119__synergy_in(unsigned long addr) 120{ 121 unsigned long ret, *adr = (unsigned long *) 122 (addr | __IA64_UNCACHED_OFFSET); 123 124 ret = *adr; 125 __ia64_mf_a(); 126 return ret; 127} 128 129struct sn1_intr_action { 130 void (*handler)(int, void *, struct pt_regs *); 131 void *intr_arg; 132 unsigned long flags; 133 struct sn1_intr_action * next; 134}; 135 136typedef struct synergy_da_s { 137 hub_intmasks_t s_intmasks; 138}synergy_da_t; 139 140struct sn1_cnode_action_list { 141 spinlock_t action_list_lock; 142 struct sn1_intr_action *action_list; 143}; 144 145/* 146 * ioctl cmds for node/hub/synergy/[01]/mon for synergy 147 * perf monitoring are defined in sndrv.h 148 */ 149 150/* multiplex the counters every 10 timer interrupts */ 151#define SYNERGY_PERF_FREQ_DEFAULT 10 152 153/* macros for synergy "mon" device ioctl handler */ 154#define SYNERGY_PERF_INFO(_s, _f) (arbitrary_info_t)(((_s) << 16)|(_f)) 155#define SYNERGY_PERF_INFO_CNODE(_x) (cnodeid_t)(((uint64_t)_x) >> 16) 156#define SYNERGY_PERF_INFO_FSB(_x) (((uint64_t)_x) & 1) 157 158/* synergy perf control registers */ 159#define PERF_CNTL0_A 0xab0UL /* control A on FSB0 */ 160#define PERF_CNTL0_B 0xab8UL /* control B on FSB0 */ 161#define PERF_CNTL1_A 0xac0UL /* control A on FSB1 */ 162#define PERF_CNTL1_B 0xac8UL /* control B on FSB1 */ 163 164/* synergy perf counters */ 165#define PERF_CNTR0_A 0xad0UL /* counter A on FSB0 */ 166#define PERF_CNTR0_B 0xad8UL /* counter B on FSB0 */ 167#define PERF_CNTR1_A 0xaf0UL /* counter A on FSB1 */ 168#define PERF_CNTR1_B 0xaf8UL /* counter B on FSB1 */ 169 170/* Synergy perf data. Each nodepda keeps a list of these */ 171struct synergy_perf_s { 172 uint64_t intervals; /* count of active intervals for this event */ 173 uint64_t total_intervals;/* snapshot of total intervals */ 174 uint64_t modesel; /* mode and sel bits, both A and B registers */ 175 struct synergy_perf_s *next; /* next in circular linked list */ 176 uint64_t counts[2]; /* [0] is synergy-A counter, [1] synergy-B counter */ 177}; 178 179typedef struct synergy_perf_s synergy_perf_t; 180 181typedef struct synergy_info_s synergy_info_t; 182 183extern void synergy_perf_init(void); 184extern void synergy_perf_update(int); 185extern struct file_operations synergy_mon_fops; 186 187#endif /* _ASM_IA64_SN_SN1_SYNERGY_H */ 188